| /external/llvm/test/CodeGen/ARM/ |
| D | jump-table-islands-split.ll | 7 ; the tbb and its table. Fortunately, the flow is simple enough that we can
21 ; CHECK-NEXT: tbb [r[[BASE]], {{r[0-9]+}}]
|
| D | thumb-alignment.ll | 26 ; CHECK: tbb
|
| /external/llvm/lib/Target/ARM/ |
| D | README-Thumb2.txt | 6 of tbb / tbh.
|
| D | ARMInstrThumb2.td | 3562 "tbb", "\t$addr", []>, Sched<[WriteBrTbl]> {
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | README-Thumb2.txt | 6 of tbb / tbh.
|
| D | ARMInstrThumb2.td | 3147 "tbb", "\t$addr", []> {
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/ |
| D | thumb2-tbh.ll | 3 ; Thumb2 target should reorder the bb's in order to use tbb / tbh.
19 ; CHECK: tbb
|
| D | thumb2-jtb.ll | 1 ; RUN: llc < %s -march=thumb -mattr=+thumb2 -arm-adjust-jump-tables=0 | not grep tbb
3 ; Do not use tbb / tbh if any destination is before the jumptable.
|
| D | thumb2-tbb.ll | 7 ; CHECK: tbb
|
| /external/llvm/test/CodeGen/Thumb2/ |
| D | thumb2-tbh.ll | 3 ; Thumb2 target should reorder the bb's in order to use tbb / tbh.
24 ; CHECK-NEXT: tbb [pc, {{r[0-9]+}}]
|
| D | thumb2-jtb.ll | 3 ; Do not use tbb / tbh if any destination is before the jumptable.
8 ; CHECK-NOT: tbb
|
| D | thumb2-tbb.ll | 7 ; CHECK: tbb
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb-tests.txt | 176 # CHECK: tbb [r5, r4]
|
| D | thumb2.txt | 2267 # CHECK: tbb [r3, r8]
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | thumb-tests.txt | 176 # CHECK: tbb [r5, r4]
|
| D | thumb2.txt | 2116 # CHECK: tbb [r3, r8]
|
| /external/vixl/doc/aarch32/design/ |
| D | literal-pool-aarch32.md | 44 branch (like b, tbb/tbh, ...)
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 2746 tbb [r3, r8]
2753 @ CHECK: tbb [r3, r8] @ encoding: [0xd3,0xe8,0x08,0xf0]
|
| /external/swiftshader/third_party/LLVM/bindings/ocaml/llvm/ |
| D | llvm.mli | 1738 (** [build_cond_br cond tbb fbb b] creates a
1739 [br %cond, %tbb, %fbb]
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3515 void tbb(Condition cond, Register rn, Register rm);
3516 void tbb(Register rn, Register rm) { tbb(al, rn, rm); } in tbb() function
|
| D | disasm-aarch32.h | 1223 void tbb(Condition cond, Register rn, Register rm);
|
| D | assembler-aarch32.cc | 11680 void Assembler::tbb(Condition cond, Register rn, Register rm) { in tbb() function in vixl::aarch32::Assembler
11692 Delegate(kTbb, &Assembler::tbb, cond, rn, rm); in tbb()
|
| D | disasm-aarch32.cc | 3288 void Disassembler::tbb(Condition cond, Register rn, Register rm) { in tbb() function in vixl::aarch32::Disassembler
10411 tbb(CurrentCond(), in DecodeT32()
|
| /external/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 3243 tbb [r3, r8]
3250 @ CHECK: tbb [r3, r8] @ encoding: [0xd3,0xe8,0x08,0xf0]
|
| /external/llvm/bindings/ocaml/llvm/ |
| D | llvm.mli | 1990 (** [build_cond_br cond tbb fbb b] creates a
1991 [br %cond, %tbb, %fbb]
|