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Searched refs:tltu (Results 1 – 25 of 49) sorted by relevance

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/external/llvm/test/MC/Mips/
Dmips-control-instructions.s30 # CHECK32: tltu $zero, $3 # encoding: [0x00,0x03,0x00,0x33]
31 # CHECK32: tltu $zero, $3, 255 # encoding: [0x00,0x03,0x3f,0xf3]
61 # CHECK64: tltu $zero, $3 # encoding: [0x00,0x03,0x00,0x33]
62 # CHECK64: tltu $zero, $3, 255 # encoding: [0x00,0x03,0x3f,0xf3]
95 tltu $0,$3
96 tltu $0,$3,255
Dmicromips-trap-instructions.s16 # CHECK-EL: tltu $8, $9 # encoding: [0x28,0x01,0x3c,0x0a]
31 # CHECK-EB: tltu $8, $9 # encoding: [0x01,0x28,0x0a,0x3c]
43 tltu $8, $9, 0
/external/llvm/test/MC/Mips/micromips32r6/
Dinvalid-wrong-error.s22 tltu $8, $9, $2 # CHECK: :[[@LINE]]:16: error: expected 10-bit unsigned immediate
23 tltu $8, $9, -1 # CHECK: :[[@LINE]]:16: error: expected 10-bit unsigned immediate
24 …tltu $8, $9, 16 # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not curr…
Dvalid.s263 tltu $11, $16 # CHECK: tltu $11, $16 # encoding: [0x02,0x0b,0x0a,0x3c]
264 tltu $16, $sp, 15 # CHECK: tltu $16, $sp, 15 # encoding: [0x03,0xb0,0xfa,0x3c]
/external/llvm/test/MC/Mips/micromips64r6/
Dinvalid-wrong-error.s30 tltu $8, $9, $2 # CHECK: :[[@LINE]]:16: error: expected 10-bit unsigned immediate
31 tltu $8, $9, -1 # CHECK: :[[@LINE]]:16: error: expected 10-bit unsigned immediate
32 …tltu $8, $9, 16 # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not curr…
Dvalid.s135 tltu $11, $16 # CHECK: tltu $11, $16 # encoding: [0x02,0x0b,0x0a,0x3c]
136 tltu $16, $sp, 15 # CHECK: tltu $16, $sp, 15 # encoding: [0x03,0xb0,0xfa,0x3c]
/external/llvm/test/MC/Mips/mips2/
Dvalid.s168 … tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33]
169 … tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33]
/external/llvm/test/MC/Mips/mips32/
Dvalid.s198 … tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33]
199 … tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33]
/external/llvm/test/MC/Mips/mips32r3/
Dvalid.s235 … tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33]
236 … tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33]
/external/llvm/test/MC/Mips/mips3/
Dvalid.s232 … tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33]
233 … tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33]
/external/llvm/test/MC/Mips/mips32r5/
Dvalid.s236 … tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33]
237 … tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33]
/external/llvm/test/MC/Mips/mips32r2/
Dvalid.s235 … tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33]
236 … tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33]
/external/llvm/test/MC/Mips/mips1/
Dinvalid-mips2.s41 …tltu $11,$16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
42 …tltu $16,$29,1016 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
/external/llvm/test/MC/Mips/mips64/
Dvalid.s282 … tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33]
283 … tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33]
/external/llvm/test/MC/Mips/mips4/
Dvalid.s261 … tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33]
262 … tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33]
/external/llvm/test/MC/Mips/mips5/
Dvalid.s263 … tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33]
264 … tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33]
/external/llvm/test/MC/Mips/mips64r3/
Dvalid.s308 … tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33]
309 … tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33]
/external/llvm/test/MC/Mips/mips64r2/
Dvalid.s308 … tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33]
309 … tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33]
/external/llvm/test/MC/Mips/mips64r5/
Dvalid.s309 … tltu $11,$16 # CHECK: tltu $11, $16 # encoding: [0x01,0x70,0x00,0x33]
310 … tltu $16,$29,1016 # CHECK: tltu $16, $sp, 1016 # encoding: [0x02,0x1d,0xfe,0x33]
/external/llvm/test/MC/Disassembler/Mips/mips2/
Dvalid-mips2-el.txt154 0x33 0x00 0x70 0x01 # CHECK: tltu $11, $16
155 0x33 0xfe 0x1d 0x02 # CHECK: tltu $16, $sp, 1016
Dvalid-mips2.txt47 0x01 0x70 0x00 0x33 # CHECK: tltu $11, $16
51 0x02 0x1d 0xfe 0x33 # CHECK: tltu $16, $sp, 1016
/external/llvm/test/MC/Disassembler/Mips/mips32r6/
Dvalid-mips32r6-el.txt154 0x33 0x00 0x70 0x01 # CHECK: tltu $11, $16
155 0x33 0xfe 0x1d 0x02 # CHECK: tltu $16, $sp, 1016
Dvalid-mips32r6.txt31 0x01 0x70 0x00 0x33 # CHECK: tltu $11, $16
33 0x02 0x1d 0xfe 0x33 # CHECK: tltu $16, $sp, 1016
/external/llvm/test/MC/Disassembler/Mips/mips64r6/
Dvalid-mips64r6-el.txt186 0x33 0x00 0x70 0x01 # CHECK: tltu $11, $16
187 0x33 0xfe 0x1d 0x02 # CHECK: tltu $16, $sp, 1016
/external/llvm/test/MC/Disassembler/Mips/mips3/
Dvalid-mips3-el.txt202 0x33 0x00 0x70 0x01 # CHECK: tltu $11, $16
203 0x33 0xfe 0x1d 0x02 # CHECK: tltu $16, $sp, 1016

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