/external/libmpeg2/common/armv8/ |
D | icv_variance_av8.s | 93 uaddl2 v20.4s, v20.8h, v22.8h 94 uaddl2 v24.4s, v24.8h, v26.8h
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/external/llvm/test/MC/AArch64/ |
D | neon-3vdiff.s | 41 uaddl2 v0.8h, v1.16b, v2.16b 42 uaddl2 v0.4s, v1.8h, v2.8h 43 uaddl2 v0.2d, v1.4s, v2.4s
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D | arm64-advsimd.s | 2066 uaddl2 v9.8h, v13.16b, v14.16b 2068 uaddl2 v9.4s, v13.8h, v14.8h 2070 uaddl2 v9.2d, v13.4s, v14.4s 2072 ; CHECK: uaddl2.8h v9, v13, v14 ; encoding: [0xa9,0x01,0x2e,0x6e] 2074 ; CHECK: uaddl2.4s v9, v13, v14 ; encoding: [0xa9,0x01,0x6e,0x6e] 2076 ; CHECK: uaddl2.2d v9, v13, v14 ; encoding: [0xa9,0x01,0xae,0x6e]
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D | neon-diagnostics.s | 2141 uaddl2 v0.8h, v1.16h, v2.16b 2142 uaddl2 v0.4s, v1.8s, v2.8h 2143 uaddl2 v0.2d, v1.4d, v2.4s
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-vadd.ll | 243 ; CHECK-NEXT: uaddl2.8h v0, v0, v1 259 ; CHECK-NEXT: uaddl2.4s v0, v0, v1 275 ; CHECK-NEXT: uaddl2.2d v0, v0, v1 744 ; CHECK: uaddl2.2d
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D | arm64-neon-3vdiff.ll | 151 ; CHECK: uaddl2 {{v[0-9]+}}.8h, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 163 ; CHECK: uaddl2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 175 ; CHECK: uaddl2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
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/external/libavc/common/armv8/ |
D | ih264_intra_pred_luma_16x16_av8.s | 327 uaddl2 v3.8h, v0.16b, v1.16b
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/external/libavc/encoder/armv8/ |
D | ih264e_evaluate_intra16x16_modes_av8.s | 132 uaddl2 v3.8h, v0.16b, v1.16b
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | neon-instructions.txt | 1146 # CHECK: uaddl2 v0.8h, v1.16b, v2.16b 1147 # CHECK: uaddl2 v0.4s, v1.8h, v2.8h 1148 # CHECK: uaddl2 v0.2d, v1.4s, v2.4s
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/external/vixl/test/test-trace-reference/ |
D | log-disasm-colour | 1861 0x~~~~~~~~~~~~~~~~ 6ea602e5 uaddl2 v5.2d, v23.4s, v6.4s 1862 0x~~~~~~~~~~~~~~~~ 6e7900a1 uaddl2 v1.4s, v5.8h, v25.8h 1863 0x~~~~~~~~~~~~~~~~ 6e3c03d6 uaddl2 v22.8h, v30.16b, v28.16b
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D | log-disasm | 1861 0x~~~~~~~~~~~~~~~~ 6ea602e5 uaddl2 v5.2d, v23.4s, v6.4s 1862 0x~~~~~~~~~~~~~~~~ 6e7900a1 uaddl2 v1.4s, v5.8h, v25.8h 1863 0x~~~~~~~~~~~~~~~~ 6e3c03d6 uaddl2 v22.8h, v30.16b, v28.16b
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D | log-all | 5025 0x~~~~~~~~~~~~~~~~ 6ea602e5 uaddl2 v5.2d, v23.4s, v6.4s 5027 0x~~~~~~~~~~~~~~~~ 6e7900a1 uaddl2 v1.4s, v5.8h, v25.8h 5029 0x~~~~~~~~~~~~~~~~ 6e3c03d6 uaddl2 v22.8h, v30.16b, v28.16b
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/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 2204 __ uaddl2(v5.V2D(), v23.V4S(), v6.V4S()); in GenerateTestSequenceNEON() local 2205 __ uaddl2(v1.V4S(), v5.V8H(), v25.V8H()); in GenerateTestSequenceNEON() local 2206 __ uaddl2(v22.V8H(), v30.V16B(), v28.V16B()); in GenerateTestSequenceNEON() local
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/external/vixl/src/aarch64/ |
D | simulator-aarch64.h | 2344 LogicVRegister uaddl2(VectorFormat vform,
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D | assembler-aarch64.h | 2166 void uaddl2(const VRegister& vd, const VRegister& vn, const VRegister& vm);
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D | macro-assembler-aarch64.h | 2220 V(uaddl2, Uaddl2) \
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D | simulator-aarch64.cc | 3529 uaddl2(vf_l, rd, rn, rm); in VisitNEON3Different()
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D | logic-aarch64.cc | 2855 LogicVRegister Simulator::uaddl2(VectorFormat vform, in uaddl2() function in vixl::aarch64::Simulator
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D | assembler-aarch64.cc | 1924 V(uaddl2, NEON_UADDL2, vn.IsVector() && vn.IsQ()) \
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/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 4107 void uaddl2(const VRegister& vd,
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/external/valgrind/none/tests/arm64/ |
D | fp_and_simd.stdout.exp | 27382 uaddl2 v2.2d, v11.4s, v29.4s 52b73571557c52622fab85bf23c6ccce e484440f14df0338ef5a9979278f2c5a … 27384 uaddl2 v2.4s, v11.8h, v29.8h d634de94bf2a68d55c2818405e15298f 3b4e64f4a9e03b9827d7407754b35a12 … 27386 uaddl2 v2.8h, v11.16b, v29.16b 39dd6a423e27a49218fcc32356c26e69 e92bf4c9aa96ae065cde651d98a487e7…
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