/external/valgrind/none/tests/arm/ |
D | v6media.stdout.exp | 4405 uhsub16 r0, r1, r2 :: rd 0xfff87ffe rm 0x0009ffff, rn 0x00180003, carryin 0, cpsr 0x00000000 … 4406 uhsub16 r0, r1, r2 :: rd 0x00078002 rm 0x00180003, rn 0x0009ffff, carryin 0, cpsr 0x00000000 … 4407 uhsub16 r0, r1, r2 :: rd 0x80020007 rm 0x00030018, rn 0xffff0009, carryin 0, cpsr 0x00000000 … 4408 uhsub16 r0, r1, r2 :: rd 0x7ffefff8 rm 0xffff0009, rn 0x00030018, carryin 0, cpsr 0x00000000 … 4409 uhsub16 r0, r1, r2 :: rd 0x3fff3fff rm 0x7fff7fff, rn 0x00000000, carryin 0, cpsr 0x00000000 … 4410 uhsub16 r0, r1, r2 :: rd 0xffffc0ff rm 0x7fff00ff, rn 0x80017f01, carryin 0, cpsr 0x00000000 … 4411 uhsub16 r0, r1, r2 :: rd 0x40004000 rm 0x80008000, rn 0x00000000, carryin 0, cpsr 0x00000000 … 4412 uhsub16 r0, r1, r2 :: rd 0xc000c000 rm 0x80008000, rn 0xffffffff, carryin 0, cpsr 0x00000000 … 4413 uhsub16 r0, r1, r2 :: rd 0xf4fbbcb7 rm 0xb8035b5b, rn 0xce0ce1ed, carryin 0, cpsr 0x00000000 … 4414 uhsub16 r0, r1, r2 :: rd 0xb4bf194c rm 0x146275d8, rn 0xaae3433f, carryin 0, cpsr 0x00000000 … [all …]
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/external/vixl/test/aarch32/ |
D | test-assembler-cond-rd-rn-rm-a32.cc | 84 M(uhsub16) \
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D | test-assembler-cond-rd-rn-rm-t32.cc | 83 M(uhsub16) \
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/external/valgrind/docs/internals/ |
D | 3_8_BUGSTATUS.txt | 45 (304035: ARM: uqsub16 shadd16 uhsub8 uhsub16)
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | basic-arm-instructions.s | 2355 uhsub16 r4, r8, r2 2360 @ CHECK: uhsub16 r4, r8, r2 @ encoding: [0x72,0x4f,0x78,0xe6]
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D | basic-thumb2-instructions.s | 2892 uhsub16 r5, r8, r3 2898 @ CHECK: uhsub16 r5, r8, r3 @ encoding: [0xd8,0xfa,0x63,0xf5]
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/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 3576 void uhsub16(Condition cond, Register rd, Register rn, Register rm); 3577 void uhsub16(Register rd, Register rn, Register rm) { in uhsub16() function 3578 uhsub16(al, rd, rn, rm); in uhsub16()
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D | disasm-aarch32.h | 1258 void uhsub16(Condition cond, Register rd, Register rn, Register rm);
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D | assembler-aarch32.cc | 12083 void Assembler::uhsub16(Condition cond, Register rd, Register rn, Register rm) { in uhsub16() function in vixl::aarch32::Assembler 12100 Delegate(kUhsub16, &Assembler::uhsub16, cond, rd, rn, rm); in uhsub16()
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D | disasm-aarch32.cc | 3430 void Disassembler::uhsub16(Condition cond, in uhsub16() function in vixl::aarch32::Disassembler 21658 uhsub16(CurrentCond(), in DecodeT32() 63857 uhsub16(condition, in DecodeA32()
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D | macro-assembler-aarch32.h | 4970 uhsub16(cond, rd, rn, rm); in Uhsub16()
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/external/llvm/test/MC/ARM/ |
D | basic-arm-instructions.s | 3273 uhsub16 r4, r8, r2 3278 @ CHECK: uhsub16 r4, r8, r2 @ encoding: [0x72,0x4f,0x78,0xe6]
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D | basic-thumb2-instructions.s | 3389 uhsub16 r5, r8, r3 3395 @ CHECK: uhsub16 r5, r8, r3 @ encoding: [0xd8,0xfa,0x63,0xf5]
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/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | thumb2.txt | 2251 # CHECK: uhsub16 r5, r8, r3
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D | basic-arm-instructions.txt | 2093 # CHECK: uhsub16 r4, r8, r2
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/external/llvm/test/MC/Disassembler/ARM/ |
D | thumb2.txt | 2402 # CHECK: uhsub16 r5, r8, r3
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D | basic-arm-instructions.txt | 2266 # CHECK: uhsub16 r4, r8, r2
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 1980 def t2UHSUB16 : T2I_pam<0b101, 0b0110, "uhsub16">;
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D | ARMInstrInfo.td | 3213 def UHSUB16 : AAI<0b01100111, 0b11110111, "uhsub16">;
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 2185 def t2UHSUB16 : T2I_pam<0b101, 0b0110, "uhsub16">;
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D | ARMInstrInfo.td | 3614 def UHSUB16 : AAI<0b01100111, 0b11110111, "uhsub16">;
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