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Searched refs:uminp (Results 1 – 22 of 22) sorted by relevance

/external/llvm/test/MC/AArch64/
Dneon-max-min-pairwise.s53 uminp v0.8b, v1.8b, v2.8b
54 uminp v0.16b, v1.16b, v2.16b
55 uminp v0.4h, v1.4h, v2.4h
56 uminp v0.8h, v1.8h, v2.8h
57 uminp v0.2s, v1.2s, v2.2s
58 uminp v0.4s, v1.4s, v2.4s
Darm64-advsimd.s362 uminp.8b v0, v0, v0
433 ; CHECK: uminp.8b v0, v0, v0 ; encoding: [0x00,0xac,0x20,0x2e]
Dneon-diagnostics.s1147 uminp v0.2s, v1.2s, v2.8b
/external/llvm/test/CodeGen/AArch64/
Darm64-vmax.ll436 ;CHECK: uminp.8b
439 %tmp3 = call <8 x i8> @llvm.aarch64.neon.uminp.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2)
445 ;CHECK: uminp.16b
448 %tmp3 = call <16 x i8> @llvm.aarch64.neon.uminp.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2)
454 ;CHECK: uminp.4h
457 %tmp3 = call <4 x i16> @llvm.aarch64.neon.uminp.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2)
463 ;CHECK: uminp.8h
466 %tmp3 = call <8 x i16> @llvm.aarch64.neon.uminp.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2)
472 ;CHECK: uminp.2s
475 %tmp3 = call <2 x i32> @llvm.aarch64.neon.uminp.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2)
[all …]
Darm64-uminv.ll115 ; CHECK: uminp.2s v[[REGNUM:[0-9]+]], v1, v1
/external/valgrind/none/tests/arm64/
Dfp_and_simd.c3422 GEN_BINARY_TEST(uminp, 4s, 4s, 4s)
3423 GEN_BINARY_TEST(uminp, 2s, 2s, 2s)
3424 GEN_BINARY_TEST(uminp, 8h, 8h, 8h)
3425 GEN_BINARY_TEST(uminp, 4h, 4h, 4h)
3426 GEN_BINARY_TEST(uminp, 16b, 16b, 16b)
3427 GEN_BINARY_TEST(uminp, 8b, 8b, 8b)
Dfp_and_simd.stdout.exp27593 uminp v9.4s, v7.4s, v8.4s 0df2aa662947f8bdac6e22eac1d4a614 f0936ea0566390c4b2e7aab2dfe4a51a 5663…
27594 uminp v9.2s, v7.2s, v8.2s f64057c0e83d509913194b058eaee81a 2ccb974d3189e3a021721f57a217366c 0000…
27595 uminp v9.8h, v7.8h, v8.8h e79b083039a6caced193ecf5bfdcf70f aef9a0872691e3776e8f8e39a4a4f19c a087…
27596 uminp v9.4h, v7.4h, v8.4h 92e69dc8d8765ae4a35dddbd101ded4b 03345d9abf3f631f2e0e86045abc3904 0000…
27597 uminp v9.16b, v7.16b, v8.16b ff6d9373d5930858d6c21ebccca67b45 1e57a4a0652d910c26e34875f81ffba3 1…
27598 uminp v9.8b, v7.8b, v8.8b 5cd4876f5877a9800d943be18d206604 4fa533775f7663361782801b39171c1d 0000…
/external/vixl/test/test-trace-reference/
Dlog-disasm-colour1916 0x~~~~~~~~~~~~~~~~ 6e37ac25 uminp v5.16b, v1.16b, v23.16b
1917 0x~~~~~~~~~~~~~~~~ 2ebeaf47 uminp v7.2s, v26.2s, v30.2s
1918 0x~~~~~~~~~~~~~~~~ 2e79aca9 uminp v9.4h, v5.4h, v25.4h
1919 0x~~~~~~~~~~~~~~~~ 6ea1ad57 uminp v23.4s, v10.4s, v1.4s
1920 0x~~~~~~~~~~~~~~~~ 2e2eafa4 uminp v4.8b, v29.8b, v14.8b
1921 0x~~~~~~~~~~~~~~~~ 6e6eac15 uminp v21.8h, v0.8h, v14.8h
Dlog-disasm1916 0x~~~~~~~~~~~~~~~~ 6e37ac25 uminp v5.16b, v1.16b, v23.16b
1917 0x~~~~~~~~~~~~~~~~ 2ebeaf47 uminp v7.2s, v26.2s, v30.2s
1918 0x~~~~~~~~~~~~~~~~ 2e79aca9 uminp v9.4h, v5.4h, v25.4h
1919 0x~~~~~~~~~~~~~~~~ 6ea1ad57 uminp v23.4s, v10.4s, v1.4s
1920 0x~~~~~~~~~~~~~~~~ 2e2eafa4 uminp v4.8b, v29.8b, v14.8b
1921 0x~~~~~~~~~~~~~~~~ 6e6eac15 uminp v21.8h, v0.8h, v14.8h
Dlog-all5135 0x~~~~~~~~~~~~~~~~ 6e37ac25 uminp v5.16b, v1.16b, v23.16b
5137 0x~~~~~~~~~~~~~~~~ 2ebeaf47 uminp v7.2s, v26.2s, v30.2s
5139 0x~~~~~~~~~~~~~~~~ 2e79aca9 uminp v9.4h, v5.4h, v25.4h
5141 0x~~~~~~~~~~~~~~~~ 6ea1ad57 uminp v23.4s, v10.4s, v1.4s
5143 0x~~~~~~~~~~~~~~~~ 2e2eafa4 uminp v4.8b, v29.8b, v14.8b
5145 0x~~~~~~~~~~~~~~~~ 6e6eac15 uminp v21.8h, v0.8h, v14.8h
/external/vixl/test/aarch64/
Dtest-trace-aarch64.cc2259 __ uminp(v5.V16B(), v1.V16B(), v23.V16B()); in GenerateTestSequenceNEON() local
2260 __ uminp(v7.V2S(), v26.V2S(), v30.V2S()); in GenerateTestSequenceNEON() local
2261 __ uminp(v9.V4H(), v5.V4H(), v25.V4H()); in GenerateTestSequenceNEON() local
2262 __ uminp(v23.V4S(), v10.V4S(), v1.V4S()); in GenerateTestSequenceNEON() local
2263 __ uminp(v4.V8B(), v29.V8B(), v14.V8B()); in GenerateTestSequenceNEON() local
2264 __ uminp(v21.V8H(), v0.V8H(), v14.V8H()); in GenerateTestSequenceNEON() local
Dtest-simulator-aarch64.cc4132 DEFINE_TEST_NEON_3SAME_NO2D(uminp, Basic)
/external/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt583 # CHECK: uminp v1.8b, v15.8b, v22.8b
585 # CHECK: uminp v3.4h, v13.4h, v24.4h
587 # CHECK: uminp v5.2s, v11.2s, v26.2s
Darm64-advsimd.txt345 # CHECK: uminp.8b v0, v0, v0
/external/vixl/src/aarch64/
Dsimulator-aarch64.h2426 LogicVRegister uminp(VectorFormat vform,
Dassembler-aarch64.h2223 void uminp(const VRegister& vd, const VRegister& vn, const VRegister& vm);
Dmacro-assembler-aarch64.h2228 V(uminp, Uminp) \
Dsimulator-aarch64.cc3428 uminp(vf, rd, rn, rm); in VisitNEON3Same()
Dlogic-aarch64.cc1595 LogicVRegister Simulator::uminp(VectorFormat vform, in uminp() function in vixl::aarch64::Simulator
Dassembler-aarch64.cc2679 V(uminp, NEON_UMINP, vd.IsVector() && !vd.IsLaneSizeD()) \
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md4217 void uminp(const VRegister& vd,
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td3016 defm UMINP : SIMDThreeSameVectorBHS<1,0b10101,"uminp", int_aarch64_neon_uminp>;