/external/llvm/test/MC/Disassembler/ARM/ |
D | thumb-tests.txt | 287 # CHECK: usat16 r4, #10, r1
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D | thumb2.txt | 2532 # CHECK: usat16 r2, #2, r7 2533 # CHECK: usat16 r3, #15, r5
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D | basic-arm-instructions.txt | 2397 # CHECK: usat16 r2, #2, r7 2398 # CHECK: usat16 r3, #15, r5
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/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | thumb-tests.txt | 284 # CHECK: usat16 r4, #10, r1
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D | thumb2.txt | 2381 # CHECK: usat16 r2, #2, r7 2382 # CHECK: usat16 r3, #15, r5
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D | basic-arm-instructions.txt | 2224 # CHECK: usat16 r2, #2, r7 2225 # CHECK: usat16 r3, #15, r5
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/external/valgrind/none/tests/arm/ |
D | v6media.stdout.exp | 703 usat16 r0, #0, r1 :: rd 0x00000000 rm 0x0123abcd, carryin 0, cpsr 0x08000000 Q ge[3:0]=0000 704 usat16 r0, #1, r1 :: rd 0x00000000 rm 0xffcdabcd, carryin 0, cpsr 0x08000000 Q ge[3:0]=0000 705 usat16 r0, #5, r1 :: rd 0x001f0000 rm 0x0123feff, carryin 0, cpsr 0x08000000 Q ge[3:0]=0000 706 usat16 r0, #8, r1 :: rd 0x00ff0000 rm 0x0123abcd, carryin 0, cpsr 0x08000000 Q ge[3:0]=0000 707 usat16 r0, #11, r1 :: rd 0x07ff0000 rm 0x11110000, carryin 0, cpsr 0x08000000 Q ge[3:0]=0000 708 usat16 r0, #13, r1 :: rd 0x11110000 rm 0x1111f111, carryin 0, cpsr 0x08000000 Q ge[3:0]=0000 709 usat16 r0, #15, r1 :: rd 0x00001111 rm 0x00001111, carryin 0, cpsr 0x00000000 ge[3:0]=0000 710 usat16 r0, #0, r1 :: rd 0x00000000 rm 0xebbff82b, carryin 0, cpsr 0x08000000 Q ge[3:0]=0000 711 usat16 r0, #1, r1 :: rd 0x00000000 rm 0xebbff82b, carryin 0, cpsr 0x08000000 Q ge[3:0]=0000 712 usat16 r0, #3, r1 :: rd 0x00070000 rm 0x50c28082, carryin 0, cpsr 0x08000000 Q ge[3:0]=0000 [all …]
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | basic-arm-instructions.s | 2486 usat16 r2, #2, r7 2487 usat16 r3, #15, r5 2489 @ CHECK: usat16 r2, #2, r7 @ encoding: [0x37,0x2f,0xe2,0xe6] 2490 @ CHECK: usat16 r3, #15, r5 @ encoding: [0x35,0x3f,0xef,0xe6]
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D | basic-thumb2-instructions.s | 3034 usat16 r2, #2, r7 3035 usat16 r3, #15, r5 3037 @ CHECK: usat16 r2, #2, r7 @ encoding: [0xa7,0xf3,0x02,0x02] 3038 @ CHECK: usat16 r3, #15, r5 @ encoding: [0xa5,0xf3,0x0f,0x03]
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/external/llvm/test/MC/ARM/ |
D | basic-arm-instructions.s | 3404 usat16 r2, #2, r7 3405 usat16 r3, #15, r5 3407 @ CHECK: usat16 r2, #2, r7 @ encoding: [0x37,0x2f,0xe2,0xe6] 3408 @ CHECK: usat16 r3, #15, r5 @ encoding: [0x35,0x3f,0xef,0xe6]
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D | basic-thumb2-instructions.s | 3531 usat16 r2, #2, r7 3532 usat16 r3, #15, r5 3534 @ CHECK: usat16 r2, #2, r7 @ encoding: [0xa7,0xf3,0x02,0x02] 3535 @ CHECK: usat16 r3, #15, r5 @ encoding: [0xa5,0xf3,0x0f,0x03]
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/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 3650 void usat16(Condition cond, Register rd, uint32_t imm, Register rn); 3651 void usat16(Register rd, uint32_t imm, Register rn) { in usat16() function 3652 usat16(al, rd, imm, rn); in usat16()
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D | disasm-aarch32.h | 1296 void usat16(Condition cond, Register rd, uint32_t imm, Register rn);
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D | assembler-aarch32.cc | 12433 void Assembler::usat16(Condition cond, Register rd, uint32_t imm, Register rn) { in usat16() function in vixl::aarch32::Assembler 12452 Delegate(kUsat16, &Assembler::usat16, cond, rd, imm, rn); in usat16()
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D | disasm-aarch32.cc | 3599 void Disassembler::usat16(Condition cond, in usat16() function in vixl::aarch32::Disassembler 9430 usat16(CurrentCond(), in DecodeT32() 63918 usat16(condition, Register(rd), imm, Register(rn)); in DecodeA32()
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D | macro-assembler-aarch32.h | 5242 usat16(cond, rd, imm, rn); in Usat16()
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 2072 "usat16", "\t$Rd, $sat_imm, $Rn", []>,
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D | ARMInstrInfo.td | 3297 NoItinerary, "usat16", "\t$Rd, $sat_imm, $Rn", []> {
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 2277 "usat16", "\t$Rd, $sat_imm, $Rn", []>,
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D | ARMInstrInfo.td | 3698 NoItinerary, "usat16", "\t$Rd, $sat_imm, $Rn", []> {
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