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Searched refs:v1i128 (Results 1 – 13 of 13) sorted by relevance

/external/llvm/lib/Target/PowerPC/
DREADME_P9.txt101 (set v1i128:$rD, (int_ppc_altivec_vprtybq v1i128:$vB))
134 VX1_Int_Ty<513, "vmul10uq", int_ppc_altivec_vmul10uq, v1i128>;
135 VX1_Int_Ty< 1, "vmul10cuq", int_ppc_altivec_vmul10cuq, v1i128>;
140 VX1_Int_Ty<577, "vmul10euq", int_ppc_altivec_vmul10euq, v1i128>;
141 VX1_Int_Ty< 65, "vmul10ecuq", int_ppc_altivec_vmul10ecuq, v1i128>;
146 (set v1i128:$vD, (int_ppc_altivec_bcdcfno v1i128:$vB, i1:$PS))
147 (set v1i128:$vD, (int_ppc_altivec_bcdcfzo v1i128:$vB, i1:$PS))
148 (set v1i128:$vD, (int_ppc_altivec_bcdctno v1i128:$vB))
149 (set v1i128:$vD, (int_ppc_altivec_bcdctzo v1i128:$vB, i1:$PS))
150 (set v1i128:$vD, (int_ppc_altivec_bcdcfsqo v1i128:$vB, i1:$PS))
[all …]
DPPCInstrAltivec.td859 def : Pat<(v16i8 (bitconvert (v1i128 VRRC:$src))), (v16i8 VRRC:$src)>;
865 def : Pat<(v8i16 (bitconvert (v1i128 VRRC:$src))), (v8i16 VRRC:$src)>;
871 def : Pat<(v4i32 (bitconvert (v1i128 VRRC:$src))), (v4i32 VRRC:$src)>;
877 def : Pat<(v4f32 (bitconvert (v1i128 VRRC:$src))), (v4f32 VRRC:$src)>;
883 def : Pat<(v2i64 (bitconvert (v1i128 VRRC:$src))), (v2i64 VRRC:$src)>;
885 def : Pat<(v1i128 (bitconvert (v16i8 VRRC:$src))), (v1i128 VRRC:$src)>;
886 def : Pat<(v1i128 (bitconvert (v8i16 VRRC:$src))), (v1i128 VRRC:$src)>;
887 def : Pat<(v1i128 (bitconvert (v4i32 VRRC:$src))), (v1i128 VRRC:$src)>;
888 def : Pat<(v1i128 (bitconvert (v4f32 VRRC:$src))), (v1i128 VRRC:$src)>;
889 def : Pat<(v1i128 (bitconvert (v2i64 VRRC:$src))), (v1i128 VRRC:$src)>;
[all …]
DPPCCallingConv.td68 CCIfType<[v16i8, v8i16, v4i32, v2i64, v1i128, v4f32],
121 CCIfType<[v16i8, v8i16, v4i32, v2i64, v1i128, v4f32],
190 CCIfType<[v16i8, v8i16, v4i32, v2i64, v1i128, v4f32],
DPPCRegisterInfo.td291 def VRRC : RegisterClass<"PPC", [v16i8,v8i16,v4i32,v2i64,v1i128,v4f32], 128,
DPPCISelLowering.cpp425 if (Subtarget.hasP8Altivec() && (VT.SimpleTy != MVT::v1i128)) { in PPCTargetLowering()
666 addRegisterClass(MVT::v1i128, &PPC::VRRCRegClass); in PPCTargetLowering()
2760 ArgVT == MVT::v1i128) in CalculateStackSlotAlignment()
2840 ArgVT == MVT::v1i128) in CalculateStackSlotUsed()
3432 case MVT::v1i128: in LowerFormalArguments_64SVR4()
5077 case MVT::v1i128: in LowerCall_64SVR4()
5450 case MVT::v1i128: in LowerCall_64SVR4()
DPPCInstrVSX.td923 def : Pat<(v2f64 (bitconvert v1i128:$A)),
925 def : Pat<(v1i128 (bitconvert v2f64:$A)),
/external/llvm/include/llvm/CodeGen/
DMachineValueType.h102 v1i128 = 51, // 1 x i128 enumerator
105 LAST_INTEGER_VECTOR_VALUETYPE = v1i128,
251 SimpleTy == MVT::v1i128 || SimpleTy == MVT::v8f16 || in is128BitVector()
355 case v1i128: return i128; in getVectorElementType()
423 case v1i128: in getVectorNumElements()
486 case v1i128: in getSizeInBits()
641 if (NumElements == 1) return MVT::v1i128; in getVectorVT()
DValueTypes.td79 def v1i128 : ValueType<128, 51>; // 1 x i128 vector value
/external/clang/test/CodeGen/
Dsystemz-abi-vector.c31 typedef __attribute__((vector_size(16))) __int128 v1i128; typedef
102 v1i128 pass_v1i128(v1i128 arg) { return arg; } in pass_v1i128()
/external/llvm/lib/IR/
DValueTypes.cpp183 case MVT::v1i128: return "v1i128"; in getEVTString()
261 case MVT::v1i128: return VectorType::get(Type::getInt128Ty(Context), 1); in getTypeForEVT()
/external/llvm/utils/TableGen/
DCodeGenTarget.cpp111 case MVT::v1i128: return "MVT::v1i128"; in getEnumName()
/external/llvm/include/llvm/IR/
DIntrinsics.td212 def llvm_v1i128_ty : LLVMType<v1i128>; // 1 x i128
DIntrinsicsPowerPC.td124 /// PowerPC_Vec_QQQ_Intrinsic - A PowerPC intrinsic that takes two v1i128