Searched refs:v_addc_u32 (Results 1 – 8 of 8) sorted by relevance
/external/llvm/test/CodeGen/AMDGPU/ |
D | add_i64.ll | 8 ; SI: v_addc_u32 23 ; SI: v_addc_u32 36 ; SI: v_addc_u32 58 ; SI: v_addc_u32 60 ; SI: v_addc_u32
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D | saddo.ll | 53 ; SI: v_addc_u32
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D | split-scalar-i64-add.ll | 37 ; SI: v_addc_u32
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D | uaddo.ll | 72 ; SI: v_addc_u32
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D | add.ll | 139 ; The v_addc_u32 and v_add_i32 instruction can't read SGPRs, because they
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/external/llvm/test/MC/AMDGPU/ |
D | vop2.s | 323 v_addc_u32 v1, vcc, v2, v3, vcc label 332 v_addc_u32 v1, s[0:1], v2, v3, vcc label 336 v_addc_u32 v1, s[0:1], v2, v3, s[2:3] label
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D | vop2-err.s | 65 v_addc_u32 v1, s[0:1], v2, v3, 123 label
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/external/llvm/lib/Target/AMDGPU/ |
D | SIInstructions.td | 1577 defm V_ADDC_U32 : VOP2bInst <vop2<0x28, 0x1c>, "v_addc_u32",
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