/external/llvm/test/CodeGen/X86/ |
D | avx512-scalar.ll | 5 ; AVX512: vdivss %xmm{{.*}} ## encoding: [0x62 7 ; AVX: vdivss %xmm{{.*}} ## encoding: [0xc5
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D | sse-scalar-fp-arith.ll | 70 ; AVX-NEXT: vdivss %xmm1, %xmm0, %xmm0 254 ; AVX-NEXT: vdivss %xmm0, %xmm1, %xmm0 406 ; AVX-NEXT: vdivss %xmm1, %xmm0, %xmm1 407 ; AVX-NEXT: vdivss %xmm1, %xmm0, %xmm0 482 ; AVX-NEXT: vdivss %xmm1, %xmm0, %xmm0 620 ; AVX-NEXT: vdivss %xmm1, %xmm0, %xmm0 744 ; AVX-NEXT: vdivss %xmm0, %xmm1, %xmm0 868 ; AVX-NEXT: vdivss %xmm1, %xmm0, %xmm0 992 ; AVX-NEXT: vdivss %xmm0, %xmm1, %xmm0
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D | fold-load-binops.ll | 119 ; AVX-NEXT: vdivss (%rdi), %xmm0, %xmm0
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D | machine-combiner.ll | 137 ; AVX-NEXT: vdivss %xmm1, %xmm0, %xmm0 159 ; AVX-NEXT: vdivss %xmm1, %xmm0, %xmm0 373 ; AVX-NEXT: vdivss %xmm1, %xmm0, %xmm0 397 ; AVX-NEXT: vdivss %xmm1, %xmm0, %xmm0
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D | sse-intrinsics-x86.ll | 239 ; KNL-NEXT: vdivss %xmm1, %xmm0, %xmm0
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D | stack-folding-fp-avx1.ll | 842 …;CHECK: vdivss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9]*}} {{.*#+}} 4-byte … 850 …;CHECK: vdivss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte…
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D | avx-intrinsics-x86.ll | 2538 ; AVX-NEXT: vdivss %xmm1, %xmm0, %xmm0 2543 ; AVX512VL-NEXT: vdivss %xmm1, %xmm0, %xmm0
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/external/v8/src/ia32/ |
D | assembler-ia32.h | 1298 void vdivss(XMMRegister dst, XMMRegister src1, XMMRegister src2) { in vdivss() function 1299 vdivss(dst, src1, Operand(src2)); in vdivss() 1301 void vdivss(XMMRegister dst, XMMRegister src1, const Operand& src2) { in vdivss() function
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/external/llvm/test/MC/X86/ |
D | avx512-encodings.s | 6529 vdivss %xmm17, %xmm6, %xmm21 6533 vdivss %xmm17, %xmm6, %xmm21 {%k5} 6537 vdivss %xmm17, %xmm6, %xmm21 {%k5} {z} 6541 vdivss {rn-sae}, %xmm17, %xmm6, %xmm21 6545 vdivss {ru-sae}, %xmm17, %xmm6, %xmm21 6549 vdivss {rd-sae}, %xmm17, %xmm6, %xmm21 6553 vdivss {rz-sae}, %xmm17, %xmm6, %xmm21 6557 vdivss (%rcx), %xmm6, %xmm21 6561 vdivss 291(%rax,%r14,8), %xmm6, %xmm21 6565 vdivss 508(%rdx), %xmm6, %xmm21 [all …]
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D | x86-32-avx.s | 17 vdivss %xmm4, %xmm6, %xmm2 49 vdivss 3735928559(%ebx,%ecx,8), %xmm2, %xmm5
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D | intel-syntax-avx512.s | 2950 vdivss xmm21, xmm6, xmm17 2954 vdivss xmm21 {k5}, xmm6, xmm17 2958 vdivss xmm21 {k5} {z}, xmm6, xmm17 2962 vdivss xmm21, xmm6, xmm17, {rn-sae} 2966 vdivss xmm21, xmm6, xmm17, {ru-sae} 2970 vdivss xmm21, xmm6, xmm17, {rd-sae} 2974 vdivss xmm21, xmm6, xmm17, {rz-sae} 2978 vdivss xmm21, xmm6, dword ptr [rcx] 2982 vdivss xmm21, xmm6, dword ptr [rax + 8*r14 + 291] 2986 vdivss xmm21, xmm6, dword ptr [rdx + 508] [all …]
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D | x86_64-avx-encoding.s | 17 vdivss %xmm8, %xmm9, %xmm10 label 49 vdivss -4(%rcx,%rbx,8), %xmm10, %xmm11 label
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/external/swiftshader/third_party/LLVM/test/MC/X86/ |
D | x86_64-avx-encoding.s | 17 vdivss %xmm8, %xmm9, %xmm10 label 49 vdivss -4(%rcx,%rbx,8), %xmm10, %xmm11 label
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D | x86-32-avx.s | 17 vdivss %xmm4, %xmm6, %xmm2 49 vdivss 3735928559(%ebx,%ecx,8), %xmm2, %xmm5
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/external/v8/src/compiler/ia32/ |
D | code-generator-ia32.cc | 1295 __ vdivss(i.OutputDoubleRegister(), i.InputDoubleRegister(0), in AssembleArchInstruction() local
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/external/v8/src/compiler/x64/ |
D | code-generator-x64.cc | 1751 ASSEMBLE_AVX_BINOP(vdivss); in AssembleArchInstruction()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86GenAsmMatcher.inc | 5294 { X86::VDIVSSrr, "vdivss", Convert__Reg1_2__Reg1_1__Reg1_0, { MCK_FR32, MCK_FR32, MCK_FR32 }, 0}, 5295 { X86::VDIVSSrm, "vdivss", Convert__Reg1_2__Reg1_1__Mem5_0, { MCK_Mem, MCK_FR32, MCK_FR32 }, 0},
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D | X86GenAsmWriter1.inc | 3968 "\000vdivps\t\000vdivsd\t\000vdivss\t\000vdppd\t\000vdpps\t\000verr\t\000"
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/external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
D | avx-intrinsics-x86.ll | 1499 ; CHECK: vdivss
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