| /external/llvm/test/MC/ARM/ |
| D | vfp4.s | 7 @ ARM: vfma.f64 d16, d18, d17 @ encoding: [0xa1,0x0b,0xe2,0xee]
8 @ THUMB: vfma.f64 d16, d18, d17 @ encoding: [0xe2,0xee,0xa1,0x0b]
10 @ THUMB_V7EM-ERRORS-NEXT: vfma.f64 d16, d18, d17
11 vfma.f64 d16, d18, d17
13 @ ARM: vfma.f32 s2, s4, s0 @ encoding: [0x00,0x1a,0xa2,0xee]
14 @ THUMB: vfma.f32 s2, s4, s0 @ encoding: [0xa2,0xee,0x00,0x1a]
15 @ THUMB_V7EM: vfma.f32 s2, s4, s0 @ encoding: [0xa2,0xee,0x00,0x1a]
16 vfma.f32 s2, s4, s0
18 @ ARM: vfma.f32 d16, d18, d17 @ encoding: [0xb1,0x0c,0x42,0xf2]
19 @ THUMB: vfma.f32 d16, d18, d17 @ encoding: [0x42,0xef,0xb1,0x0c]
[all …]
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| D | fullfp16-neon.s | 60 vfma.f16 d0, d1, d2
61 vfma.f16 q0, q1, q2
62 @ ARM: vfma.f16 d0, d1, d2 @ encoding: [0x12,0x0c,0x11,0xf2]
63 @ ARM: vfma.f16 q0, q1, q2 @ encoding: [0x54,0x0c,0x12,0xf2]
64 @ THUMB: vfma.f16 d0, d1, d2 @ encoding: [0x11,0xef,0x12,0x0c]
65 @ THUMB: vfma.f16 q0, q1, q2 @ encoding: [0x12,0xef,0x54,0x0c]
|
| D | fullfp16.s | 197 vfma.f16 s2, s7, s4
198 @ ARM: vfma.f16 s2, s7, s4 @ encoding: [0x82,0x19,0xa3,0xee]
199 @ THUMB: vfma.f16 s2, s7, s4 @ encoding: [0xa3,0xee,0x82,0x19]
|
| D | single-precision-fp.s | 25 vfma.f64 d1, d2, d3
38 @ CHECK-ERRORS-NEXT: vfma.f64 d1, d2, d3
|
| D | fullfp16-neon-neg.s | 46 vfma.f16 d0, d1, d2
47 vfma.f16 q0, q1, q2
|
| D | fullfp16-neg.s | 146 vfma.f16 s2, s7, s4
|
| /external/llvm/test/CodeGen/ARM/ |
| D | fp-fast.ll | 6 ; CHECK-NOT: vfma
8 ; CHECK-NOT: vfma
17 ; CHECK: vfma.f32
26 ; CHECK-NOT: vfma
28 ; CHECK-NOT: vfma
35 ; CHECK-NOT: vfma
37 ; CHECK-NOT: vfma
44 ; CHECK-NOT: vfma
46 ; CHECK-NOT: vfma
53 ; CHECK-NOT: vfma
[all …]
|
| D | fusedMAC.ll | 6 ;CHECK: vfma.f64
14 ;CHECK: vfma.f32
72 ;CHECK: vfma.f32
88 ;CHECK: vfma.f32
105 ; CHECK: vfma.f32
113 ; CHECK: vfma.f64
121 ; CHECK: vfma.f32
194 ; CHECK-NOT: vfma
204 ; CHECK: vfma.f32 {{s[0-9]+}}, {{s[0-9]+}}, [[R1]]
212 ; CHECK: vfma.f32
[all …]
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| D | neon-fma.ll | 4 ; CHECK: vfma.f32 {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}
13 ; CHECK: vfma.f32 {{q[0-9]+}}, {{q[0-9]+}}, {{q[0-9]+}}
|
| D | 2013-02-27-expand-vfma.ll | 12 ; CHECK-VFP4: vfma.f32
25 ; CHECK-VFP4: vfma.f32
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | vfp4.txt | 3 # CHECK: vfma.f64 d16, d18, d17
6 # CHECK: vfma.f32 s2, s4, s0
9 # CHECK: vfma.f32 d16, d18, d17
12 # CHECK: vfma.f32 q2, q4, q0
|
| D | fullfp16-neon-thumb.txt | 44 # CHECK: vfma.f16 d0, d1, d2
45 # CHECK: vfma.f16 q0, q1, q2
|
| D | fullfp16-neon-arm.txt | 44 # CHECK: vfma.f16 d0, d1, d2
45 # CHECK: vfma.f16 q0, q1, q2
|
| D | fullfp16-thumb.txt | 145 # CHECK: vfma.f16 s2, s7, s4
|
| D | fullfp16-arm.txt | 145 # CHECK: vfma.f16 s2, s7, s4
|
| /external/llvm/test/CodeGen/Thumb2/ |
| D | float-intrinsics-float.ll | 102 ; HARD: vfma.f32
|
| D | float-intrinsics-double.ll | 102 ; HARD: vfma.f64
|
| /external/clang/include/clang/Basic/ |
| D | arm_neon.td | 342 def OP_FMLS : Op<(call "vfma", $p0, (op "-", $p1), $p2)>;
350 def OP_FMLA_N : Op<(call "vfma", $p0, $p1, (dup $p2))>;
351 def OP_FMLS_N : Op<(call "vfma", $p0, (op "-", $p1), (dup $p2))>;
831 def VFMA : SInst<"vfma", "dddd", "fQf">;
916 def FMLA : SInst<"vfma", "dddd", "dQd">;
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 4377 void vfma(
4379 void vfma(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vfma() function
4380 vfma(al, dt, rd, rn, rm); in vfma()
4383 void vfma(
4385 void vfma(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vfma() function
4386 vfma(al, dt, rd, rn, rm); in vfma()
4389 void vfma(
4391 void vfma(DataType dt, SRegister rd, SRegister rn, SRegister rm) { in vfma() function
4392 vfma(al, dt, rd, rn, rm); in vfma()
|
| D | disasm-aarch32.h | 1683 void vfma(
1686 void vfma(
1689 void vfma(
|
| D | disasm-aarch32.cc | 4822 void Disassembler::vfma( in vfma() function in vixl::aarch32::Disassembler
4829 void Disassembler::vfma( in vfma() function in vixl::aarch32::Disassembler
4836 void Disassembler::vfma( in vfma() function in vixl::aarch32::Disassembler
23697 vfma(CurrentCond(), in DecodeT32()
23723 vfma(CurrentCond(), in DecodeT32()
30294 vfma(CurrentCond(), in DecodeT32()
31035 vfma(CurrentCond(), in DecodeT32()
40575 vfma(al, F32, DRegister(rd), DRegister(rn), DRegister(rm)); in DecodeA32()
40614 vfma(al, F32, QRegister(rd), QRegister(rn), QRegister(rm)); in DecodeA32()
66419 vfma(condition, in DecodeA32()
[all …]
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| D | assembler-aarch32.cc | 16418 void Assembler::vfma( in vfma() function in vixl::aarch32::Assembler
16455 Delegate(kVfma, &Assembler::vfma, cond, dt, rd, rn, rm); in vfma()
16458 void Assembler::vfma( in vfma() function in vixl::aarch32::Assembler
16482 Delegate(kVfma, &Assembler::vfma, cond, dt, rd, rn, rm); in vfma()
16485 void Assembler::vfma( in vfma() function in vixl::aarch32::Assembler
16505 Delegate(kVfma, &Assembler::vfma, cond, dt, rd, rn, rm); in vfma()
|
| D | macro-assembler-aarch32.h | 6961 vfma(cond, dt, rd, rn, rm); in Vfma()
6976 vfma(cond, dt, rd, rn, rm); in Vfma()
6991 vfma(cond, dt, rd, rn, rm); in Vfma()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrVFP.td | 1837 IIC_fpFMAC64, "vfma", ".f64\t$Dd, $Dn, $Dm",
1845 IIC_fpFMAC32, "vfma", ".f32\t$Sd, $Sn, $Sm",
1856 IIC_fpFMAC16, "vfma", ".f16\t$Sd, $Sn, $Sm",
|
| D | ARMInstrNEON.td | 4616 def VFMAfd : N3VDMulOp<0, 0, 0b00, 0b1100, 1, IIC_VFMACD, "vfma", "f32",
4620 def VFMAfq : N3VQMulOp<0, 0, 0b00, 0b1100, 1, IIC_VFMACQ, "vfma", "f32",
4623 def VFMAhd : N3VDMulOp<0, 0, 0b01, 0b1100, 1, IIC_VFMACD, "vfma", "f16",
4627 def VFMAhq : N3VQMulOp<0, 0, 0b01, 0b1100, 1, IIC_VFMACQ, "vfma", "f16",
|