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Searched refs:vmovss (Results 1 – 25 of 58) sorted by relevance

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/external/llvm/test/CodeGen/X86/
Dfma-scalar-memfold.ll17 ; CHECK: vmovss (%rcx), %[[XMM:xmm[0-9]+]]
19 ; CHECK-NEXT: vmovss %[[XMM]], (%rcx)
42 ; CHECK: vmovss (%rcx), %[[XMM:xmm[0-9]+]]
44 ; CHECK-NEXT: vmovss %[[XMM]], (%rcx)
67 ; CHECK: vmovss (%rcx), %[[XMM:xmm[0-9]+]]
69 ; CHECK-NEXT: vmovss %[[XMM]], (%rcx)
92 ; CHECK: vmovss (%rcx), %[[XMM:xmm[0-9]+]]
94 ; CHECK-NEXT: vmovss %[[XMM]], (%rcx)
117 ; CHECK: vmovss (%rcx), %[[XMM:xmm[0-9]+]]
119 ; CHECK-NEXT: vmovss %[[XMM]], (%rcx)
[all …]
Dfunction-subtarget-features.ll5 ; In this case avx has a vmovss instruction and otherwise we should be using movss
15 ; CHECK: vmovss
39 ; CHECK: vmovss
Dlower-vec-shift.ll21 ; AVX-NEXT: vmovss
24 ; AVX2-NEXT: vmovss
55 ; AVX-NEXT: vmovss
107 ; AVX-NEXT: vmovss
Df16c-intrinsics-fast-isel.ll14 ; X32-NEXT: vmovss %xmm0, (%esp)
41 ; X32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
43 ; X32-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
52 ; X64-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
Davx-load-store.ll28 ;; + ins_subvec+ zext into only a single vmovss or vmovsd or vinsertps from memory
33 ; CHECK: vmovss (%
94 ; CHECK-O0: vmovss LCPI
96 ; CHECK-O0: vmovss %xmm
Davx512-build-vector.ll19 ; CHECK-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3]
20 ; CHECK-NEXT: vmovss {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
Dload-slice.ll21 ; STRESS: vmovss 64([[BASE:[^(]+]]), [[OUT_Real:%xmm[0-9]+]]
25 ; STRESS-NEXT: vmovss 68([[BASE]]), [[OUT_Imm:%xmm[0-9]+]]
36 ; REGULAR: vmovss 64([[BASE:[^)]+]]), [[OUT_Real:%xmm[0-9]+]]
40 ; REGULAR-NEXT: vmovss 68([[BASE]]), [[OUT_Imm:%xmm[0-9]+]]
Dfold-load-unops.ll16 ; AVX-NEXT: vmovss (%rdi), %xmm0
35 ; AVX-NEXT: vmovss (%rdi), %xmm0
54 ; AVX-NEXT: vmovss (%rdi), %xmm0
Dfma-do-not-commute.ll12 ; CHECK: vmovss (%rsi), [[ADDR2:%xmm[0-9]+]]
Dfastmath-float-half-conversion.ll21 ; F16C-NEXT: vmovss
Dfast-isel-fptrunc-fpext.ll46 ; AVX: vmovss (%rdi), %xmm0
Dlogical-load-fold.ll44 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
Dvector-shuffle-variable-256.ll223 ; AVX1-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
224 ; AVX1-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
225 ; AVX1-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
229 ; AVX1-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero
295 ; ALL-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
296 ; ALL-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
297 ; ALL-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
301 ; ALL-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero
Davx512vl-vbroadcast.ll12 ; CHECK-NEXT: vmovss %xmm0, {{[0-9]+}}(%rsp) # 4-byte Folded Spill
31 ; CHECK-NEXT: vmovss %xmm0, {{[0-9]+}}(%rsp) # 4-byte Folded Spill
Dfp-trunc.ll22 ; AVX-NEXT: vmovss %xmm0, (%esp)
Dfp-load-trunc.ll22 ; AVX-NEXT: vmovss %xmm0, (%esp)
Davx512-unsafe-fp-math.ll81 ; CHECK-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
Davx-basic.ll130 ; CHECK-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
Dmerge-consecutive-loads-128.ll100 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
717 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
761 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
762 ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
Davx-intrinsics-fast-isel.ll2271 ; X32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2272 ; X32-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
2273 ; X32-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
2274 ; X32-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero
2275 ; X32-NEXT: vmovss {{.*#+}} xmm4 = mem[0],zero,zero,zero
2276 ; X32-NEXT: vmovss {{.*#+}} xmm5 = mem[0],zero,zero,zero
2277 ; X32-NEXT: vmovss {{.*#+}} xmm6 = mem[0],zero,zero,zero
2278 ; X32-NEXT: vmovss {{.*#+}} xmm7 = mem[0],zero,zero,zero
2474 ; X32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2908 ; X32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
[all …]
Davx512-select.ll42 ; CHECK-NEXT: vmovss %xmm2, %xmm0, %xmm1 {%k1}
Davx512-cmp.ll77 ; ALL-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
Dvec_fptrunc.ll23 ; X32-AVX-NEXT: vmovss %xmm0, (%eax)
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Davx-load-store.ll28 ;; + ins_subvec+ zext into only a single vmovss or vmovsd
30 ; CHECK: vmovss (%
85 ; CHECK-O0: vmovss LCPI
87 ; CHECK-O0: vmovss %xmm
/external/llvm/test/MC/X86/
Dx86_64-avx-encoding.s261 vmovss -4(%rbx,%rcx,8), %xmm10
265 vmovss %xmm14, %xmm10, %xmm15
4227 vmovss %xmm0, %xmm0, %xmm8
4231 vmovss %xmm0, %xmm8, %xmm0
4235 vmovss %xmm8, %xmm0, %xmm0

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