/external/llvm/test/CodeGen/X86/ |
D | recip-fastmath.ll | 25 ; RECIP: vmulss 27 ; RECIP: vmulss 33 ; REFINE: vmulss 35 ; REFINE: vmulss 37 ; REFINE: vmulss 39 ; REFINE: vmulss
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D | sqrt-fastmath.ll | 37 ; ESTIMATE-NEXT: vmulss %xmm1, %xmm0, %xmm2 38 ; ESTIMATE-NEXT: vmulss %xmm1, %xmm2, %xmm1 40 ; ESTIMATE-NEXT: vmulss {{.*}}(%rip), %xmm2, %xmm2 41 ; ESTIMATE-NEXT: vmulss %xmm1, %xmm2, %xmm1 80 ; ESTIMATE-NEXT: vmulss %xmm1, %xmm1, %xmm2 81 ; ESTIMATE-NEXT: vmulss %xmm2, %xmm0, %xmm0 83 ; ESTIMATE-NEXT: vmulss {{.*}}(%rip), %xmm1, %xmm1 84 ; ESTIMATE-NEXT: vmulss %xmm0, %xmm1, %xmm0
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D | fp-fast.ll | 7 ; CHECK-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0 17 ; CHECK-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0 28 ; CHECK-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0 39 ; CHECK-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0 50 ; CHECK-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0
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D | dagcombine-unsafe-math.ll | 22 ; CHECK: vmulss LCPI1_0(%rip), %xmm0, %xmm0 32 ; CHECK: vmulss LCPI2_0(%rip), %xmm0, %xmm0
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D | dag-fmf-cse.ll | 12 ; CHECK-NEXT: vmulss %xmm1, %xmm0, %xmm0
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D | sse-scalar-fp-arith.ll | 53 ; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0 236 ; AVX-NEXT: vmulss %xmm0, %xmm1, %xmm0 385 ; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm1 386 ; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0 464 ; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0 605 ; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0 728 ; AVX-NEXT: vmulss %xmm0, %xmm1, %xmm0 853 ; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0 976 ; AVX-NEXT: vmulss %xmm0, %xmm1, %xmm0
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D | fnabs.ll | 21 ; CHECK: vmulss
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D | fold-load-binops.ll | 85 ; AVX-NEXT: vmulss (%rdi), %xmm0, %xmm0
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D | machine-combiner.ll | 160 ; AVX-NEXT: vmulss %xmm3, %xmm2, %xmm1 161 ; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0
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D | sse-intrinsics-x86.ll | 355 ; KNL-NEXT: vmulss %xmm1, %xmm0, %xmm0
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D | stack-folding-fp-avx1.ll | 1241 …;CHECK: vmulss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9]*}} {{.*#+}} 4-byte … 1249 …;CHECK: vmulss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}}, {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte…
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D | avx-intrinsics-x86.ll | 2654 ; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0 2659 ; AVX512VL-NEXT: vmulss %xmm1, %xmm0, %xmm0
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/external/v8/src/ia32/ |
D | assembler-ia32.h | 1292 void vmulss(XMMRegister dst, XMMRegister src1, XMMRegister src2) { in vmulss() function 1293 vmulss(dst, src1, Operand(src2)); in vmulss() 1295 void vmulss(XMMRegister dst, XMMRegister src1, const Operand& src2) { in vmulss() function
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/external/llvm/test/MC/X86/ |
D | avx512-encodings.s | 6841 vmulss %xmm14, %xmm10, %xmm22 6845 vmulss %xmm14, %xmm10, %xmm22 {%k4} 6849 vmulss %xmm14, %xmm10, %xmm22 {%k4} {z} 6853 vmulss {rn-sae}, %xmm14, %xmm10, %xmm22 6857 vmulss {ru-sae}, %xmm14, %xmm10, %xmm22 6861 vmulss {rd-sae}, %xmm14, %xmm10, %xmm22 6865 vmulss {rz-sae}, %xmm14, %xmm10, %xmm22 6869 vmulss (%rcx), %xmm10, %xmm22 6873 vmulss 291(%rax,%r14,8), %xmm10, %xmm22 6877 vmulss 508(%rdx), %xmm10, %xmm22 [all …]
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D | x86-32-avx.s | 9 vmulss %xmm4, %xmm6, %xmm2 45 vmulss 3735928559(%ebx,%ecx,8), %xmm2, %xmm5
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D | intel-syntax-avx512.s | 9145 vmulss xmm22, xmm10, xmm14 9149 vmulss xmm22 {k4}, xmm10, xmm14 9153 vmulss xmm22 {k4} {z}, xmm10, xmm14 9157 vmulss xmm22, xmm10, xmm14, {rn-sae} 9161 vmulss xmm22, xmm10, xmm14, {ru-sae} 9165 vmulss xmm22, xmm10, xmm14, {rd-sae} 9169 vmulss xmm22, xmm10, xmm14, {rz-sae} 9173 vmulss xmm22, xmm10, dword ptr [rcx] 9177 vmulss xmm22, xmm10, dword ptr [rax + 8*r14 + 291] 9181 vmulss xmm22, xmm10, dword ptr [rdx + 508] [all …]
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D | x86_64-avx-encoding.s | 9 vmulss %xmm8, %xmm9, %xmm10 label 45 vmulss -4(%rcx,%rbx,8), %xmm10, %xmm11 label
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/external/swiftshader/third_party/LLVM/test/MC/X86/ |
D | x86_64-avx-encoding.s | 9 vmulss %xmm8, %xmm9, %xmm10 label 45 vmulss -4(%rcx,%rbx,8), %xmm10, %xmm11 label
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D | x86-32-avx.s | 9 vmulss %xmm4, %xmm6, %xmm2 45 vmulss 3735928559(%ebx,%ecx,8), %xmm2, %xmm5
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/external/v8/src/compiler/ia32/ |
D | code-generator-ia32.cc | 1289 __ vmulss(i.OutputDoubleRegister(), i.InputDoubleRegister(0), in AssembleArchInstruction() local
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/external/v8/src/compiler/x64/ |
D | code-generator-x64.cc | 1748 ASSEMBLE_AVX_BINOP(vmulss); in AssembleArchInstruction()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86GenAsmMatcher.inc | 5647 { X86::VMULSSrr, "vmulss", Convert__Reg1_2__Reg1_1__Reg1_0, { MCK_FR32, MCK_FR32, MCK_FR32 }, 0}, 5648 { X86::VMULSSrm, "vmulss", Convert__Reg1_2__Reg1_1__Mem5_0, { MCK_Mem, MCK_FR32, MCK_FR32 }, 0},
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D | X86GenAsmWriter.inc | 4041 "mulps\t\000vmulsd\t\000vmulss\t\000vmwritel\t\000vmwriteq\t\000vmxoff\000"
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/external/libyuv/files/source/ |
D | row_win.cc | 6108 vmulss xmm4, xmm4, kExpBias
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/external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
D | avx-intrinsics-x86.ll | 1574 ; CHECK: vmulss
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