| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | neon-sub-encoding.s | 65 @ CHECK: vqsub.s8 d16, d16, d17 @ encoding: [0xb1,0x02,0x40,0xf2]
66 vqsub.s8 d16, d16, d17
67 @ CHECK: vqsub.s16 d16, d16, d17 @ encoding: [0xb1,0x02,0x50,0xf2]
68 vqsub.s16 d16, d16, d17
69 @ CHECK: vqsub.s32 d16, d16, d17 @ encoding: [0xb1,0x02,0x60,0xf2]
70 vqsub.s32 d16, d16, d17
71 @ CHECK: vqsub.s64 d16, d16, d17 @ encoding: [0xb1,0x02,0x70,0xf2]
72 vqsub.s64 d16, d16, d17
73 @ CHECK: vqsub.u8 d16, d16, d17 @ encoding: [0xb1,0x02,0x40,0xf3]
74 vqsub.u8 d16, d16, d17
[all …]
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| /external/llvm/test/MC/ARM/ |
| D | neon-sub-encoding.s | 91 @ CHECK: vqsub.s8 d16, d16, d17 @ encoding: [0xb1,0x02,0x40,0xf2]
92 vqsub.s8 d16, d16, d17
93 @ CHECK: vqsub.s16 d16, d16, d17 @ encoding: [0xb1,0x02,0x50,0xf2]
94 vqsub.s16 d16, d16, d17
95 @ CHECK: vqsub.s32 d16, d16, d17 @ encoding: [0xb1,0x02,0x60,0xf2]
96 vqsub.s32 d16, d16, d17
97 @ CHECK: vqsub.s64 d16, d16, d17 @ encoding: [0xb1,0x02,0x70,0xf2]
98 vqsub.s64 d16, d16, d17
99 @ CHECK: vqsub.u8 d16, d16, d17 @ encoding: [0xb1,0x02,0x40,0xf3]
100 vqsub.u8 d16, d16, d17
[all …]
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| D | vqsub.ll | 5 ;CHECK: vqsub.s8
14 ;CHECK: vqsub.s16
23 ;CHECK: vqsub.s32
32 ;CHECK: vqsub.s64
41 ;CHECK: vqsub.u8
50 ;CHECK: vqsub.u16
59 ;CHECK: vqsub.u32
68 ;CHECK: vqsub.u64
77 ;CHECK: vqsub.s8
86 ;CHECK: vqsub.s16
[all …]
|
| /external/llvm/test/CodeGen/ARM/ |
| D | vqsub.ll | 5 ;CHECK: vqsub.s8
14 ;CHECK: vqsub.s16
23 ;CHECK: vqsub.s32
32 ;CHECK: vqsub.s64
41 ;CHECK: vqsub.u8
50 ;CHECK: vqsub.u16
59 ;CHECK: vqsub.u32
68 ;CHECK: vqsub.u64
77 ;CHECK: vqsub.s8
86 ;CHECK: vqsub.s16
[all …]
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-arith-saturating.ll | 49 %vqsub.i = tail call i32 @llvm.aarch64.neon.sqsub.i32(i32 %vecext, i32 %vecext1) nounwind
50 ret i32 %vqsub.i
58 %vqsub.i = tail call i64 @llvm.aarch64.neon.sqsub.i64(i64 %vecext, i64 %vecext1) nounwind
59 ret i64 %vqsub.i
67 %vqsub.i = tail call i32 @llvm.aarch64.neon.uqsub.i32(i32 %vecext, i32 %vecext1) nounwind
68 ret i32 %vqsub.i
76 %vqsub.i = tail call i64 @llvm.aarch64.neon.uqsub.i64(i64 %vecext, i64 %vecext1) nounwind
77 ret i64 %vqsub.i
|
| /external/libhevc/common/arm/ |
| D | ihevc_deblk_luma_horz.s | 194 vqsub.u8 d31,d26,d1
209 vqsub.u8 d17,d27,d1
230 vqsub.u8 d31,d28,d1
275 vqsub.u8 d31,d25,d1
283 vqsub.u8 d17,d24,d1
371 vqsub.u8 d31,d23,d1
|
| D | ihevc_deblk_luma_vert.s | 195 vqsub.u8 d30,d7,d19
235 vqsub.u8 d31,d5,d19
246 vqsub.u8 d25,d4,d19
272 vqsub.u8 d31,d2,d19
283 vqsub.u8 d28,d3,d19
295 vqsub.u8 d31,d6,d19
|
| /external/libvpx/libvpx/vpx_dsp/arm/ |
| D | loopfilter_4_neon.asm | 209 vqsub.s8 d27, d5, d16 ; filter = clamp(ps1-qs1)
232 vqsub.s8 d26, d7, d27 ; u = clamp(qs0 - filter1)
242 vqsub.s8 d20, d16, d27 ; u = clamp(qs1 - filter)
502 vqsub.s8 q1, q5, q8 ; filter = clamp(ps1-qs1)
530 vqsub.s8 q0, q7, q1 ; u = clamp(qs0 - filter1)
540 vqsub.s8 q12, q8, q1 ; u = clamp(qs1 - filter)
|
| D | loopfilter_8_neon.asm | 322 vqsub.s8 d29, d25, d26 ; filter = clamp(ps1-qs1)
343 vqsub.s8 d21, d21, d29 ; oq0 = clamp(qs0 - filter1)
350 vqsub.s8 d26, d26, d29 ; oq1 = clamp(qs1 - filter)
|
| D | loopfilter_16_neon.asm | 467 vqsub.s8 d29, d25, d26 ; filter = clamp(ps1-qs1)
485 vqsub.s8 d23, d23, d29 ; oq0 = clamp(qs0 - filter1)
492 vqsub.s8 d26, d26, d29 ; oq1 = clamp(qs1 - filter)
|
| D | loopfilter_neon.c | 415 filter = vqsub##r##s8(ps1, qs1); \
417 t = vqsub##r##s8(qs0, ps0); \
431 qs0 = vqsub##r##s8(qs0, filter1); \
440 qs1 = vqsub##r##s8(qs1, filter); \
|
| /external/arm-neon-tests/ |
| D | Android.mk | 25 vqsub vqdmulh_lane vqdmull vqdmlal vqdmlsl vceq vcge vcle \
|
| D | Makefile.gcc | 46 vqsub vqdmulh_lane vqdmull vqdmlal vqdmlsl vceq vcge vcle \
|
| D | ref_vqsub.c | 26 #define INSN_NAME vqsub
|
| D | Makefile | 40 vqsub vqdmulh_lane vqdmull vqdmlal vqdmlsl vceq vcge vcle \
|
| /external/libavc/common/arm/ |
| D | ih264_deblk_chroma_a9.s | 317 vqsub.u8 q2, q2, q7 @Q2 = p0 - delta
319 vqsub.u8 q0, q0, q7 @Q0 = q0 - delta
445 vqsub.u8 q12, q1, q7 @p0-|delta|
446 vqsub.u8 q13, q2, q7 @q0-|delta|
641 vqsub.u8 d12, d1, d7 @p0-|delta|
642 vqsub.u8 d13, d2, d7 @q0-|delta|
959 vqsub.u8 q2, q2, q7 @Q2 = p0 - delta
961 vqsub.u8 q0, q0, q7 @Q0 = q0 - delta
1099 vqsub.u8 q12, q1, q7 @p0-|delta|
1100 vqsub.u8 q13, q2, q7 @q0-|delta|
[all …]
|
| D | ih264_deblk_luma_a9.s | 170 vqsub.u8 q3, q3, q9 @Q3 = p0 - delta
174 vqsub.u8 q0, q0, q9 @Q0 = q0 - delta
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | neon.txt | 1575 # CHECK: vqsub.s8 d16, d16, d17
1577 # CHECK: vqsub.s16 d16, d16, d17
1579 # CHECK: vqsub.s32 d16, d16, d17
1581 # CHECK: vqsub.s64 d16, d16, d17
1583 # CHECK: vqsub.u8 d16, d16, d17
1585 # CHECK: vqsub.u16 d16, d16, d17
1587 # CHECK: vqsub.u32 d16, d16, d17
1589 # CHECK: vqsub.u64 d16, d16, d17
1591 # CHECK: vqsub.s8 q8, q8, q9
1593 # CHECK: vqsub.s16 q8, q8, q9
[all …]
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | neon.txt | 1575 # CHECK: vqsub.s8 d16, d16, d17
1577 # CHECK: vqsub.s16 d16, d16, d17
1579 # CHECK: vqsub.s32 d16, d16, d17
1581 # CHECK: vqsub.s64 d16, d16, d17
1583 # CHECK: vqsub.u8 d16, d16, d17
1585 # CHECK: vqsub.u16 d16, d16, d17
1587 # CHECK: vqsub.u32 d16, d16, d17
1589 # CHECK: vqsub.u64 d16, d16, d17
1591 # CHECK: vqsub.s8 q8, q8, q9
1593 # CHECK: vqsub.s16 q8, q8, q9
[all …]
|
| /external/clang/include/clang/Basic/ |
| D | arm_neon.td | 378 def OP_QRDMLSH : Op<(call "vqsub", $p0, (call "vqrdmulh", $p1, $p2))>;
380 def OP_QRDMLSH_LN : Op<(call "vqsub", $p0, (call "vqrdmulh", $p1, (splat $p2, $p3)))>;
483 def OP_SCALAR_QRDMLSH_LN : Op<(call "vqsub", $p0, (call "vqrdmulh", $p1,
544 def VQSUB : SInst<"vqsub", "ddd", "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl">;
1350 def SCALAR_QSUB : SInst<"vqsub", "sss", "ScSsSiSlSUcSUsSUiSUl">;
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 5377 void vqsub(
5379 void vqsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vqsub() function
5380 vqsub(al, dt, rd, rn, rm); in vqsub()
5383 void vqsub(
5385 void vqsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vqsub() function
5386 vqsub(al, dt, rd, rn, rm); in vqsub()
|
| D | disasm-aarch32.h | 2163 void vqsub(
2166 void vqsub(
|
| D | assembler-aarch32.cc | 22477 void Assembler::vqsub( in vqsub() function in vixl::aarch32::Assembler
22504 Delegate(kVqsub, &Assembler::vqsub, cond, dt, rd, rn, rm); in vqsub()
22507 void Assembler::vqsub( in vqsub() function in vixl::aarch32::Assembler
22534 Delegate(kVqsub, &Assembler::vqsub, cond, dt, rd, rn, rm); in vqsub()
|
| D | disasm-aarch32.cc | 6055 void Disassembler::vqsub( in vqsub() function in vixl::aarch32::Disassembler
6066 void Disassembler::vqsub( in vqsub() function in vixl::aarch32::Disassembler
30079 vqsub(CurrentCond(), in DecodeT32()
30753 vqsub(CurrentCond(), in DecodeT32()
40159 vqsub(al, dt, DRegister(rd), DRegister(rn), DRegister(rm)); in DecodeA32()
40186 vqsub(al, dt, QRegister(rd), QRegister(rn), QRegister(rm)); in DecodeA32()
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrNEON.td | 3649 "vqsub", "s", int_arm_neon_vqsubs, 0>;
3652 "vqsub", "u", int_arm_neon_vqsubu, 0>;
|