| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| D | neon_div.ll | 17 ;CHECK: vrecps.f32
19 ;CHECK: vrecps.f32
31 ;CHECK: vrecps.f32
41 ;CHECK: vrecps.f32
42 ;CHECK: vrecps.f32
|
| D | vrec.ll | 43 ;CHECK: vrecps.f32
46 %tmp3 = call <2 x float> @llvm.arm.neon.vrecps.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
52 ;CHECK: vrecps.f32
55 %tmp3 = call <4 x float> @llvm.arm.neon.vrecps.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
59 declare <2 x float> @llvm.arm.neon.vrecps.v2f32(<2 x float>, <2 x float>) nounwind readnone
60 declare <4 x float> @llvm.arm.neon.vrecps.v4f32(<4 x float>, <4 x float>) nounwind readnone
|
| /external/llvm/test/CodeGen/ARM/ |
| D | neon_div.ll | 18 ;CHECK: vrecps.f32
21 ;CHECK: vrecps.f32
32 ;CHECK: vrecps.f32
42 ;CHECK: vrecps.f32
43 ;CHECK: vrecps.f32
|
| D | vrec.ll | 43 ;CHECK: vrecps.f32
46 %tmp3 = call <2 x float> @llvm.arm.neon.vrecps.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
52 ;CHECK: vrecps.f32
55 %tmp3 = call <4 x float> @llvm.arm.neon.vrecps.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
59 declare <2 x float> @llvm.arm.neon.vrecps.v2f32(<2 x float>, <2 x float>) nounwind readnone
60 declare <4 x float> @llvm.arm.neon.vrecps.v4f32(<4 x float>, <4 x float>) nounwind readnone
|
| D | 2012-01-23-PostRA-LICM.ll | 33 …%tmp17 = call <4 x float> @llvm.arm.neon.vrecps.v4f32(<4 x float> %tmp16, <4 x float> %tmp11) noun…
35 …%tmp19 = call <4 x float> @llvm.arm.neon.vrecps.v4f32(<4 x float> %tmp18, <4 x float> %tmp11) noun…
51 …%tmp34 = call <4 x float> @llvm.arm.neon.vrecps.v4f32(<4 x float> undef, <4 x float> %tmp28) nounw…
99 declare <4 x float> @llvm.arm.neon.vrecps.v4f32(<4 x float>, <4 x float>) nounwind readnone
|
| D | vector-extend-narrow.ll | 58 ; CHECK: vrecps
|
| /external/llvm/test/MC/ARM/ |
| D | neon-reciprocal-encoding.s | 11 @ CHECK: vrecps.f32 d16, d16, d17 @ encoding: [0xb1,0x0f,0x40,0xf2]
12 vrecps.f32 d16, d16, d17
13 @ CHECK: vrecps.f32 q8, q8, q9 @ encoding: [0xf2,0x0f,0x40,0xf2]
14 vrecps.f32 q8, q8, q9
|
| D | neont2-reciprocal-encoding.s | 13 @ CHECK: vrecps.f32 d16, d16, d17 @ encoding: [0x40,0xef,0xb1,0x0f]
14 vrecps.f32 d16, d16, d17
15 @ CHECK: vrecps.f32 q8, q8, q9 @ encoding: [0x40,0xef,0xf2,0x0f]
16 vrecps.f32 q8, q8, q9
|
| D | fullfp16-neon.s | 233 vrecps.f16 d0, d1, d2
234 vrecps.f16 q0, q1, q2
235 @ ARM: vrecps.f16 d0, d1, d2 @ encoding: [0x12,0x0f,0x11,0xf2]
236 @ ARM: vrecps.f16 q0, q1, q2 @ encoding: [0x54,0x0f,0x12,0xf2]
237 @ THUMB: vrecps.f16 d0, d1, d2 @ encoding: [0x11,0xef,0x12,0x0f]
238 @ THUMB: vrecps.f16 q0, q1, q2 @ encoding: [0x12,0xef,0x54,0x0f]
|
| D | fullfp16-neon-neg.s | 170 vrecps.f16 d0, d1, d2
171 vrecps.f16 q0, q1, q2
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | neon-reciprocal-encoding.s | 11 @ CHECK: vrecps.f32 d16, d16, d17 @ encoding: [0xb1,0x0f,0x40,0xf2]
12 vrecps.f32 d16, d16, d17
13 @ CHECK: vrecps.f32 q8, q8, q9 @ encoding: [0xf2,0x0f,0x40,0xf2]
14 vrecps.f32 q8, q8, q9
|
| D | neont2-reciprocal-encoding.s | 13 @ CHECK: vrecps.f32 d16, d16, d17 @ encoding: [0x40,0xef,0xb1,0x0f]
14 vrecps.f32 d16, d16, d17
15 @ CHECK: vrecps.f32 q8, q8, q9 @ encoding: [0x40,0xef,0xf2,0x0f]
16 vrecps.f32 q8, q8, q9
|
| /external/arm-neon-tests/ |
| D | Android.mk | 40 vcalt vrecps vrsqrts vcvt
|
| D | ref_vrecps.c | 43 vrecps##Q##_##T2##W(VECT_VAR(vector, T1, W, N), \ in exec_vrecps()
|
| D | Makefile.gcc | 61 vcalt vrecps vrsqrts vcvt
|
| D | Makefile | 55 vcalt vrecps vrsqrts vcvt
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | fullfp16-neon-thumb.txt | 148 # CHECK: vrecps.f16 d0, d1, d2
149 # CHECK: vrecps.f16 q0, q1, q2
|
| D | fullfp16-neon-arm.txt | 148 # CHECK: vrecps.f16 d0, d1, d2
149 # CHECK: vrecps.f16 q0, q1, q2
|
| D | neont2.txt | 830 # CHECK: vrecps.f32 d16, d16, d17
832 # CHECK: vrecps.f32 q8, q8, q9
|
| D | neon.txt | 939 # CHECK: vrecps.f32 d16, d16, d17
941 # CHECK: vrecps.f32 q8, q8, q9
|
| /external/clang/include/clang/Basic/ |
| D | arm_neon.td | 593 def VRECPS : IInst<"vrecps", "ddd", "fQf">;
954 def FRECPS : IInst<"vrecps", "ddd", "dQd">;
1456 def SCALAR_FRECPS : IInst<"vrecps", "sss", "SfSd">;
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 5405 void vrecps(
5407 void vrecps(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vrecps() function
5408 vrecps(al, dt, rd, rn, rm); in vrecps()
5411 void vrecps(
5413 void vrecps(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vrecps() function
5414 vrecps(al, dt, rd, rn, rm); in vrecps()
|
| D | disasm-aarch32.h | 2176 void vrecps(
2179 void vrecps(
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | neont2.txt | 830 # CHECK: vrecps.f32 d16, d16, d17
832 # CHECK: vrecps.f32 q8, q8, q9
|
| D | neon.txt | 939 # CHECK: vrecps.f32 d16, d16, d17
941 # CHECK: vrecps.f32 q8, q8, q9
|