/external/libhevc/common/arm/ |
D | ihevc_intra_pred_luma_mode_3_to_9.s | 217 vrshrn.i16 d24, q12, #5 @round shft (row 0) 228 vrshrn.i16 d22, q11, #5 @round shft (row 1) 239 vrshrn.i16 d20, q10, #5 @round shft (row 2) 250 vrshrn.i16 d18, q9, #5 @round shft (row 3) 261 vrshrn.i16 d24, q12, #5 @round shft (row 4) 272 vrshrn.i16 d22, q11, #5 @round shft (row 5) 283 vrshrn.i16 d20, q10, #5 @round shft (row 6) 284 vrshrn.i16 d18, q9, #5 @round shft (row 7) 340 vrshrn.i16 d22, q11, #5 @round shft (row 5) 362 vrshrn.i16 d20, q10, #5 @(from previous loop)round shft (row 6) [all …]
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D | ihevc_intra_pred_filters_luma_mode_11_to_17.s | 327 vrshrn.i16 d24, q12, #5 @round shft (row 0) 338 vrshrn.i16 d22, q11, #5 @round shft (row 1) 349 vrshrn.i16 d20, q10, #5 @round shft (row 2) 360 vrshrn.i16 d18, q9, #5 @round shft (row 3) 371 vrshrn.i16 d24, q12, #5 @round shft (row 4) 382 vrshrn.i16 d22, q11, #5 @round shft (row 5) 393 vrshrn.i16 d20, q10, #5 @round shft (row 6) 394 vrshrn.i16 d18, q9, #5 @round shft (row 7) 450 vrshrn.i16 d24, q11, #5 @round shft (row 5) 471 vrshrn.i16 d20, q10, #5 @(from previous loop)round shft (row 6) [all …]
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D | ihevc_intra_pred_chroma_mode_27_to_33.s | 193 vrshrn.i16 d10,q5,#5 @(i row)shift_res = vrshrn_n_u16(add_res, 5) 208 vrshrn.i16 d14,q7,#5 @(ii)shift_res = vrshrn_n_u16(add_res, 5) 225 vrshrn.i16 d18,q9,#5 @(iii)shift_res = vrshrn_n_u16(add_res, 5) 242 vrshrn.i16 d22,q11,#5 @(iv)shift_res = vrshrn_n_u16(add_res, 5) 259 vrshrn.i16 d10,q5,#5 @(v)shift_res = vrshrn_n_u16(add_res, 5) 272 vrshrn.i16 d14,q7,#5 @(vi)shift_res = vrshrn_n_u16(add_res, 5) 305 vrshrn.i16 d18,q9,#5 @(vii)shift_res = vrshrn_n_u16(add_res, 5) 321 vrshrn.i16 d22,q11,#5 @(viii)shift_res = vrshrn_n_u16(add_res, 5) 335 vrshrn.i16 d10,q5,#5 @(i)shift_res = vrshrn_n_u16(add_res, 5) 352 vrshrn.i16 d14,q7,#5 @(ii)shift_res = vrshrn_n_u16(add_res, 5) [all …]
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D | ihevc_intra_pred_luma_mode_27_to_33.s | 196 vrshrn.i16 d10,q5,#5 @(i row)shift_res = vrshrn_n_u16(add_res, 5) 210 vrshrn.i16 d14,q7,#5 @(ii)shift_res = vrshrn_n_u16(add_res, 5) 227 vrshrn.i16 d18,q9,#5 @(iii)shift_res = vrshrn_n_u16(add_res, 5) 244 vrshrn.i16 d22,q11,#5 @(iv)shift_res = vrshrn_n_u16(add_res, 5) 261 vrshrn.i16 d10,q5,#5 @(v)shift_res = vrshrn_n_u16(add_res, 5) 274 vrshrn.i16 d14,q7,#5 @(vi)shift_res = vrshrn_n_u16(add_res, 5) 306 vrshrn.i16 d18,q9,#5 @(vii)shift_res = vrshrn_n_u16(add_res, 5) 322 vrshrn.i16 d22,q11,#5 @(viii)shift_res = vrshrn_n_u16(add_res, 5) 336 vrshrn.i16 d10,q5,#5 @(i)shift_res = vrshrn_n_u16(add_res, 5) 353 vrshrn.i16 d14,q7,#5 @(ii)shift_res = vrshrn_n_u16(add_res, 5) [all …]
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D | ihevc_intra_pred_chroma_mode_3_to_9.s | 214 vrshrn.i16 d24, q12, #5 @round shft (row 0) 225 vrshrn.i16 d22, q11, #5 @round shft (row 1) 236 vrshrn.i16 d20, q10, #5 @round shft (row 2) 247 vrshrn.i16 d18, q9, #5 @round shft (row 3) 260 vrshrn.i16 d24, q12, #5 @round shft (row 4) 271 vrshrn.i16 d22, q11, #5 @round shft (row 5) 282 vrshrn.i16 d20, q10, #5 @round shft (row 6) 283 vrshrn.i16 d18, q9, #5 @round shft (row 7) 342 vrshrn.i16 d22, q11, #5 @round shft (row 5) 370 vrshrn.i16 d20, q10, #5 @(from previous loop)round shft (row 6) [all …]
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D | ihevc_intra_pred_filters_luma_mode_19_to_25.s | 304 vrshrn.i16 d10,q5,#5 @(i row)shift_res = vrshrn_n_u16(add_res, 5) 318 vrshrn.i16 d14,q7,#5 @(ii)shift_res = vrshrn_n_u16(add_res, 5) 334 vrshrn.i16 d18,q9,#5 @(iii)shift_res = vrshrn_n_u16(add_res, 5) 350 vrshrn.i16 d22,q11,#5 @(iv)shift_res = vrshrn_n_u16(add_res, 5) 366 vrshrn.i16 d10,q5,#5 @(v)shift_res = vrshrn_n_u16(add_res, 5) 379 vrshrn.i16 d14,q7,#5 @(vi)shift_res = vrshrn_n_u16(add_res, 5) 410 vrshrn.i16 d18,q9,#5 @(vii)shift_res = vrshrn_n_u16(add_res, 5) 429 vrshrn.i16 d22,q11,#5 @(viii)shift_res = vrshrn_n_u16(add_res, 5) 442 vrshrn.i16 d10,q5,#5 @(i)shift_res = vrshrn_n_u16(add_res, 5) 460 vrshrn.i16 d14,q7,#5 @(ii)shift_res = vrshrn_n_u16(add_res, 5) [all …]
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D | ihevc_intra_pred_filters_chroma_mode_11_to_17.s | 328 vrshrn.i16 d24, q12, #5 @round shft (row 0) 339 vrshrn.i16 d22, q11, #5 @round shft (row 1) 350 vrshrn.i16 d20, q10, #5 @round shft (row 2) 361 vrshrn.i16 d18, q9, #5 @round shft (row 3) 374 vrshrn.i16 d24, q12, #5 @round shft (row 4) 385 vrshrn.i16 d22, q11, #5 @round shft (row 5) 396 vrshrn.i16 d20, q10, #5 @round shft (row 6) 397 vrshrn.i16 d18, q9, #5 @round shft (row 7) 459 vrshrn.i16 d24, q11, #5 @round shft (row 5) 488 vrshrn.i16 d20, q10, #5 @(from previous loop)round shft (row 6) [all …]
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D | ihevc_intra_pred_filters_chroma_mode_19_to_25.s | 301 vrshrn.i16 d10,q5,#5 @(i row)shift_res = vrshrn_n_u16(add_res, 5) 316 vrshrn.i16 d14,q7,#5 @(ii)shift_res = vrshrn_n_u16(add_res, 5) 332 vrshrn.i16 d18,q9,#5 @(iii)shift_res = vrshrn_n_u16(add_res, 5) 348 vrshrn.i16 d22,q11,#5 @(iv)shift_res = vrshrn_n_u16(add_res, 5) 367 vrshrn.i16 d10,q5,#5 @(v)shift_res = vrshrn_n_u16(add_res, 5) 380 vrshrn.i16 d14,q7,#5 @(vi)shift_res = vrshrn_n_u16(add_res, 5) 413 vrshrn.i16 d18,q9,#5 @(vii)shift_res = vrshrn_n_u16(add_res, 5) 432 vrshrn.i16 d22,q11,#5 @(viii)shift_res = vrshrn_n_u16(add_res, 5) 445 vrshrn.i16 d10,q5,#5 @(i)shift_res = vrshrn_n_u16(add_res, 5) 464 vrshrn.i16 d14,q7,#5 @(ii)shift_res = vrshrn_n_u16(add_res, 5) [all …]
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D | ihevc_deblk_luma_horz.s | 214 vrshrn.i16 d20,q6,#3 228 vrshrn.i16 d21,q7,#2 254 vrshrn.i16 d19,q8,#3 287 vrshrn.i16 d20,q6,#3 297 vrshrn.i16 d21,q7,#2 392 vrshrn.i16 d19,q8,#3 490 vrshrn.u16 d14,q7,#1 522 vrshrn.u16 d14,q7,#1
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D | ihevc_deblk_luma_vert.s | 216 vrshrn.i16 d22,q10,#3 229 vrshrn.i16 d20,q10,#3 231 vrshrn.i16 d0,q0,#2 279 vrshrn.i16 d26,q13,#3 400 vrshrn.i16 d2,q8,#2 411 vrshrn.i16 d0,q0,#3
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D | ihevc_intra_pred_chroma_planar.s | 345 vrshrn.s16 d12,q6,#3
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/external/libvpx/libvpx/vpx_dsp/arm/ |
D | idct4x4_add_neon.asm | 91 vrshrn.s32 d26, q13, #14 92 vrshrn.s32 d27, q14, #14 93 vrshrn.s32 d29, q15, #14 94 vrshrn.s32 d28, q1, #14 142 vrshrn.s32 d26, q13, #14 143 vrshrn.s32 d27, q14, #14 144 vrshrn.s32 d29, q15, #14 145 vrshrn.s32 d28, q1, #14
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/external/libavc/common/arm/ |
D | ih264_deblk_luma_a9.s | 272 vrshrn.u16 d12, q8, #3 @(2*(p0+q0+q1)+q2 +p1 +4)>> 3 L [q0'] 282 vrshrn.u16 d17, q0, #2 @(2*q1+q0+p1+2)>>2 H [q0"] 291 vrshrn.u16 d12, q14, #2 @(p0+q0+q1+q2+2)>>2 L [q1'] 303 vrshrn.u16 d1, q15, #3 @(p0+q0+q1+3*q2+2*q3+4)>>3 H [q2'] 322 vrshrn.u16 d29, q2, #3 @(2*(p0+q0+p1)+p2+q1+4)>>3 H,p0' 334 vrshrn.u16 d2, q1, #2 @(2*p1+p0+q1+2)>>2,p0"L 344 vrshrn.u16 d13, q2, #3 @((p0+q0+p1)+3*p2+2*p3+4)>>3 H p2' 679 vrshrn.u16 d21, q9, #2 @(p2 + p1 + p0 + q0 + 2) >> 2)H p1' 684 vrshrn.u16 d25, q13, #3 @((p2 + X2(p1) + X2(p0) + X2(q0) + q1 + 4) >> 3) H p0' 742 vrshrn.u16 d17, q2, #3 @(p1 + X2(p0) + X2(q0) + X2(q1) + q2 + 4) >> 3 H qo" [all …]
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D | ih264_deblk_chroma_a9.s | 118 vrshrn.u16 d8, q4, #2 @ 119 vrshrn.u16 d9, q5, #2 @Q4 = (X2(q1U) + q0U + p1U + 2) >> 2 121 vrshrn.u16 d10, q7, #2 @ 122 vrshrn.u16 d11, q14, #2 @Q5 = (X2(p1U) + p0U + q1U + 2) >> 2 204 vrshrn.i16 d14, q7, #2 205 vrshrn.i16 d15, q8, #2 @(2*p1 + (p0 + q1) + 2) >> 2 207 vrshrn.i16 d18, q9, #2 208 vrshrn.i16 d19, q10, #2 @(2*q1 + (p1 + q0) + 2) >> 2 530 vrshrn.i16 d7, q14, #2 @(2*p1 + (p0 + q1) + 2) >> 2 532 vrshrn.i16 d9, q13, #2 @(2*q1 + (p1 + q0) + 2) >> 2 [all …]
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D | ih264_intra_pred_chroma_a9q.s | 427 vrshrn.s32 d10, q11, #6 428 vrshrn.s32 d12, q12, #6 429 vrshrn.s32 d13, q13, #6 430 vrshrn.s32 d14, q14, #6
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/external/libjpeg-turbo/simd/ |
D | jsimd_arm_neon.S | 295 vrshrn.s32 ROW1L, q1, #11 308 vrshrn.s32 ROW6L, q1, #11 315 vrshrn.s32 ROW2L, q1, #11 317 vrshrn.s32 ROW5L, q3, #11 332 vrshrn.s32 ROW7L, q2, #11 333 vrshrn.s32 ROW3L, q5, #11 334 vrshrn.s32 ROW0L, q6, #11 335 vrshrn.s32 ROW4L, q3, #11 369 vrshrn.s32 ROW1R, q1, #11 378 vrshrn.s32 ROW6R, q1, #11 [all …]
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/external/llvm/test/MC/ARM/ |
D | neont2-shift-encoding.s | 157 @ CHECK: vrshrn.i16 d16, q8, #8 @ encoding: [0xc8,0xef,0x70,0x08] 158 vrshrn.i16 d16, q8, #8 159 @ CHECK: vrshrn.i32 d16, q8, #16 @ encoding: [0xd0,0xef,0x70,0x08] 160 vrshrn.i32 d16, q8, #16 161 @ CHECK: vrshrn.i64 d16, q8, #32 @ encoding: [0xe0,0xef,0x70,0x08] 162 vrshrn.i64 d16, q8, #32
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D | neon-shift-encoding.s | 350 vrshrn.i16 d16, q8, #8 351 vrshrn.i32 d16, q8, #16 352 vrshrn.i64 d16, q8, #32 360 @ CHECK: vrshrn.i16 d16, q8, #8 @ encoding: [0x70,0x08,0xc8,0xf2] 361 @ CHECK: vrshrn.i32 d16, q8, #16 @ encoding: [0x70,0x08,0xd0,0xf2] 362 @ CHECK: vrshrn.i64 d16, q8, #32 @ encoding: [0x70,0x08,0xe0,0xf2]
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | neont2-shift-encoding.s | 157 @ CHECK: vrshrn.i16 d16, q8, #8 @ encoding: [0xc8,0xef,0x70,0x08] 158 vrshrn.i16 d16, q8, #8 159 @ CHECK: vrshrn.i32 d16, q8, #16 @ encoding: [0xd0,0xef,0x70,0x08] 160 vrshrn.i32 d16, q8, #16 161 @ CHECK: vrshrn.i64 d16, q8, #32 @ encoding: [0xe0,0xef,0x70,0x08] 162 vrshrn.i64 d16, q8, #32
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D | neon-shift-encoding.s | 220 @ CHECK: vrshrn.i16 d16, q8, #8 @ encoding: [0x70,0x08,0xc8,0xf2] 221 vrshrn.i16 d16, q8, #8 222 @ CHECK: vrshrn.i32 d16, q8, #16 @ encoding: [0x70,0x08,0xd0,0xf2] 223 vrshrn.i32 d16, q8, #16 224 @ CHECK: vrshrn.i64 d16, q8, #32 @ encoding: [0x70,0x08,0xe0,0xf2] 225 vrshrn.i64 d16, q8, #32
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/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
D | vshrn.ll | 33 ;CHECK: vrshrn.i16 41 ;CHECK: vrshrn.i32 49 ;CHECK: vrshrn.i64
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/external/llvm/test/CodeGen/ARM/ |
D | vshrn.ll | 62 ;CHECK: vrshrn.i16 70 ;CHECK: vrshrn.i32 78 ;CHECK: vrshrn.i64
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/external/libmpeg2/common/arm/ |
D | impeg2_inter_pred.s | 509 vrshrn.u16 d18, q9, #2 @row1 511 vrshrn.u16 d26, q13, #2 @row5 513 vrshrn.u16 d20, q10, #2 @row2 515 vrshrn.u16 d28, q14, #2 @row6 535 vrshrn.u16 d22, q11, #2 @row3 537 vrshrn.u16 d30, q15, #2 @row7 539 vrshrn.u16 d24, q12, #2 @row4 541 vrshrn.u16 d14, q7, #2 @row8
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-neon-simd-shift.ll | 369 %vrshrn = tail call <8 x i8> @llvm.aarch64.neon.rshrn.v8i8(<8 x i16> %b, i32 3) 371 %2 = bitcast <8 x i8> %vrshrn to <1 x i64> 380 %vrshrn = tail call <4 x i16> @llvm.aarch64.neon.rshrn.v4i16(<4 x i32> %b, i32 9) 382 %2 = bitcast <4 x i16> %vrshrn to <1 x i64> 392 %vrshrn = tail call <2 x i32> @llvm.aarch64.neon.rshrn.v2i32(<2 x i64> %b, i32 19) 393 %2 = bitcast <2 x i32> %vrshrn to <1 x i64>
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D | arm64-vecFold.ll | 95 define <8 x i16> @vrshrn(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> %b0, <8 x i16> %b1) nounwind readn… 96 ; CHECK-LABEL: vrshrn:
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