| /external/llvm/test/MC/ARM/ |
| D | neon-reciprocal-encoding.s | 23 @ CHECK: vrsqrts.f32 d16, d16, d17 @ encoding: [0xb1,0x0f,0x60,0xf2]
24 vrsqrts.f32 d16, d16, d17
25 @ CHECK: vrsqrts.f32 q8, q8, q9 @ encoding: [0xf2,0x0f,0x60,0xf2]
26 vrsqrts.f32 q8, q8, q9
|
| D | neont2-reciprocal-encoding.s | 25 @ CHECK: vrsqrts.f32 d16, d16, d17 @ encoding: [0x60,0xef,0xb1,0x0f]
26 vrsqrts.f32 d16, d16, d17
27 @ CHECK: vrsqrts.f32 q8, q8, q9 @ encoding: [0x60,0xef,0xf2,0x0f]
28 vrsqrts.f32 q8, q8, q9
|
| D | fullfp16-neon.s | 247 vrsqrts.f16 d0, d1, d2
248 vrsqrts.f16 q0, q1, q2
249 @ ARM: vrsqrts.f16 d0, d1, d2 @ encoding: [0x12,0x0f,0x31,0xf2]
250 @ ARM: vrsqrts.f16 q0, q1, q2 @ encoding: [0x54,0x0f,0x32,0xf2]
251 @ THUMB: vrsqrts.f16 d0, d1, d2 @ encoding: [0x31,0xef,0x12,0x0f]
252 @ THUMB: vrsqrts.f16 q0, q1, q2 @ encoding: [0x32,0xef,0x54,0x0f]
|
| D | fullfp16-neon-neg.s | 180 vrsqrts.f16 d0, d1, d2
181 vrsqrts.f16 q0, q1, q2
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | neon-reciprocal-encoding.s | 23 @ CHECK: vrsqrts.f32 d16, d16, d17 @ encoding: [0xb1,0x0f,0x60,0xf2]
24 vrsqrts.f32 d16, d16, d17
25 @ CHECK: vrsqrts.f32 q8, q8, q9 @ encoding: [0xf2,0x0f,0x60,0xf2]
26 vrsqrts.f32 q8, q8, q9
|
| D | neont2-reciprocal-encoding.s | 25 @ CHECK: vrsqrts.f32 d16, d16, d17 @ encoding: [0x60,0xef,0xb1,0x0f]
26 vrsqrts.f32 d16, d16, d17
27 @ CHECK: vrsqrts.f32 q8, q8, q9 @ encoding: [0x60,0xef,0xf2,0x0f]
28 vrsqrts.f32 q8, q8, q9
|
| /external/llvm/test/CodeGen/ARM/ |
| D | vrec.ll | 102 ;CHECK: vrsqrts.f32
105 %tmp3 = call <2 x float> @llvm.arm.neon.vrsqrts.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
111 ;CHECK: vrsqrts.f32
114 %tmp3 = call <4 x float> @llvm.arm.neon.vrsqrts.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
118 declare <2 x float> @llvm.arm.neon.vrsqrts.v2f32(<2 x float>, <2 x float>) nounwind readnone
119 declare <4 x float> @llvm.arm.neon.vrsqrts.v4f32(<4 x float>, <4 x float>) nounwind readnone
|
| D | 2009-11-01-NeonMoves.ll | 25 …%10 = call <4 x float> @llvm.arm.neon.vrsqrts.v4f32(<4 x float> %9, <4 x float> %7) nounwind ; <<4…
40 declare <4 x float> @llvm.arm.neon.vrsqrts.v4f32(<4 x float>, <4 x float>) nounwind readnone
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| D | vrec.ll | 102 ;CHECK: vrsqrts.f32
105 %tmp3 = call <2 x float> @llvm.arm.neon.vrsqrts.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
111 ;CHECK: vrsqrts.f32
114 %tmp3 = call <4 x float> @llvm.arm.neon.vrsqrts.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
118 declare <2 x float> @llvm.arm.neon.vrsqrts.v2f32(<2 x float>, <2 x float>) nounwind readnone
119 declare <4 x float> @llvm.arm.neon.vrsqrts.v4f32(<4 x float>, <4 x float>) nounwind readnone
|
| D | 2009-11-01-NeonMoves.ll | 25 …%10 = call <4 x float> @llvm.arm.neon.vrsqrts.v4f32(<4 x float> %9, <4 x float> %7) nounwind ; <<4…
40 declare <4 x float> @llvm.arm.neon.vrsqrts.v4f32(<4 x float>, <4 x float>) nounwind readnone
|
| /external/arm-neon-tests/ |
| D | Android.mk | 40 vcalt vrecps vrsqrts vcvt
|
| D | ref_vrsqrts.c | 43 vrsqrts##Q##_##T2##W(VECT_VAR(vector, T1, W, N), \ in exec_vrsqrts()
|
| D | Makefile.gcc | 61 vcalt vrecps vrsqrts vcvt
|
| D | Makefile | 55 vcalt vrecps vrsqrts vcvt
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | fullfp16-neon-thumb.txt | 158 # CHECK: vrsqrts.f16 d0, d1, d2
159 # CHECK: vrsqrts.f16 q0, q1, q2
|
| D | fullfp16-neon-arm.txt | 158 # CHECK: vrsqrts.f16 d0, d1, d2
159 # CHECK: vrsqrts.f16 q0, q1, q2
|
| D | neont2.txt | 842 # CHECK: vrsqrts.f32 d16, d16, d17
844 # CHECK: vrsqrts.f32 q8, q8, q9
|
| D | neon.txt | 951 # CHECK: vrsqrts.f32 d16, d16, d17
953 # CHECK: vrsqrts.f32 q8, q8, q9
|
| /external/clang/include/clang/Basic/ |
| D | arm_neon.td | 594 def VRSQRTS : IInst<"vrsqrts", "ddd", "fQf">;
955 def FRSQRTS : IInst<"vrsqrts", "ddd", "dQd">;
1460 def SCALAR_FRSQRTS : IInst<"vrsqrts", "sss", "SfSd">;
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 5575 void vrsqrts(
5577 void vrsqrts(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vrsqrts() function
5578 vrsqrts(al, dt, rd, rn, rm); in vrsqrts()
5581 void vrsqrts(
5583 void vrsqrts(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vrsqrts() function
5584 vrsqrts(al, dt, rd, rn, rm); in vrsqrts()
|
| D | disasm-aarch32.h | 2274 void vrsqrts(
2277 void vrsqrts(
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | neont2.txt | 842 # CHECK: vrsqrts.f32 d16, d16, d17
844 # CHECK: vrsqrts.f32 q8, q8, q9
|
| D | neon.txt | 951 # CHECK: vrsqrts.f32 d16, d16, d17
953 # CHECK: vrsqrts.f32 q8, q8, q9
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrNEON.td | 5397 IIC_VRECSD, "vrsqrts", "f32",
5400 IIC_VRECSQ, "vrsqrts", "f32",
5403 IIC_VRECSD, "vrsqrts", "f16",
5407 IIC_VRECSQ, "vrsqrts", "f16",
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrNEON.td | 4102 IIC_VRECSD, "vrsqrts", "f32",
4105 IIC_VRECSQ, "vrsqrts", "f32",
|