/external/llvm/test/MC/Disassembler/ARM/ |
D | move-banked-regs-thumb.txt | 35 [0xe0,0xf3,0x30,0x84] 36 [0xe1,0xf3,0x30,0x89] 37 [0xf0,0xf3,0x30,0x81] 42 [0xe2,0xf3,0x30,0x81] 43 [0xe3,0xf3,0x30,0x83] 44 [0xf2,0xf3,0x30,0x85] 49 [0xe4,0xf3,0x30,0x85] 50 [0xe5,0xf3,0x30,0x87] 51 [0xf4,0xf3,0x30,0x89] 56 [0xe6,0xf3,0x30,0x89] [all …]
|
D | memory-arm-instructions.txt | 16 0x1e 0x30 0x11 0xe4 39 0x01 0x30 0x98 0xe7 59 0x00 0x30 0xd8 0xe5 80 0x02 0x30 0xf5 0xe7 98 0x04 0x30 0xf1 0xe4 150 0xb0 0x30 0xd4 0xe1 171 0xbb 0x30 0xb8 0xe1 199 0xd0 0x30 0xd4 0xe1 221 0xdb 0x30 0xb8 0xe1 236 0xdc 0x30 0x78 0xe0 [all …]
|
/external/icu/icu4c/source/data/mappings/ |
D | gb18030.ucm | 107 <U0030> \x30 |0 187 <U0080> \x81\x30\x81\x30 |0 188 <U0081> \x81\x30\x81\x31 |0 189 <U0082> \x81\x30\x81\x32 |0 190 <U0083> \x81\x30\x81\x33 |0 191 <U0084> \x81\x30\x81\x34 |0 192 <U0085> \x81\x30\x81\x35 |0 193 <U0086> \x81\x30\x81\x36 |0 194 <U0087> \x81\x30\x81\x37 |0 195 <U0088> \x81\x30\x81\x38 |0 [all …]
|
/external/google-breakpad/src/processor/testdata/symbols/microdump/breakpad_unittests/D6D1FEC9A15DE7F38A236898871A2E770/ |
D | breakpad_unittests.sym | 58084 STACK CFI INIT 2351c 4 .cfa: sp 0 + .ra: x30 58085 STACK CFI INIT 23520 4 .cfa: sp 0 + .ra: x30 58086 STACK CFI INIT 23524 8 .cfa: sp 0 + .ra: x30 58087 STACK CFI INIT 2352c 8 .cfa: sp 0 + .ra: x30 58088 STACK CFI INIT 23534 8 .cfa: sp 0 + .ra: x30 58089 STACK CFI INIT 2353c 8 .cfa: sp 0 + .ra: x30 58090 STACK CFI INIT 23544 8 .cfa: sp 0 + .ra: x30 58091 STACK CFI INIT 2354c 8 .cfa: sp 0 + .ra: x30 58092 STACK CFI INIT 23554 4 .cfa: sp 0 + .ra: x30 58093 STACK CFI INIT 23558 8 .cfa: sp 0 + .ra: x30 [all …]
|
/external/llvm/test/MC/Disassembler/Mips/mips32r2/ |
D | valid-mips32r2-el.txt | 14 0x67 0x45 0xc9 0x30 # CHECK: andi $9, $6, 17767 27 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 28 0x30 0x60 0x2e 0x46 # CHECK: c.f.d $f12, $f14 29 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 31 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 33 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 35 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 37 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 39 0x39 0x30 0x07 0x46 # CHECK: c.ngle.s $f6, $f7 41 0x3f 0x30 0x07 0x46 # CHECK: c.ngt.s $f6, $f7 [all …]
|
D | valid-mips32r2.txt | 62 0x00 0xb3 0x55 0x30 # CHECK: tge $5, $19, 340 79 0x00 0xea 0x00 0x30 # CHECK: tge $7, $10 148 0x30 0x42 0x00 0x04 # CHECK: andi $2, $2, 4 149 0x30 0xc9 0x45 0x67 # CHECK: andi $9, $6, 17767 210 0x46 0x07 0x30 0x30 # CHECK: c.f.s $f6, $f7 211 0x46 0x07 0x30 0x31 # CHECK: c.un.s $f6, $f7 212 0x46 0x07 0x30 0x32 # CHECK: c.eq.s $f6, $f7 213 0x46 0x07 0x30 0x34 # CHECK: c.olt.s $f6, $f7 214 0x46 0x07 0x30 0x35 # CHECK: c.ult.s $f6, $f7 215 0x46 0x07 0x30 0x36 # CHECK: c.ole.s $f6, $f7 [all …]
|
/external/llvm/test/MC/Disassembler/Mips/mips32r3/ |
D | valid-mips32r3-el.txt | 11 0x67 0x45 0xc9 0x30 # CHECK: andi $9, $6, 17767 24 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 25 0x30 0x60 0x2e 0x46 # CHECK: c.f.d $f12, $f14 26 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 28 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 30 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 32 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 34 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 36 0x39 0x30 0x07 0x46 # CHECK: c.ngle.s $f6, $f7 38 0x3f 0x30 0x07 0x46 # CHECK: c.ngt.s $f6, $f7 [all …]
|
D | valid-mips32r3.txt | 59 0x00 0xb3 0x55 0x30 # CHECK: tge $5, $19, 340 76 0x00 0xea 0x00 0x30 # CHECK: tge $7, $10 145 0x30 0x42 0x00 0x04 # CHECK: andi $2, $2, 4 146 0x30 0xc9 0x45 0x67 # CHECK: andi $9, $6, 17767 207 0x46 0x07 0x30 0x30 # CHECK: c.f.s $f6, $f7 208 0x46 0x07 0x30 0x31 # CHECK: c.un.s $f6, $f7 209 0x46 0x07 0x30 0x32 # CHECK: c.eq.s $f6, $f7 210 0x46 0x07 0x30 0x34 # CHECK: c.olt.s $f6, $f7 211 0x46 0x07 0x30 0x35 # CHECK: c.ult.s $f6, $f7 212 0x46 0x07 0x30 0x36 # CHECK: c.ole.s $f6, $f7 [all …]
|
/external/llvm/test/MC/Disassembler/Mips/mips32r5/ |
D | valid-mips32r5-el.txt | 11 0x67 0x45 0xc9 0x30 # CHECK: andi $9, $6, 17767 24 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 25 0x30 0x60 0x2e 0x46 # CHECK: c.f.d $f12, $f14 26 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 28 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 30 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 32 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 34 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 36 0x39 0x30 0x07 0x46 # CHECK: c.ngle.s $f6, $f7 38 0x3f 0x30 0x07 0x46 # CHECK: c.ngt.s $f6, $f7 [all …]
|
D | valid-mips32r5.txt | 59 0x00 0xb3 0x55 0x30 # CHECK: tge $5, $19, 340 76 0x00 0xea 0x00 0x30 # CHECK: tge $7, $10 145 0x30 0x42 0x00 0x04 # CHECK: andi $2, $2, 4 146 0x30 0xc9 0x45 0x67 # CHECK: andi $9, $6, 17767 207 0x46 0x07 0x30 0x30 # CHECK: c.f.s $f6, $f7 208 0x46 0x07 0x30 0x31 # CHECK: c.un.s $f6, $f7 209 0x46 0x07 0x30 0x32 # CHECK: c.eq.s $f6, $f7 210 0x46 0x07 0x30 0x34 # CHECK: c.olt.s $f6, $f7 211 0x46 0x07 0x30 0x35 # CHECK: c.ult.s $f6, $f7 212 0x46 0x07 0x30 0x36 # CHECK: c.ole.s $f6, $f7 [all …]
|
/external/llvm/test/MC/Disassembler/Mips/mips32/ |
D | valid-mips32-el.txt | 13 0x67 0x45 0xc9 0x30 # CHECK: andi $9, $6, 17767 26 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 27 0x30 0x60 0x2e 0x46 # CHECK: c.f.d $f12, $f14 28 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 30 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 32 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 34 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 36 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 38 0x39 0x30 0x07 0x46 # CHECK: c.ngle.s $f6, $f7 40 0x3f 0x30 0x07 0x46 # CHECK: c.ngt.s $f6, $f7 [all …]
|
D | valid-mips32.txt | 58 0x00 0xb3 0x55 0x30 # CHECK: tge $5, $19, 340 74 0x00 0xea 0x00 0x30 # CHECK: tge $7, $10 142 0x30 0x42 0x00 0x04 # CHECK: andi $2, $2, 4 143 0x30 0xc9 0x45 0x67 # CHECK: andi $9, $6, 17767 197 0x46 0x07 0x30 0x30 # CHECK: c.f.s $f6, $f7 198 0x46 0x07 0x30 0x31 # CHECK: c.un.s $f6, $f7 199 0x46 0x07 0x30 0x32 # CHECK: c.eq.s $f6, $f7 200 0x46 0x07 0x30 0x34 # CHECK: c.olt.s $f6, $f7 201 0x46 0x07 0x30 0x35 # CHECK: c.ult.s $f6, $f7 202 0x46 0x07 0x30 0x36 # CHECK: c.ole.s $f6, $f7 [all …]
|
/external/compiler-rt/lib/tsan/rtl/ |
D | tsan_rtl_aarch64.S | 11 stp x29, x30, [sp, -32]! 38 ldp x29, x30, [sp], 32 59 stp x29, x30, [sp, -32]! 86 ldp x29, x30, [sp], 32 107 stp x29, x30, [sp, -32]! 137 ldp x29, x30, [sp], 32 159 stp x29, x30, [sp, -32]! 188 ldp x29, x30, [sp], 32
|
/external/llvm/test/MC/Disassembler/Mips/mips64r3/ |
D | valid-mips64r3-el.txt | 12 0x67 0x45 0xc9 0x30 # CHECK: andi $9, $6, 17767 25 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 26 0x30 0x60 0x2e 0x46 # CHECK: c.f.d $f12, $f14 27 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 29 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 31 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 33 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 35 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 37 0x39 0x30 0x07 0x46 # CHECK: c.ngle.s $f6, $f7 39 0x3f 0x30 0x07 0x46 # CHECK: c.ngt.s $f6, $f7 [all …]
|
/external/llvm/test/MC/Disassembler/Mips/mips64r5/ |
D | valid-mips64r5-el.txt | 12 0x67 0x45 0xc9 0x30 # CHECK: andi $9, $6, 17767 25 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 26 0x30 0x60 0x2e 0x46 # CHECK: c.f.d $f12, $f14 27 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 29 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 31 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 33 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 35 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 37 0x39 0x30 0x07 0x46 # CHECK: c.ngle.s $f6, $f7 39 0x3f 0x30 0x07 0x46 # CHECK: c.ngt.s $f6, $f7 [all …]
|
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | neont2.txt | 339 0xff 0xef 0x30 0x0f 341 0xff 0xff 0x30 0x0f 343 0xff 0xef 0x30 0x0e 345 0xff 0xff 0x30 0x0e 371 0xff 0xef 0x30 0x0f 373 0xff 0xff 0x30 0x0f 375 0xff 0xef 0x30 0x0e 377 0xff 0xff 0x30 0x0e 514 0xc1 0xef 0x30 0x08 516 0xc1 0xef 0x30 0x0a [all …]
|
D | neon.txt | 459 0x30 0x0f 0xff 0xf2 461 0x30 0x0f 0xff 0xf3 463 0x30 0x0e 0xff 0xf2 465 0x30 0x0e 0xff 0xf3 615 0x30 0x08 0xc1 0xf2 617 0x30 0x0a 0xc1 0xf2 619 0x30 0x00 0xc2 0xf2 621 0x30 0x02 0xc2 0xf2 623 0x30 0x04 0xc2 0xf2 625 0x30 0x06 0xc2 0xf2 [all …]
|
D | memory-arm-instructions.txt | 16 0x1e 0x30 0x11 0xe4 39 0x01 0x30 0x98 0xe7 59 0x00 0x30 0xd8 0xe5 80 0x02 0x30 0xf5 0xe7 98 0x04 0x30 0xf1 0xe4 150 0xb0 0x30 0xd4 0xe1 171 0xbb 0x30 0xb8 0xe1 199 0xd0 0x30 0xd4 0xe1 221 0xdb 0x30 0xb8 0xe1 236 0xdc 0x30 0x78 0xe0 [all …]
|
/external/llvm/test/CodeGen/AArch64/ |
D | frameaddr.ll | 7 ; CHECK: stp x29, x30, [sp, #-16]! 10 ; CHECK: ldp x29, x30, [sp], #16 19 ; CHECK: stp x29, x30, [sp, #-16]! 23 ; CHECK: ldp x29, x30, [sp], #16
|
D | alloca.ll | 72 ; CHECK-NOFP-AARCH64: stp x29, x30, [sp, #64] 78 ; CHECK: stp x29, x30, [sp, #-16]! 89 ; CHECK-NOFP-ARM64: stp x29, x30, [sp, #-16]! 108 ; CHECK-NOFP-AARCH64: ldp x29, x30, [sp, #64] 112 ; CHECK-NOFP-ARM64: ldp x29, x30, [sp], #16 121 ; CHECK: stp x29, x30, [sp, #16] 127 ; CHECK-MACHO: stp x29, x30, [sp, #16] 140 ; CHECK: ldp x29, x30, [sp, #16] 144 ; CHECK-MACHO: ldp x29, x30, [sp, #16]
|
/external/llvm/test/CodeGen/PowerPC/ |
D | addisdtprelha-nonr3.mir | 49 - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, callee-saved-register: '%x30' } 53 liveins: %x30, %x30 62 STD killed %x30, 48, %x31 :: (store 8 into %fixed-stack.0, align 16) 65 %x30 = OR8 killed %x3, %x3 68 %x4 = ADDISdtprelHA killed %x30, @x 72 %x30 = LD 48, %x31 :: (load 8 from %fixed-stack.0, align 16)
|
D | aantidep-def-ec.mir | 68 '%x29', '%x30', '%x31', '%cr2eq', '%cr3eq', '%cr4eq', 86 - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, callee-saved-register: '%x30' } 90 liveins: %x3, %x4, %x29, %x30, %x29, %x30 96 STD killed %x30, 128, %x1 :: (store 8 into %fixed-stack.0, align 16) 97 %x30 = OR8 %x4, %x4 104 STW killed %r3, 0, killed %x30 :: (volatile store 4 into %ir.p2) 111 %x30 = LD 128, %x1 :: (load 8 from %fixed-stack.0, align 16)
|
/external/llvm/test/MC/Disassembler/Mips/mips64r2/ |
D | valid-mips64r2-el.txt | 15 0x67 0x45 0xc9 0x30 # CHECK: andi $9, $6, 17767 28 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 29 0x30 0x60 0x2e 0x46 # CHECK: c.f.d $f12, $f14 30 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 32 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 34 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 36 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 38 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 40 0x39 0x30 0x07 0x46 # CHECK: c.ngle.s $f6, $f7 42 0x3f 0x30 0x07 0x46 # CHECK: c.ngt.s $f6, $f7 [all …]
|
/external/llvm/test/MC/AArch64/ |
D | elf-extern.s | 16 str x30, [sp, #8] // 8-byte Folded Spill 18 .cfi_offset x30, -8 21 ldr x30, [sp, #8] // 8-byte Folded Reload
|
/external/llvm/test/MC/Disassembler/Mips/mips64/ |
D | valid-mips64-el.txt | 11 0x67 0x45 0xc9 0x30 # CHECK: andi $9, $6, 17767 24 0x32 0x30 0x07 0x46 # CHECK: c.eq.s $f6, $f7 25 0x30 0x60 0x2e 0x46 # CHECK: c.f.d $f12, $f14 26 0x30 0x30 0x07 0x46 # CHECK: c.f.s $f6, $f7 28 0x3e 0x30 0x07 0x46 # CHECK: c.le.s $f6, $f7 30 0x3c 0x30 0x07 0x46 # CHECK: c.lt.s $f6, $f7 32 0x3d 0x30 0x07 0x46 # CHECK: c.nge.s $f6, $f7 34 0x3b 0x30 0x07 0x46 # CHECK: c.ngl.s $f6, $f7 36 0x39 0x30 0x07 0x46 # CHECK: c.ngle.s $f6, $f7 38 0x3f 0x30 0x07 0x46 # CHECK: c.ngt.s $f6, $f7 [all …]
|