| /art/compiler/optimizing/ |
| D | intrinsics_mips.cc | 1387 __ Lw(out, adr, 0); in VisitMemoryPeekIntNative() local
1406 __ Lw(out_lo, adr, 0); in VisitMemoryPeekLongNative() local
1407 __ Lw(out_hi, adr, 4); in VisitMemoryPeekLongNative() local
1573 __ Lw(trg_lo, TMP, 0); in GenUnsafeGet() local
1574 __ Lw(trg_hi, TMP, 4); in GenUnsafeGet() local
1587 __ Lw(trg, TMP, 0); in GenUnsafeGet() local
1616 __ Lw(trg, TMP, 0); in GenUnsafeGet() local
1633 __ Lw(trg, TMP, 0); in GenUnsafeGet() local
2128 __ Lw(temp1, str, class_offset); in VisitStringEquals() local
2129 __ Lw(temp2, arg, class_offset); in VisitStringEquals() local
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| D | intrinsics_mips64.cc | 1066 __ Lw(out, adr, 0); in VisitMemoryPeekIntNative() local
1217 __ Lw(trg, TMP, 0); in GenUnsafeGet() local
1749 __ Lw(temp1, str, class_offset); in VisitStringEquals() local
1750 __ Lw(temp2, arg, class_offset); in VisitStringEquals() local
1755 __ Lw(temp1, str, count_offset); in VisitStringEquals() local
1756 __ Lw(temp2, arg, count_offset); in VisitStringEquals() local
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| D | code_generator_mips.cc | 3216 __ Lw(TMP, temp, array_length_offset); in VisitCheckCast() local
3222 __ Lw(AT, temp, object_array_data_offset - 2 * kHeapReferenceSize); in VisitCheckCast() local
5857 __ Lw(ZERO, locations->GetTemp(0).AsRegister<Register>(), 0); in HandleFieldGet() local
6009 __ Lw(ZERO, locations->GetTemp(0).AsRegister<Register>(), 0); in HandleFieldSet() local
6935 __ Lw(temp.AsRegister<Register>(), TMP, /* placeholder */ 0x5678); in GenerateStaticOrDirectCall() local
6956 __ Lw(reg, SP, kCurrentMethodStackOffset); in GenerateStaticOrDirectCall() local
7641 __ Lw(ZERO, obj.AsRegister<Register>(), 0); in GenerateImplicitNullCheck() local
8441 __ Lw(TMP, TMP, 0); in GenTableBasedPackedSwitch() local
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| D | code_generator_mips64.cc | 2767 __ Lw(TMP, temp, array_length_offset); in VisitCheckCast() local
5538 __ Lw(ZERO, obj.AsRegister<GpuRegister>(), 0); in GenerateImplicitNullCheck() local
6202 __ Lw(TMP, TMP, 0); in GenTableBasedPackedSwitch() local
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| /art/compiler/utils/mips/ |
| D | assembler_mips_test.cc | 444 TEST_F(AssemblerMIPSTest, Lw) { in TEST_F() argument
2513 __ Lw(mips::RA, mips::T0, 0); in TEST_F() local
2522 __ Lw(mips::T1, mips::T0, 0); in TEST_F() local
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| D | assembler_mips.cc | 672 void MipsAssembler::Lw(Register rt, Register rs, uint16_t imm16) { in Lw() function in art::mips::MipsAssembler
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64_test.cc | 1297 TEST_F(AssemblerMIPS64Test, Lw) { in TEST_F() argument
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| D | assembler_mips64.cc | 564 void Mips64Assembler::Lw(GpuRegister rt, GpuRegister rs, uint16_t imm16) { in Lw() function in art::mips64::Mips64Assembler
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