| /art/compiler/optimizing/ |
| D | intrinsics_mips.cc | 265 __ Sll(TMP, in, 24); in GenReverse() local
267 __ Sll(out, in, 16); in GenReverse() local
281 __ Sll(TMP, in, 16); in GenReverse() local
287 __ Sll(TMP, TMP, 8); in GenReverse() local
298 __ Sll(TMP, TMP, 4); in GenReverse() local
304 __ Sll(TMP, TMP, 2); in GenReverse() local
310 __ Sll(TMP, TMP, 1); in GenReverse() local
333 __ Sll(TMP, in_lo, 16); in GenReverse() local
338 __ Sll(AT, in_hi, 16); in GenReverse() local
346 __ Sll(out_hi, out_hi, 8); in GenReverse() local
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| D | code_generator_mips.cc | 864 __ Sll(index_reg, index_reg, TIMES_4); in EmitNativeCode() local
2232 __ Sll(dst, lhs, shift_value); in HandleShift() local
2241 __ Sll(TMP, lhs, (kMipsBitsPerWord - shift_value) & shift_mask); in HandleShift() local
2285 __ Sll(dst_low, lhs_low, shift_value); in HandleShift() local
2302 __ Sll(dst_low, lhs_low, shift_value); in HandleShift() local
2304 __ Sll(dst_high, lhs_high, shift_value); in HandleShift() local
2308 __ Sll(TMP, lhs_high, kMipsBitsPerWord - shift_value); in HandleShift() local
2313 __ Sll(TMP, lhs_high, kMipsBitsPerWord - shift_value); in HandleShift() local
2318 __ Sll(dst_low, lhs_high, kMipsBitsPerWord - shift_value); in HandleShift() local
2321 __ Sll(dst_high, lhs_low, kMipsBitsPerWord - shift_value); in HandleShift() local
[all …]
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| D | code_generator_mips64.cc | 800 __ Sll(index_reg, index_reg, TIMES_4); in EmitNativeCode() local
1907 __ Sll(dst, lhs, shift_value); in HandleShift() local
3065 __ Sll(out, out, 32 - ctz_imm); in DivRemByPowerOfTwo() local
4485 __ Sll(temp_reg, temp_reg, 31 - LockWord::kReadBarrierStateShift); in GenerateReferenceLoadWithBakerReadBarrier() local
5883 __ Sll(dst, src, 0); in VisitTypeConversion() local
5894 __ Sll(dst, src, 0); in VisitTypeConversion() local
5906 __ Sll(dst, src, 0); in VisitTypeConversion() local
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| /art/compiler/utils/mips/ |
| D | assembler_mips_test.cc | 358 TEST_F(AssemblerMIPSTest, Sll) { in TEST_F() argument
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| D | assembler_mips.cc | 588 void MipsAssembler::Sll(Register rd, Register rt, int shamt) { in Sll() function in art::mips::MipsAssembler
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64_test.cc | 1475 TEST_F(AssemblerMIPS64Test, Sll) { in TEST_F() argument
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| D | assembler_mips64.cc | 476 void Mips64Assembler::Sll(GpuRegister rd, GpuRegister rt, int shamt) { in Sll() function in art::mips64::Mips64Assembler
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