/external/v8/src/arm64/ |
D | simulator-arm64.cc | 2344 int fbits = 64 - instr->FPScale(); in VisitFPFixedPointConvert() local 2716 double Simulator::FixedToDouble(int64_t src, int fbits, FPRounding round) { in FixedToDouble() 2726 double Simulator::UFixedToDouble(uint64_t src, int fbits, FPRounding round) { in UFixedToDouble() 2742 float Simulator::FixedToFloat(int64_t src, int fbits, FPRounding round) { in FixedToFloat() 2752 float Simulator::UFixedToFloat(uint64_t src, int fbits, FPRounding round) { in UFixedToFloat()
|
D | macro-assembler-arm64-inl.h | 1083 unsigned fbits) { in Scvtf() 1187 unsigned fbits) { in Ucvtf()
|
D | assembler-arm64.cc | 2096 unsigned fbits) { in scvtf() 2108 unsigned fbits) { in ucvtf()
|
/external/vixl/src/aarch64/ |
D | logic-aarch64.cc | 86 double Simulator::FixedToDouble(int64_t src, int fbits, FPRounding round) { in FixedToDouble() 97 double Simulator::UFixedToDouble(uint64_t src, int fbits, FPRounding round) { in UFixedToDouble() 113 float Simulator::FixedToFloat(int64_t src, int fbits, FPRounding round) { in FixedToFloat() 124 float Simulator::UFixedToFloat(uint64_t src, int fbits, FPRounding round) { in UFixedToFloat() 4465 int fbits) { in fcvts() 4487 int fbits) { in fcvtu() 4924 int fbits, in scvtf() 4943 int fbits, in ucvtf()
|
D | assembler-aarch64.cc | 2381 void Assembler::fcvtzs(const VRegister& vd, const VRegister& vn, int fbits) { in fcvtzs() 2392 void Assembler::fcvtzu(const Register& rd, const VRegister& vn, int fbits) { in fcvtzu() 2404 void Assembler::fcvtzu(const VRegister& vd, const VRegister& vn, int fbits) { in fcvtzu() 2414 void Assembler::ucvtf(const VRegister& vd, const VRegister& vn, int fbits) { in ucvtf() 2424 void Assembler::scvtf(const VRegister& vd, const VRegister& vn, int fbits) { in scvtf() 2435 void Assembler::scvtf(const VRegister& vd, const Register& rn, int fbits) { in scvtf() 2447 void Assembler::ucvtf(const VRegister& vd, const Register& rn, int fbits) { in ucvtf()
|
D | simulator-aarch64.cc | 2435 int fbits = 64 - instr->GetFPScale(); in VisitFPFixedPointConvert() local
|
/external/vixl/test/aarch64/ |
D | test-simulator-aarch64.cc | 899 for (unsigned fbits = 0; fbits <= d_size; ++fbits) { in TestFPToFixed_Helper() local 1186 for (unsigned fbits = 0; fbits <= d_bits; ++fbits, d++) { in TestFPToFixedS() local 1261 for (unsigned fbits = 0; fbits <= d_bits; ++fbits, d++) { in TestFPToFixedU() local
|
D | test-assembler-aarch64.cc | 12828 for (int fbits = 1; fbits <= 32; fbits++) { in TestUScvtfHelper() local 12841 for (int fbits = 33; fbits <= 64; fbits++) { in TestUScvtfHelper() local 12855 for (int fbits = 0; fbits <= 32; fbits++) { in TestUScvtfHelper() local 12863 for (int fbits = 33; fbits <= 64; fbits++) { in TestUScvtfHelper() local 12982 for (int fbits = 1; fbits <= 32; fbits++) { in TestUScvtf32Helper() local 12995 for (int fbits = 33; fbits <= 64; fbits++) { in TestUScvtf32Helper() local 13009 for (int fbits = 0; fbits <= 32; fbits++) { in TestUScvtf32Helper() local 13017 for (int fbits = 33; fbits <= 64; fbits++) { in TestUScvtf32Helper() local
|
/external/valgrind/VEX/priv/ |
D | guest_arm64_toIR.c | 9389 UInt fbits = 0; in dis_AdvSIMD_scalar_shift_by_imm() local 9427 UInt fbits = 0; in dis_AdvSIMD_scalar_shift_by_imm() local 10744 UInt fbits = 0; in dis_AdvSIMD_shift_by_immediate() local 10790 UInt fbits = 0; in dis_AdvSIMD_shift_by_immediate() local 13415 Int fbits = 64 - sc; in dis_AdvSIMD_fp_to_from_fixedp_conv() local 13466 Int fbits = 64 - sc; in dis_AdvSIMD_fp_to_from_fixedp_conv() local
|
/external/vixl/src/aarch32/ |
D | disasm-aarch32.cc | 4462 int32_t fbits) { in vcvt() 4474 int32_t fbits) { in vcvt() 4486 int32_t fbits) { in vcvt() 24041 uint32_t fbits = in DecodeT32() local 24129 uint32_t fbits = in DecodeT32() local 24442 uint32_t fbits = in DecodeT32() local 24530 uint32_t fbits = in DecodeT32() local 36413 uint32_t fbits = in DecodeT32() local 38579 uint32_t fbits = in DecodeT32() local 48057 uint32_t fbits = 64 - ((instr >> 16) & 0x3f); in DecodeA32() local [all …]
|
D | macro-assembler-aarch32.h | 6406 int32_t fbits) { in Vcvt() 6416 DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) { in Vcvt() 6425 int32_t fbits) { in Vcvt() 6435 DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) { in Vcvt() 6444 int32_t fbits) { in Vcvt() 6454 DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) { in Vcvt()
|
D | assembler-aarch32.h | 4161 DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) { in vcvt() 4172 DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) { in vcvt() 4183 DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) { in vcvt()
|
D | assembler-aarch32.cc | 15126 int32_t fbits) { in vcvt() 15230 int32_t fbits) { in vcvt() 15266 int32_t fbits) { in vcvt()
|