Searched refs:ATA_STSREG_BSY (Results 1 – 5 of 5) sorted by relevance
748 if ((StatusRegister & (ATA_STSREG_DRQ | ATA_STSREG_BSY)) == 0) { in DRQClear()752 if ((StatusRegister & (ATA_STSREG_BSY | ATA_STSREG_ERR)) == ATA_STSREG_ERR) { in DRQClear()810 if ((AltRegister & (ATA_STSREG_DRQ | ATA_STSREG_BSY)) == 0) { in DRQClear2()814 if ((AltRegister & (ATA_STSREG_BSY | ATA_STSREG_ERR)) == ATA_STSREG_ERR) { in DRQClear2()876 if ((StatusRegister & (ATA_STSREG_BSY | ATA_STSREG_DRQ)) == ATA_STSREG_DRQ) { in DRQReady()880 if ((StatusRegister & (ATA_STSREG_BSY | ATA_STSREG_ERR)) == ATA_STSREG_ERR) { in DRQReady()938 if ((AltRegister & (ATA_STSREG_BSY | ATA_STSREG_DRQ)) == ATA_STSREG_DRQ) { in DRQReady2()942 if ((AltRegister & (ATA_STSREG_BSY | ATA_STSREG_ERR)) == ATA_STSREG_ERR) { in DRQReady2()991 if ((StatusRegister & ATA_STSREG_BSY) == 0x00) { in WaitForBSYClear()1036 if ((AltRegister & ATA_STSREG_BSY) == 0x00) { in WaitForBSYClear2()[all …]
184 if ((AltRegister & ATA_STSREG_BSY) == ATA_STSREG_BSY) { in AtapiReadPendingData()187 if ((AltRegister & (ATA_STSREG_BSY | ATA_STSREG_DRQ)) == ATA_STSREG_DRQ) { in AtapiReadPendingData()189 while ((TempWordBuffer & (ATA_STSREG_BSY | ATA_STSREG_DRQ)) == ATA_STSREG_DRQ) { in AtapiReadPendingData()
872 if ((StatusValue & ATA_STSREG_BSY) == 0x00) { in WaitForBSYClear()921 if ((StatusValue & (ATA_STSREG_DRDY | ATA_STSREG_BSY)) == ATA_STSREG_DRDY) { in DRDYReady()925 if ((StatusValue & (ATA_STSREG_ERR | ATA_STSREG_BSY)) == ATA_STSREG_ERR) { in DRDYReady()980 if ((StatusValue & (ATA_STSREG_DRQ | ATA_STSREG_BSY)) == 0) { in DRQClear()984 if ((StatusValue & (ATA_STSREG_BSY | ATA_STSREG_ERR)) == ATA_STSREG_ERR) { in DRQClear()1038 if ((AltStatusValue & (ATA_STSREG_DRQ | ATA_STSREG_BSY)) == 0) { in DRQClear2()1042 if ((AltStatusValue & (ATA_STSREG_BSY | ATA_STSREG_ERR)) == ATA_STSREG_ERR) { in DRQClear2()1100 if ((StatusValue & (ATA_STSREG_BSY | ATA_STSREG_DRQ)) == ATA_STSREG_DRQ) { in DRQReady()1104 if ((StatusValue & (ATA_STSREG_BSY | ATA_STSREG_ERR)) == ATA_STSREG_ERR) { in DRQReady()1159 if ((AltStatusValue & (ATA_STSREG_BSY | ATA_STSREG_DRQ)) == ATA_STSREG_DRQ) { in DRQReady2()[all …]
321 if ((StatusRegister & ATA_STSREG_BSY) == 0) { in CheckStatusRegister()376 if ((StatusRegister & ATA_STSREG_BSY) == 0) { in DRQClear()439 if ((AltRegister & ATA_STSREG_BSY) == 0) { in DRQClear2()509 if ((StatusRegister & ATA_STSREG_BSY) == 0) { in DRQReady()583 if ((AltRegister & ATA_STSREG_BSY) == 0) { in DRQReady2()653 if ((StatusRegister & ATA_STSREG_BSY) == 0) { in DRDYReady()724 if ((AltRegister & ATA_STSREG_BSY) == 0) { in DRDYReady2()790 if ((StatusRegister & ATA_STSREG_BSY) == 0x00) { in WaitForBSYClear()844 if ((AltStatusRegister & ATA_STSREG_BSY) == 0x00) { in WaitForBSYClear2()1877 if ((AltRegister & ATA_STSREG_BSY) == ATA_STSREG_BSY) { in AtaPacketReadPendingData()[all …]
656 #define ATA_STSREG_BSY BIT7 ///< Controller Busy defined from ATA-1 macro