| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/ |
| D | meminit.c | 558 …Q_CH_OFFSET)), tempD, ((BIT28|BIT27|BIT26|BIT25|BIT24)|(BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT12|BIT1… in ddrphy_init()
566 …SET) + (channel_i * DDRIODQ_CH_OFFSET)), tempD, ((BIT21|BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT13|BIT1… in ddrphy_init()
567 …SET) + (channel_i * DDRIODQ_CH_OFFSET)), tempD, ((BIT21|BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT13|BIT1… in ddrphy_init()
573 …SET) + (channel_i * DDRIODQ_CH_OFFSET)), tempD, ((BIT21|BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT15|BIT1… in ddrphy_init()
574 …SET) + (channel_i * DDRIODQ_CH_OFFSET)), tempD, ((BIT21|BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT15|BIT1… in ddrphy_init()
578 …, (((tCAS+7)<<16)|((tCAS-4)<<8)|((tCWL-2)<<0)), ((BIT21|BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT12|BIT1… in ddrphy_init()
579 …, (((tCAS+7)<<16)|((tCAS-4)<<8)|((tCWL-2)<<0)), ((BIT21|BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT12|BIT1… in ddrphy_init()
603 …0|BIT29|BIT28|BIT27|BIT26|BIT25|BIT24|BIT23|BIT22|BIT21|BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT15|BIT1… in ddrphy_init()
604 …BIT29|BIT28)|(BIT27|BIT26|BIT25|BIT24|BIT23|BIT22|BIT21|BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT15|BIT1… in ddrphy_init()
605 …BIT29|BIT28|BIT27|BIT26|BIT25|BIT24)|(BIT23|BIT22|BIT21|BIT20|BIT19|BIT18|BIT17|BIT16)|(BIT15|BIT1… in ddrphy_init()
[all …]
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| D | general_definitions.h | 34 #undef BIT17
70 #define BIT17 0x00020000U macro
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| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Include/Guid/ |
| D | BoardFeatures.h | 62 #define B_BOARD_FEATURES_FORM_FACTOR_MASK (BIT15|BIT16|BIT17|BIT18|BIT19)
65 #define B_BOARD_FEATURES_FORM_FACTOR_BTX BIT17
156 #define B_BOARD_FEATURES_FORM_FACTOR_MASK (BIT15|BIT16|BIT17|BIT18|BIT19|BIT20)
159 #define B_BOARD_FEATURES_FORM_FACTOR_BTX BIT17
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| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Include/ |
| D | QuarkNcSocId.h | 235 #define NON_HOST_SMM_RD_OPEN (BIT17) // SMM Writes OPEN
293 #define B_TSCGF1_CONFIG_IBGEN BIT17
323 #define SOCCLKEN_CONFIG_SBI_RST_100_CORE_B BIT17
480 #define B_QNC_GPE0BLK_GPE0S_PCIE (BIT17) // PCIE
487 #define B_QNC_GPE0BLK_GPE0E_PCIE (BIT17) // PCIE
658 #define B_QNC_PCIE_LCAP_EL1_MASK (BIT17 | BIT16 | BIT15) //L1 Exit latency mask
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| /device/linaro/bootloader/edk2/Omap35xxPkg/Include/Omap3530/ |
| D | Omap3530Prcm.h | 124 #define CM_FCLKEN_PER_EN_GPIO6_ENABLE BIT17
149 #define CM_ICLKEN_PER_EN_GPIO6_ENABLE BIT17
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| D | Omap3530Dma.h | 106 #define DMA4_CCR_TRANSPARENT_COPY_ENABLE BIT17
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| D | Omap3530MMCHS.h | 128 #define CCRC_EN BIT17
143 #define CCRC_SIGEN BIT17
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| /device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/Include/Omap3530/ |
| D | Omap3530Prcm.h | 124 #define CM_FCLKEN_PER_EN_GPIO6_ENABLE BIT17
149 #define CM_ICLKEN_PER_EN_GPIO6_ENABLE BIT17
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| D | Omap3530Dma.h | 106 #define DMA4_CCR_TRANSPARENT_COPY_ENABLE BIT17
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| D | Omap3530MMCHS.h | 128 #define CCRC_EN BIT17
143 #define CCRC_SIGEN BIT17
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| /device/linaro/bootloader/edk2/EmbeddedPkg/Drivers/Lan9118Dxe/ |
| D | Lan9118DxeHw.h | 115 #define INSTS_PME_INT BIT17 // PME Signal detected
211 #define MACCR_INVFILT BIT17 // Enable Inverse Filtering bit
257 #define GPIO_GPIO1_PUSH_PULL BIT17
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| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/PchRegs/ |
| D | PchRegsPcu.h | 556 #define B_PCH_SMI_EN_LEGACY_USB2 BIT17 // Legacy USB 2 Enable
588 #define B_PCH_SMI_STS_LEGACY_USB2 BIT17 // Legacy USB 2 Status
633 #define B_PCH_ACPI_GPE_CNTL_SWGPE_CTRL BIT17 // Software GPE Control
647 #define B_PCH_TCO_STS_SECOND_TO BIT17 // Second Timeout Status
761 #define B_PCH_PMC_FUNC_DIS_SATA BIT17 // SATA Disable
803 #define B_PCH_PMC_GPI_ROUT_8 (BIT17 | BIT16)
853 #define B_PCH_PMC_PSS_PG_STS_USB_SUS BIT17 // USB SUS
884 #define B_PCH_PMC_D3_STS_0_SATA BIT17 // SATA
921 #define B_PCH_PMC_D3_STDBY_STS_0_SATA BIT17 // SATA
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| D | PchRegsPcie.h | 77 #define B_PCH_PCIE_SLCTL_SLSTS_PFD BIT17 // Power Fault Detected
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| /device/linaro/bootloader/edk2/ArmPlatformPkg/Include/Drivers/ |
| D | SP804Timer.h | 50 #define SP810_SYS_CTRL_TIMER1_TIMCLK BIT17 // 0=REFCLK, 1=TIMCLK
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| /device/linaro/bootloader/edk2/SecurityPkg/Include/Library/ |
| D | Tcg2PhysicalPresenceLib.h | 45 #define TCG2_BIOS_STORAGE_MANAGEMENT_FLAG_PP_REQUIRED_FOR_DISABLE_BLOCK_SID BIT17
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| /device/linaro/bootloader/edk2/OvmfPkg/Include/IndustryStandard/ |
| D | VirtioNet.h | 58 #define VIRTIO_NET_F_CTRL_VQ BIT17 // control channel available
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| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Include/ |
| D | CommonIncludes.h | 99 #define BIT17 0x00020000
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| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/ |
| D | AhciMode.h | 129 #define EFI_AHCI_PORT_CMD_PMA BIT17
170 #define EFI_AHCI_PORT_SERR_PIE BIT17
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| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/XhciPei/ |
| D | XhciReg.h | 89 #define XHC_PORTSC_CSC BIT17 // Connect Status Change
104 #define XHC_HUB_PORTSC_PEC BIT17 // Hub's Port Enabled/Disabled Change
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| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/XhciDxe/ |
| D | XhciReg.h | 174 #define XHC_PORTSC_CSC BIT17 // Connect Status Change
189 #define XHC_HUB_PORTSC_PEC BIT17 // Hub's Port Enabled/Disabled Change
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| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/ |
| D | PchRegs.h | 63 #define BIT17 0x00020000 macro
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| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Include/ |
| D | Ioh.h | 46 #define BIT17 0x00020000 macro
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| /device/linaro/bootloader/edk2/OvmfPkg/SataControllerDxe/ |
| D | SataController.h | 42 #define B_AHCI_CAP_SPM BIT17 // Supports Port Multiplier
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| /device/linaro/bootloader/edk2/DuetPkg/SataControllerDxe/ |
| D | SataController.h | 42 #define B_AHCI_CAP_SPM BIT17 // Supports Port Multiplier
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| /device/linaro/bootloader/edk2/ArmPlatformPkg/Drivers/PL180MciDxe/ |
| D | PL180Mci.h | 100 #define MCI_STATUS_CMD_RXFIFOFULL BIT17
|