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/external/llvm/test/MC/Sparc/
Dsparc-ctrl-instructions.s47 ! CHECK: ba .BB0 ! encoding: [0x10,0b10AAAAAA,A,A]
48 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
49 ba .BB0
51 ! CHECK: bne .BB0 ! encoding: [0x12,0b10AAAAAA,A,A]
52 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
53 bne .BB0
55 ! CHECK: bne .BB0 ! encoding: [0x12,0b10AAAAAA,A,A]
56 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
57 bnz .BB0
59 ! CHECK: be .BB0 ! encoding: [0x02,0b10AAAAAA,A,A]
[all …]
Dsparc64-ctrl-instructions.s4 ! CHECK: bne %xcc, .BB0 ! encoding: [0x12,0b01101AAA,A,A]
5 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
6 bne %xcc, .BB0
8 ! CHECK: be %xcc, .BB0 ! encoding: [0x02,0b01101AAA,A,A]
9 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
10 be %xcc, .BB0
12 ! CHECK: bg %xcc, .BB0 ! encoding: [0x14,0b01101AAA,A,A]
13 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br19
14 bg %xcc, .BB0
16 ! CHECK: ble %xcc, .BB0 ! encoding: [0x04,0b01101AAA,A,A]
[all …]
Dsparc-little-endian.s5 .BB0: label
15 ! CHECK: ba .BB0 ! encoding: [A,A,0b10AAAAAA,0x10]
16 ! CHECK-NEXT: ! fixup A - offset: 0, value: .BB0, kind: fixup_sparc_br22
18 ba .BB0
/external/llvm/unittests/IR/
DDominatorTreeTest.cpp36 BasicBlock *BB0 = &*FI++; in runOnFunction() local
37 BasicBlock::iterator BBI = BB0->begin(); in runOnFunction()
61 EXPECT_TRUE(DT->isReachableFromEntry(BB0)); in runOnFunction()
68 EXPECT_TRUE(DT->dominates(BB0, BB0)); in runOnFunction()
69 EXPECT_TRUE(DT->dominates(BB0, BB1)); in runOnFunction()
70 EXPECT_TRUE(DT->dominates(BB0, BB2)); in runOnFunction()
71 EXPECT_TRUE(DT->dominates(BB0, BB3)); in runOnFunction()
72 EXPECT_TRUE(DT->dominates(BB0, BB4)); in runOnFunction()
74 EXPECT_FALSE(DT->dominates(BB1, BB0)); in runOnFunction()
80 EXPECT_FALSE(DT->dominates(BB2, BB0)); in runOnFunction()
[all …]
/external/llvm/test/CodeGen/Mips/
Datomic.ll37 ; O0: $[[BB0:[A-Z_0-9]+]]:
41 ; ALL: $[[BB0:[A-Z_0-9]+]]:
45 ; NOT-MICROMIPS: beqz $[[R4]], $[[BB0]]
46 ; MICROMIPS: beqzc $[[R4]], $[[BB0]]
47 ; MIPSR6: beqzc $[[R4]], $[[BB0]]
62 ; ALL: $[[BB0:[A-Z_0-9]+]]:
67 ; NOT-MICROMIPS: beqz $[[R2]], $[[BB0]]
68 ; MICROMIPS: beqzc $[[R2]], $[[BB0]]
69 ; MIPSR6: beqzc $[[R2]], $[[BB0]]
85 ; ALL: $[[BB0:[A-Z_0-9]+]]:
[all …]
Docteon.ll94 ; OCTEON: bbit0 $4, 3, $[[BB0:BB[0-9_]+]]
96 ; MIPS64: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
110 ; OCTEON: bbit032 $4, 3, $[[BB0:BB[0-9_]+]]
114 ; MIPS64: bnez $[[T2]], $[[BB0:BB[0-9_]+]]
128 ; OCTEON: bbit1 $4, 3, $[[BB0:BB[0-9_]+]]
130 ; MIPS64: beqz $[[T0]], $[[BB0:BB[0-9_]+]]
144 ; OCTEON: bbit132 $4, 3, $[[BB0:BB[0-9_]+]]
148 ; MIPS64: beqz $[[T2]], $[[BB0:BB[0-9_]+]]
Dlongbranch.ll38 ; CHECK: beqz $4, $[[BB0:BB[0-9_]+]]
43 ; CHECK: $[[BB0]]:
56 ; O32: bnez $4, $[[BB0:BB[0-9_]+]]
71 ; O32: $[[BB0]]:
87 ; N64: bnez $4, $[[BB0:BB[0-9_]+]]
103 ; N64: $[[BB0]]:
122 ; MICROMIPS: bnez $4, $[[BB0:BB[0-9_]+]]
137 ; MICROMIPS: $[[BB0]]:
151 ; NACL: bnez $4, $[[BB0:BB[0-9_]+]]
167 ; NACL: $[[BB0]]:
Dmicromips-atomic.ll13 ; CHECK: $[[BB0:[A-Z_0-9]+]]:
17 ; CHECK: beqzc $[[R2]], $[[BB0]]
/external/swiftshader/third_party/LLVM/test/CodeGen/Mips/
Datomic.ll12 ; CHECK: $[[BB0:[A-Z_0-9]+]]:
16 ; CHECK: beq $[[R2]], $zero, $[[BB0]]
26 ; CHECK: $[[BB0:[A-Z_0-9]+]]:
31 ; CHECK: beq $[[R2]], $zero, $[[BB0]]
44 ; CHECK: $[[BB0:[A-Z_0-9]+]]:
47 ; CHECK: beq $[[R2]], $zero, $[[BB0]]
60 ; CHECK: $[[BB0:[A-Z_0-9]+]]:
64 ; CHECK: beq $[[R2]], $zero, $[[BB0]]
88 ; CHECK: $[[BB0:[A-Z_0-9]+]]:
95 ; CHECK: beq $[[R14]], $zero, $[[BB0]]
[all …]
/external/swiftshader/third_party/LLVM/test/Transforms/SimplifyCFG/
Dindirectbr.ll6 ; CHECK: indirectbr i8* %t, [label %BB0, label %BB1, label %BB2]
7 ; CHECK: %x = phi i32 [ 0, %BB0 ], [ 1, %entry ]
16 store i8* blockaddress(@indbrtest0, %BB0), i8** %P
21 indirectbr i8* %t, [label %BB0, label %BB1, label %BB2, label %BB0, label %BB1, label %BB2]
22 BB0:
26 %x = phi i32 [ 0, %BB0 ], [ 1, %entry ], [ 1, %entry ]
39 ; CHECK: br label %BB0
43 store i8* blockaddress(@indbrtest1, %BB0), i8** %P
46 indirectbr i8* %t, [label %BB0, label %BB0]
47 BB0:
[all …]
/external/llvm/test/Transforms/SimplifyCFG/
Dindirectbr.ll6 ; CHECK: indirectbr i8* %t, [label %BB0, label %BB1, label %BB2]
7 ; CHECK: %x = phi i32 [ 0, %BB0 ], [ 1, %entry ]
16 store i8* blockaddress(@indbrtest0, %BB0), i8** %P
21 indirectbr i8* %t, [label %BB0, label %BB1, label %BB2, label %BB0, label %BB1, label %BB2]
22 BB0:
26 %x = phi i32 [ 0, %BB0 ], [ 1, %entry ], [ 1, %entry ]
39 ; CHECK: br label %BB0
43 store i8* blockaddress(@indbrtest1, %BB0), i8** %P
46 indirectbr i8* %t, [label %BB0, label %BB0]
47 BB0:
[all …]
/external/llvm/test/Transforms/ConstProp/
Dphi.ll7 BB0:
10 BB1: ; preds = %BB0
13 BB3: ; preds = %BB1, %BB0
14 %Ret = phi i32 [ 1, %BB0 ], [ 1, %BB1 ] ; <i32> [#uses=1]
/external/swiftshader/third_party/LLVM/test/Transforms/ConstProp/
Dphi.ll7 BB0:
10 BB1: ; preds = %BB0
13 BB3: ; preds = %BB1, %BB0
14 %Ret = phi i32 [ 1, %BB0 ], [ 1, %BB1 ] ; <i32> [#uses=1]
/external/llvm/unittests/Analysis/
DBlockFrequencyInfoTest.cpp65 BasicBlock &BB0 = F->getEntryBlock(); in TEST_F() local
66 BasicBlock *BB1 = BB0.getTerminator()->getSuccessor(0); in TEST_F()
67 BasicBlock *BB2 = BB0.getTerminator()->getSuccessor(1); in TEST_F()
70 uint64_t BB0Freq = BFI.getBlockFreq(&BB0).getFrequency(); in TEST_F()
79 EXPECT_EQ(BFI.getBlockProfileCount(&BB0).getValue(), UINT64_C(100)); in TEST_F()
/external/llvm/test/CodeGen/Mips/llvm-ir/
Dselect-int.ll38 ; M2-M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
41 ; M2-M3: $[[BB0]]:
73 ; M2-M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
76 ; M2-M3: $[[BB0]]:
108 ; M2-M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
111 ; M2-M3: $[[BB0]]:
143 ; M2: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
146 ; M2: $[[BB0]]:
173 ; M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
176 ; M3: $[[BB0]]:
[all …]
Dselect-dbl.ll37 ; M2: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
42 ; M2: $[[BB0]]:
61 ; M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
64 ; M3: $[[BB0]]:
92 ; M2: bnez $[[T1]], $[[BB0:BB[0-9_]+]]
95 ; M2: $[[BB0]]:
109 ; M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
112 ; M3: $[[BB0]]:
138 ; M2-M3: bc1t $[[BB0:BB[0-9_]+]]
142 ; M2-M3: $[[BB0]]:
[all …]
Dselect-flt.ll37 ; M2-M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
42 ; M2-M3: $[[BB0]]:
79 ; M2-M3: bnez $[[T0]], $[[BB0:BB[0-9_]+]]
83 ; M2-M3: $[[BB0]]:
115 ; M2-M3: bc1t $[[BB0:BB[0-9_]+]]
119 ; M2-M3: $[[BB0]]:
152 ; M2-M3: bc1t $[[BB0:BB[0-9_]+]]
156 ; M2-M3: $[[BB0]]:
189 ; M2-M3: bc1f $[[BB0:BB[0-9_]+]]
193 ; M2-M3: $[[BB0]]:
[all …]
Dlshr.ll84 ; M2: bnez $[[T1]], $[[BB0:BB[0-9_]+]]
91 ; M2: $[[BB0]]:
161 ; M3: bnez $[[T3:[0-9]+]], $[[BB0:BB[0-9_]+]]
168 ; M3: $[[BB0]]:
Dashr.ll86 ; M2: bnez $[[T1]], $[[BB0:BB[0-9_]+]]
93 ; M2: $[[BB0]]:
170 ; M3: bnez $[[T3:[0-9]+]], $[[BB0:BB[0-9_]+]]
177 ; M3: $[[BB0]]:
/external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/
Dphi.ll8 BB0:
13 %B = phi i32 [ %A, %BB0 ]
24 BB0:
32 %B = phi i32 [ %A, %BB0 ], [ %A, %BB1 ]
40 BB0:
45 %B = phi i32 [ %A, %BB0 ], [ %B, %Loop ]
56 BB0:
73 BB0:
76 Loop: ; preds = %Loop, %BB0
78 %B = phi i32 [ %A, %BB0 ], [ undef, %Loop ]
[all …]
/external/llvm/test/Transforms/SafeStack/
Dphi.ll9 ; CHECK: br i1 %d1, label %[[BB0:.*]], label %[[BB1:.*]]
15 ; CHECK: [[BB0]]:
29 ; CHECK: phi i32* [ %[[AUNSAFE]], %[[BB0]] ], [ %[[AUNSAFE]], %[[BB0]] ], [ %[[BUNSAFE]], %[[BB1]] ]
/external/llvm/test/Transforms/InstCombine/
Dphi.ll8 BB0:
13 %B = phi i32 [ %A, %BB0 ]
24 BB0:
32 %B = phi i32 [ %A, %BB0 ], [ %A, %BB1 ]
40 BB0:
45 %B = phi i32 [ %A, %BB0 ], [ %B, %Loop ]
56 BB0:
73 BB0:
76 Loop: ; preds = %Loop, %BB0
78 %B = phi i32 [ %A, %BB0 ], [ undef, %Loop ]
[all …]
/external/llvm/test/CodeGen/AArch64/
Dlarge_shift.ll13 br i1 %t1, label %BB1, label %BB0
15 BB0:
/external/llvm/test/CodeGen/AMDGPU/
Duniform-crash.ll24 ; GCN: s_cbranch_scc1 [[BB0:[A-Z0-9_]+]]
27 ; GCN: {{^}}[[BB0]]:
/external/llvm/lib/Transforms/Scalar/
DMergedLoadStoreMotion.cpp219 BasicBlock *BB0 = Load0->getParent(); in canHoistFromBlock() local
220 BasicBlock *Head = BB0->getSinglePredecessor(); in canHoistFromBlock()
239 !isLoadHoistBarrierInRange(BB0->front(), *Load0, Load0, in canHoistFromBlock()
381 BasicBlock *BB0 = Store0->getParent(); in canSinkFromBlock() local
391 !isStoreSinkBarrierInRange(*Store0->getNextNode(), BB0->back(), Loc0)) { in canSinkFromBlock()

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