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Searched refs:FCC0 (Results 1 – 25 of 32) sorted by relevance

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/external/llvm/lib/Target/Mips/InstPrinter/
DMipsInstPrinter.cpp249 return isReg<Mips::FCC0>(MI, 0) && printAlias("bc1t", MI, 1, OS); in printAlias()
252 return isReg<Mips::FCC0>(MI, 0) && printAlias("bc1f", MI, 1, OS); in printAlias()
/external/llvm/lib/Target/Sparc/
DSparcInstrAliases.td490 def : InstAlias<"fcmps $rs1, $rs2", (V9FCMPS FCC0, FPRegs:$rs1, FPRegs:$rs2)>;
491 def : InstAlias<"fcmpd $rs1, $rs2", (V9FCMPD FCC0, DFPRegs:$rs1, DFPRegs:$rs2)>;
492 def : InstAlias<"fcmpq $rs1, $rs2", (V9FCMPQ FCC0, QFPRegs:$rs1, QFPRegs:$rs2)>,
495 def : InstAlias<"fcmpes $rs1, $rs2", (V9FCMPES FCC0, FPRegs:$rs1, FPRegs:$rs2)>;
496 def : InstAlias<"fcmped $rs1, $rs2", (V9FCMPED FCC0, DFPRegs:$rs1,
498 def : InstAlias<"fcmpeq $rs1, $rs2", (V9FCMPEQ FCC0, QFPRegs:$rs1,
DSparcInstrInfo.td451 let usesCustomInserter = 1, Uses = [FCC0] in {
866 let Uses = [FCC0] in {
1293 let Defs = [FCC0], rd = 0, isCodeGenOnly = 1 in {
1363 let Uses = [FCC0], intcc = 0, cc = 0b00 in {
1396 let Uses = [FCC0], intcc = 0, opf_cc = 0b00 in {
/external/llvm/lib/Target/Sparc/InstPrinter/
DSparcInstPrinter.cpp88 || (MI->getOperand(0).getReg() != SP::FCC0)) in printSparcAliasInstr()
/external/llvm/lib/Target/Mips/
DMipsInstrFPU.td230 let Defs = [FCC0];
593 def : MipsInstAlias<"bc1t $offset", (BC1T FCC0, brtarget:$offset)>,
595 def : MipsInstAlias<"bc1tl $offset", (BC1TL FCC0, brtarget:$offset)>,
597 def : MipsInstAlias<"bc1f $offset", (BC1F FCC0, brtarget:$offset)>,
599 def : MipsInstAlias<"bc1fl $offset", (BC1FL FCC0, brtarget:$offset)>,
DMipsISelLowering.cpp570 SDValue FCC0 = DAG.getRegister(Mips::FCC0, MVT::i32); in createCMovFP() local
573 True.getValueType(), True, FCC0, False, Cond); in createCMovFP()
1716 SDValue FCC0 = DAG.getRegister(Mips::FCC0, MVT::i32); in lowerBRCOND() local
1718 FCC0, Dest, CondRes); in lowerBRCOND()
DMipsFastISel.cpp707 Mips::FCC0, RegState::ImplicitDefine); in emitCmp()
710 .addReg(Mips::FCC0) in emitCmp()
/external/llvm/lib/Target/Sparc/Disassembler/
DSparcDisassembler.cpp108 SP::FCC0, SP::FCC1, SP::FCC2, SP::FCC3 };
/external/llvm/lib/Target/Sparc/AsmParser/
DSparcAsmParser.cpp1038 RegNo = Sparc::FCC0 + intVal; in matchRegisterName()
/external/icu/icu4c/source/data/unidata/norm2/
Dnfkc.txt1731 FCC0>0641 062E
Dnfkc_cf.txt3247 FCC0>0641 062E
Duts46.txt5056 FCC0 >0641 062E # 1.1 ARABIC LIGATURE FEH WITH KHAH INITIAL FORM
/external/icu/icu4c/source/data/unidata/
DDerivedNormalizationProps.txt6123 FCC0 ; NFKC_CF; 0641 062E
DNormalizationTest.txt14441 FCC0;FCC0;FCC0;0641 062E;0641 062E;
Dconfusables.txt4834 FCC0 ; 0641 062E ; MA # ( ‎ﳀ‎ → ‎فخ‎ ) ARABIC LIGATURE FEH WITH KHAH INITIAL FORM → ARABIC LETTER F…
/external/icu/icu4c/source/test/testdata/
DNormalizationTest-3.2.0.txt14168 FCC0;FCC0;FCC0;0641 062E;0641 062E;
DCollationTest_NON_IGNORABLE_SHORT.txt76218 FCC0 0021
76220 FCC0 003F
76222 FCC0 0061
76223 FCC0 0041
76226 FCC0 0062
DCollationTest_SHIFTED_SHORT.txt81426 FCC0 0021
81427 FCC0 003F
81430 FCC0 0061
81431 FCC0 0041
81434 FCC0 0062
/external/icu/android_icu4j/src/main/tests/android/icu/dev/data/
DCollationTest_SHIFTED_SHORT.txt81424 FCC0 0021
81425 FCC0 003F
81428 FCC0 0061
81429 FCC0 0041
81432 FCC0 0062
DCollationTest_NON_IGNORABLE_SHORT.txt76216 FCC0 0021
76218 FCC0 003F
76220 FCC0 0061
76221 FCC0 0041
76224 FCC0 0062
/external/icu/icu4j/main/tests/collate/src/com/ibm/icu/dev/data/
DCollationTest_NON_IGNORABLE_SHORT.txt76216 FCC0 0021
76218 FCC0 003F
76220 FCC0 0061
76221 FCC0 0041
76224 FCC0 0062
DCollationTest_SHIFTED_SHORT.txt81424 FCC0 0021
81425 FCC0 003F
81428 FCC0 0061
81429 FCC0 0041
81432 FCC0 0062
/external/icu/android_icu4j/src/main/tests/android/icu/dev/data/unicode/
DNormalizationTest.txt14441 FCC0;FCC0;FCC0;0641 062E;0641 062E;
/external/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/data/unicode/
DNormalizationTest.txt14441 FCC0;FCC0;FCC0;0641 062E;0641 062E;
Dconfusables.txt4832 FCC0 ; 0641 062E ; MA # ( ‎ﳀ‎ → ‎فخ‎ ) ARABIC LIGATURE FEH WITH KHAH INITIAL FORM → ARABIC LETTER F…

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