Searched refs:FMINNAN (Results 1 – 13 of 13) sorted by relevance
/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 535 FMINNAN, FMAXNAN, enumerator
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D | BasicTTIImpl.h | 771 ISDs.push_back(ISD::FMINNAN); in getIntrinsicInstrCost()
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D | SelectionDAG.h | 1188 case ISD::FMINNAN:
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 155 case ISD::FMINNAN: return "fminnan"; in getOperationName()
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D | LegalizeVectorOps.cpp | 305 case ISD::FMINNAN: in LegalizeOp()
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D | SelectionDAGBuilder.cpp | 2784 case SPNB_RETURNS_NAN: Opc = ISD::FMINNAN; break; in visitSelect() 2789 else if (TLI.isOperationLegalOrCustom(ISD::FMINNAN, VT)) in visitSelect() 2790 Opc = ISD::FMINNAN; in visitSelect() 2793 ISD::FMINNUM : ISD::FMINNAN; in visitSelect() 5209 I.hasNoNaNs() && TLI.isOperationLegalOrCustom(ISD::FMINNAN, VT) in visitIntrinsicCall() 5210 ? ISD::FMINNAN in visitIntrinsicCall()
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D | LegalizeVectorTypes.cpp | 112 case ISD::FMINNAN: in ScalarizeVectorResult() 677 case ISD::FMINNAN: in SplitVectorResult() 2093 case ISD::FMINNAN: in WidenVectorResult()
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D | LegalizeFloatTypes.cpp | 1890 case ISD::FMINNAN: in PromoteFloatResult()
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/external/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyISelLowering.cpp | 90 setOperationAction(ISD::FMINNAN, T, Legal); in WebAssemblyTargetLowering()
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/external/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 870 setOperationAction(ISD::FMINNAN, VT, Expand); in initActions()
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/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 437 def fminnan : SDNode<"ISD::FMINNAN" , SDTFPBinOp>;
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 294 setOperationAction(ISD::FMINNAN, MVT::f16, Promote); in AArch64TargetLowering() 386 setOperationAction(ISD::FMINNAN, Ty, Legal); in AArch64TargetLowering() 704 for (unsigned Opcode : {ISD::FMINNAN, ISD::FMAXNAN, in addTypeForNEON() 8558 return DAG.getNode(ISD::FMINNAN, SDLoc(N), N->getValueType(0), in performIntrinsicCombine()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 1016 setOperationAction(ISD::FMINNAN, MVT::f32, Legal); in ARMTargetLowering() 1018 setOperationAction(ISD::FMINNAN, MVT::v2f32, Legal); in ARMTargetLowering() 1020 setOperationAction(ISD::FMINNAN, MVT::v4f32, Legal); in ARMTargetLowering() 2992 ? ISD::FMINNAN : ISD::FMAXNAN; in LowerINTRINSIC_WO_CHAIN()
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