| /external/llvm/lib/Target/X86/ |
| D | X86WinAllocaExpander.cpp | 44 enum Lowering { TouchAndSub, Sub, Probe }; enum in __anonf218f6140111::X86WinAllocaExpander
47 typedef MapVector<MachineInstr*, Lowering> LoweringMap;
53 Lowering getLowering(int64_t CurrentOffset, int64_t AllocaAmount);
56 void lower(MachineInstr* MI, Lowering L);
99 X86WinAllocaExpander::Lowering
163 Lowering L = getLowering(Offset, Amount); in computeLowerings()
201 void X86WinAllocaExpander::lower(MachineInstr* MI, Lowering L) { in lower()
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| /external/llvm/lib/LTO/ |
| D | UpdateCompilerUsed.cpp | 75 const TargetLowering *Lowering = in initializeLibCalls() local
78 if (Lowering && TLSet.insert(Lowering).second) in initializeLibCalls()
84 Lowering->getLibcallName(static_cast<RTLIB::Libcall>(I))) in initializeLibCalls()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelDAGToDAG.cpp | 224 const SITargetLowering& Lowering = in glueCopyToM0() local
229 SDValue M0 = Lowering.copyToM0(*CurDAG, CurDAG->getEntryNode(), SDLoc(N), in glueCopyToM0()
458 const SITargetLowering& Lowering = in Select() local
460 Lowering.legalizeTargetIndependentNode(N, *CurDAG); in Select()
886 const SITargetLowering& Lowering = in SelectMUBUFAddr64() local
889 SRsrc = SDValue(Lowering.wrapAddr64Rsrc(*CurDAG, DL, Ptr), 0); in SelectMUBUFAddr64()
956 const SITargetLowering& Lowering = in SelectMUBUFOffset() local
959 SRsrc = SDValue(Lowering.buildRSRC(*CurDAG, DL, Ptr, 0, Rsrc), 0); in SelectMUBUFOffset()
1551 const AMDGPUTargetLowering& Lowering = in PostprocessISelDAG() local
1562 SDNode *ResNode = Lowering.PostISelFolding(MachineNode, *CurDAG); in PostprocessISelDAG()
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| D | EvergreenInstructions.td | 618 // XXX: Lowering SELECT_CC will sometimes generate fp_to_[su]int nodes,
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| /external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
| D | XCoreISelDAGToDAG.cpp | 40 const XCoreTargetLowering &Lowering; member in __anon2b157bcd0111::XCoreDAGToDAGISel
46 Lowering(*TM.getTargetLowering()), in XCoreDAGToDAGISel()
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| /external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
| D | MSP430ISelDAGToDAG.cpp | 93 const MSP430TargetLowering &Lowering; member in __anon4a0096d90411::MSP430DAGToDAGISel
99 Lowering(*TM.getTargetLowering()), in MSP430DAGToDAGISel()
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| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| D | SystemZISelDAGToDAG.cpp | 82 const SystemZTargetLowering &Lowering; member in __anondb4f7e890411::SystemZDAGToDAGISel
94 Lowering(*TM.getTargetLowering()), in SystemZDAGToDAGISel()
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| /external/llvm/test/CodeGen/ARM/ |
| D | vector-DAGCombine.ll | 211 ; Lowering to build vector was breaking the single use property of the load of
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 2852 static unsigned EnsureStackAlignment(const PPCFrameLowering *Lowering, in EnsureStackAlignment() argument
2854 unsigned TargetAlign = Lowering->getStackAlignment(); in EnsureStackAlignment()
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| /external/llvm/docs/ |
| D | LangRef.rst | 12454 Lowering:
|