Searched refs:SCVTF (Results 1 – 9 of 9) sorted by relevance
| /external/v8/src/arm64/ |
| D | constants-arm64.h | 1191 SCVTF = FPIntegerConvertFixed | 0x00020000, enumerator
1192 SCVTF_sw = SCVTF,
1193 SCVTF_sx = SCVTF | SixtyFourBits,
1194 SCVTF_dw = SCVTF | FP64,
1195 SCVTF_dx = SCVTF | SixtyFourBits | FP64,
|
| D | assembler-arm64.cc | 2098 Emit(SF(rn) | FPType(fd) | SCVTF | Rn(rn) | Rd(fd)); in scvtf()
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-basic-a64-undefined.txt | 26 # SCVTF on fixed point W-registers is undefined if scale<5> == 0.
|
| /external/vixl/src/aarch64/ |
| D | constants-aarch64.h | 1287 SCVTF = FPIntegerConvertFixed | 0x00020000, enumerator
1288 SCVTF_sw = SCVTF,
1289 SCVTF_sx = SCVTF | SixtyFourBits,
1290 SCVTF_dw = SCVTF | FP64,
1291 SCVTF_dx = SCVTF | SixtyFourBits | FP64,
|
| D | assembler-aarch64.cc | 2439 Emit(SF(rn) | FPType(vd) | SCVTF | Rn(rn) | Rd(vd)); in scvtf()
|
| /external/pcre/dist2/src/sljit/ |
| D | sljitNativeARM_64.c | 108 #define SCVTF 0x9e620000 macro
1647 FAIL_IF(push_inst(compiler, (SCVTF ^ inv_bits) | VD(dst_r) | RN(src))); in sljit_emit_fop1_conv_f64_from_sw()
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SchedCyclone.td | 573 // SCVTF,UCVTF V,V
|
| D | AArch64InstrInfo.td | 2555 defm SCVTF : IntegerToFP<0, "scvtf", sint_to_fp>;
2884 defm SCVTF : SIMDTwoVectorIntToFP<0, 0, 0b11101, "scvtf", sint_to_fp>;
3366 defm SCVTF : SIMDFPTwoScalarCVT< 0, 0, 0b11101, "scvtf", AArch64sitof>;
4680 defm SCVTF : SIMDFPScalarRShift<0, 0b11100, "scvtf">;
4754 defm SCVTF: SIMDVectorRShiftToFP<0, 0b11100, "scvtf",
4925 // SCVTF GPR -> FPR is 9 cycles.
4926 // SCVTF FPR -> FPR is 4 cyclces.
4928 // Therefore, we can do 2 sign extensions and one SCVTF FPR -> FPR
4980 // SCVTF on floating point registers (both source and destination
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 3056 ### SCVTF ### subsection
3063 ### SCVTF ### subsection
|