Searched refs:TXD (Results 1 – 10 of 10) sorted by relevance
| /external/syslinux/gpxe/src/drivers/net/ |
| D | 3c90x.h | 269 struct TXD { struct
295 struct TXD *tx_ring; argument
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| D | 3c90x.c | 257 malloc_dma(TX_RING_SIZE * sizeof(struct TXD), TX_RING_ALIGN); in a3c90x_setup_tx_ring()
264 memset(p->tx_ring, 0, TX_RING_SIZE * sizeof(struct TXD)); in a3c90x_setup_tx_ring()
312 free_dma(p->tx_ring, TX_RING_SIZE * sizeof(struct TXD)); in a3c90x_free_tx_ring()
329 struct TXD *tx_cur_desc; in a3c90x_transmit()
330 struct TXD *tx_prev_desc; in a3c90x_transmit()
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| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_opcode_tmp.h | 92 OP14_TEX(TXD)
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| /external/mesa3d/src/mesa/program/ |
| D | program_lexer.l | 244 TXD{cc}{sat} { return_opcode(require_NV_fp, TXD_OP, TXD, 3); }
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | R600ISelLowering.cpp | 155 case AMDGPU::TXD: in EmitInstrWithCustomInserter()
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| D | R600Instructions.td | 1123 def TXD: AMDGPUShaderInst <
1126 "TXD $dst, $src0, $src1, $src2, $src3, $src4",
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| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| D | nv50_ir_from_tgsi.cpp | 489 NV50_IR_OPCODE_CASE(TXD, TXD); in translateOpcode()
551 NV50_IR_OPCODE_CASE(SAMPLE_D, TXD); in translateOpcode()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | R600Instructions.td | 1331 def TXD: InstR600 <
1335 "TXD $dst, $src0, $src1, $src2, $resourceId, $samplerId, $textureTarget", [],
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| D | R600ISelLowering.cpp | 319 case AMDGPU::TXD: { in EmitInstrWithCustomInserter()
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| /external/mesa3d/src/gallium/docs/source/ |
| D | tgsi.rst | 600 .. opcode:: TXD - Texture Lookup with Derivatives
2078 by TGSI texture instructions, such as :opcode:`TEX`, :opcode:`TXD`, and
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