| /external/llvm/test/MC/AArch64/ |
| D | neon-scalar-abs.s | 17 fabd h29, h24, h20
18 fabd s29, s24, s20
19 fabd d29, d24, d20
|
| D | neon-aba-abd.s | 71 fabd v0.4h, v1.4h, v2.4h
72 fabd v0.2s, v1.2s, v2.2s
73 fabd v31.4s, v15.4s, v16.4s
74 fabd v7.2d, v8.2d, v25.2d
|
| D | fullfp16-neon-neg.s | 70 fabd v0.4h, v1.4h, v2.4h
216 fabd h29, h24, h20
|
| D | arm64-advsimd.s | 308 fabd.2s v0, v0, v0
378 ; CHECK: fabd.2s v0, v0, v0 ; encoding: [0x00,0xd4,0xa0,0x2e]
443 fabd.4h v0, v0, v0
468 ; CHECK: fabd.4h v0, v0, v0 ; encoding: [0x00,0x14,0xc0,0x2e]
493 fabd.8h v0, v0, v0
518 ; CHECK: fabd.8h v0, v0, v0 ; encoding: [0x00,0x14,0xc0,0x6e]
|
| D | neon-diagnostics.s | 338 fabd v0.2s, v1.4s, v2.2d
339 fabd v0.4h, v1.4h, v2.4h
7326 fabd s29, d24, s20
7327 fabd d29, s24, d20
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-neon-aba-abd.ll | 211 declare <2 x float> @llvm.aarch64.neon.fabd.v2f32(<2 x float>, <2 x float>)
215 %abd = call <2 x float> @llvm.aarch64.neon.fabd.v2f32(<2 x float> %lhs, <2 x float> %rhs)
216 ; CHECK: fabd v0.2s, v0.2s, v1.2s
220 declare <4 x float> @llvm.aarch64.neon.fabd.v4f32(<4 x float>, <4 x float>)
224 %abd = call <4 x float> @llvm.aarch64.neon.fabd.v4f32(<4 x float> %lhs, <4 x float> %rhs)
225 ; CHECK: fabd v0.4s, v0.4s, v1.4s
229 declare <2 x double> @llvm.aarch64.neon.fabd.v2f64(<2 x double>, <2 x double>)
233 %abd = call <2 x double> @llvm.aarch64.neon.fabd.v2f64(<2 x double> %lhs, <2 x double> %rhs)
234 ; CHECK: fabd v0.2d, v0.2d, v1.2d
|
| D | arm64-vabs.ll | 205 ;CHECK: fabd.2s
208 %tmp3 = call <2 x float> @llvm.aarch64.neon.fabd.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
214 ;CHECK: fabd.4s
217 %tmp3 = call <4 x float> @llvm.aarch64.neon.fabd.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
223 ;CHECK: fabd.2d
226 … %tmp3 = call <2 x double> @llvm.aarch64.neon.fabd.v2f64(<2 x double> %tmp1, <2 x double> %tmp2)
230 declare <2 x float> @llvm.aarch64.neon.fabd.v2f32(<2 x float>, <2 x float>) nounwind readnone
231 declare <4 x float> @llvm.aarch64.neon.fabd.v4f32(<4 x float>, <4 x float>) nounwind readnone
232 declare <2 x double> @llvm.aarch64.neon.fabd.v2f64(<2 x double>, <2 x double>) nounwind readnone
829 ; CHECK: fabd s0, s0, s1
[all …]
|
| D | arm64-neon-add-sub.ll | 184 ; CHECK: fabd d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
185 %1 = tail call <1 x double> @llvm.aarch64.neon.fabd.v1f64(<1 x double> %a, <1 x double> %b)
236 declare <1 x double> @llvm.aarch64.neon.fabd.v1f64(<1 x double>, <1 x double>)
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm-colour | 323 0x~~~~~~~~~~~~~~~~ 7ef3d44d fabd d13, d2, d19
324 0x~~~~~~~~~~~~~~~~ 7ebed548 fabd s8, s10, s30
2167 0x~~~~~~~~~~~~~~~~ 6ee8d723 fabd v3.2d, v25.2d, v8.2d
2168 0x~~~~~~~~~~~~~~~~ 2eabd76e fabd v14.2s, v27.2s, v11.2s
2169 0x~~~~~~~~~~~~~~~~ 6eb2d6c9 fabd v9.4s, v22.4s, v18.4s
|
| D | log-disasm | 323 0x~~~~~~~~~~~~~~~~ 7ef3d44d fabd d13, d2, d19
324 0x~~~~~~~~~~~~~~~~ 7ebed548 fabd s8, s10, s30
2167 0x~~~~~~~~~~~~~~~~ 6ee8d723 fabd v3.2d, v25.2d, v8.2d
2168 0x~~~~~~~~~~~~~~~~ 2eabd76e fabd v14.2s, v27.2s, v11.2s
2169 0x~~~~~~~~~~~~~~~~ 6eb2d6c9 fabd v9.4s, v22.4s, v18.4s
|
| D | log-all | 782 0x~~~~~~~~~~~~~~~~ 7ef3d44d fabd d13, d2, d19
784 0x~~~~~~~~~~~~~~~~ 7ebed548 fabd s8, s10, s30
5637 0x~~~~~~~~~~~~~~~~ 6ee8d723 fabd v3.2d, v25.2d, v8.2d
5639 0x~~~~~~~~~~~~~~~~ 2eabd76e fabd v14.2s, v27.2s, v11.2s
5641 0x~~~~~~~~~~~~~~~~ 6eb2d6c9 fabd v9.4s, v22.4s, v18.4s
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 400 __ fabd(d13, d2, d19); in GenerateTestSequenceFP() local
401 __ fabd(s8, s10, s30); in GenerateTestSequenceFP() local
2519 __ fabd(v3.V2D(), v25.V2D(), v8.V2D()); in GenerateTestSequenceNEONFP() local
2520 __ fabd(v14.V2S(), v27.V2S(), v11.V2S()); in GenerateTestSequenceNEONFP() local
2521 __ fabd(v9.V4S(), v22.V4S(), v18.V4S()); in GenerateTestSequenceNEONFP() local
|
| D | test-simulator-aarch64.cc | 4145 DEFINE_TEST_NEON_3SAME_FP(fabd, Basic)
4182 DEFINE_TEST_NEON_3SAME_FP_SCALAR(fabd, Basic)
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | neon-instructions.txt | 151 # CHECK: fabd v1.4s, v31.4s, v16.4s
2634 # CHECK: fabd s29, s24, s20
2635 # CHECK: fabd d29, d24, d20
|
| D | arm64-advsimd.txt | 293 # CHECK: fabd.2s v0, v0, v0
|
| /external/valgrind/none/tests/arm64/ |
| D | fp_and_simd.c | 2107 GEN_BINARY_TEST(fabd, 2d, 2d, 2d)
2108 GEN_BINARY_TEST(fabd, 4s, 4s, 4s)
2109 GEN_BINARY_TEST(fabd, 2s, 2s, 2s)
|
| D | fp_and_simd.stdout.exp | 26 fabd d2, d11, d29 570037914d04ab3d05d75ec6f616ee9a 17a0dc273ba9f8030a52741849e54740 f6f2b14fbb3…
27 fabd s2, s11, s29 e8c72e865de41295f2db8f44cbbf37e2 fcd015ff8f2e73a3a0fae06860b606c7 f34428d9c88…
28 fabd v9.2d, v7.2d, v8.2d f9da7f07e00794eb00b0940ba5e08516 be625608d5abd787f5c90ee73af5d7c0 79da7…
29 fabd v9.4s, v7.4s, v8.4s ddb5cd8016d27d057796e0861576e44f 4e94ec120b386f523bfcd80321664d3e 5db5c…
30 fabd v9.2s, v7.2s, v8.2s 3d3cc0784c2f856363d9810079bbabd9 125934a781e479d33d431279cce48fce 00000…
|
| /external/vixl/src/aarch64/ |
| D | simulator-aarch64.cc | 3344 fabd(vf, rd, rn, rm); in VisitNEON3Same()
4636 fabd(vf, rd, rn, rm); in VisitNEONScalar3Same()
|
| D | simulator-aarch64.h | 2830 LogicVRegister fabd(VectorFormat vform,
|
| D | assembler-aarch64.h | 2520 void fabd(const VRegister& vd, const VRegister& vn, const VRegister& vm);
|
| D | macro-assembler-aarch64.h | 2139 V(fabd, Fabd) \
|
| D | logic-aarch64.cc | 4247 LogicVRegister Simulator::fabd(VectorFormat vform, in fabd() function in vixl::aarch64::Simulator
|
| D | assembler-aarch64.cc | 2730 V(fabd, NEON_FABD, NEON_FABD_scalar) \
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 1697 void fabd(const VRegister& vd,
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 2943 defm FABD : SIMDThreeSameVectorFP<1,1,0b010,"fabd", int_aarch64_neon_fabd>;
3250 defm FABD : SIMDFPThreeScalar<1, 1, 0b010, "fabd", int_aarch64_sisd_fabd>;
|