| /external/v8/src/x64/ |
| D | sse-instr.h | 65 V(pmaxud, 66, 0F, 38, 3F) \
|
| /external/llvm/test/CodeGen/X86/ |
| D | sse41-intrinsics-x86-upgrade.ll | 284 ; CHECK-NEXT: pmaxud %xmm1, %xmm0
287 %res = call <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32> %a0, <4 x i32> %a1)
290 declare <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32>, <4 x i32>) nounwind readnone
|
| D | sse41-intrinsics-x86.ll | 194 ; SSE41-NEXT: pmaxud %xmm1, %xmm0
201 %res = call <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1]
204 declare <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32>, <4 x i32>) nounwind readnone
|
| D | vec_minmax_uint.ll | 219 ; SSE41-NEXT: pmaxud %xmm1, %xmm0
224 ; SSE42-NEXT: pmaxud %xmm1, %xmm0
260 ; SSE41-NEXT: pmaxud %xmm2, %xmm0
261 ; SSE41-NEXT: pmaxud %xmm3, %xmm1
266 ; SSE42-NEXT: pmaxud %xmm2, %xmm0
267 ; SSE42-NEXT: pmaxud %xmm3, %xmm1
666 ; SSE41-NEXT: pmaxud %xmm1, %xmm0
671 ; SSE42-NEXT: pmaxud %xmm1, %xmm0
712 ; SSE41-NEXT: pmaxud %xmm2, %xmm0
713 ; SSE41-NEXT: pmaxud %xmm3, %xmm1
[all …]
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| D | vec_setcc.ll | 101 ; SSE41-NEXT: pmaxud %xmm0, %xmm1
|
| D | vselect-minmax.ll | 535 ; SSE4-NEXT: pmaxud %xmm1, %xmm0
566 ; SSE4-NEXT: pmaxud %xmm1, %xmm0
1548 ; SSE4-NEXT: pmaxud %xmm2, %xmm0
1549 ; SSE4-NEXT: pmaxud %xmm3, %xmm1
1605 ; SSE4-NEXT: pmaxud %xmm2, %xmm0
1606 ; SSE4-NEXT: pmaxud %xmm3, %xmm1
2107 ; SSE4-NEXT: pmaxud %xmm1, %xmm0
2138 ; SSE4-NEXT: pmaxud %xmm1, %xmm0
3082 ; SSE4-NEXT: pmaxud %xmm2, %xmm0
3083 ; SSE4-NEXT: pmaxud %xmm3, %xmm1
[all …]
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| D | vec_cmp_uint-128.ll | 305 ; SSE41-NEXT: pmaxud %xmm0, %xmm1
311 ; SSE42-NEXT: pmaxud %xmm0, %xmm1
|
| D | sse41-intrinsics-fast-isel.ll | 650 ; X32-NEXT: pmaxud %xmm1, %xmm0
655 ; X64-NEXT: pmaxud %xmm1, %xmm0
|
| D | stack-folding-int-sse42.ll | 627 ;CHECK: pmaxud {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
629 %2 = call <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32> %a0, <4 x i32> %a1)
632 declare <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32>, <4 x i32>) nounwind readnone
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| D | stack-folding-int-avx1.ll | 602 %2 = call <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32> %a0, <4 x i32> %a1)
605 declare <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32>, <4 x i32>) nounwind readnone
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| D | avx-intrinsics-x86.ll | 1669 %res = call <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1]
1672 declare <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32>, <4 x i32>) nounwind readnone
|
| /external/swiftshader/third_party/LLVM/test/MC/X86/ |
| D | x86-32-coverage.s | 1539 pmaxud %xmm5,%xmm5
10982 pmaxud 0xdeadbeef(%ebx,%ecx,8),%xmm5
10986 pmaxud 0x45,%xmm5
10990 pmaxud 0x7eed,%xmm5
10994 pmaxud 0xbabecafe,%xmm5
10998 pmaxud 0x12345678,%xmm5
11002 pmaxud %xmm5,%xmm5
19110 pmaxud 0xdeadbeef(%ebx,%ecx,8),%xmm5
19113 pmaxud 0x45,%xmm5
19116 pmaxud 0x7eed,%xmm5
[all …]
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| /external/llvm/test/MC/X86/ |
| D | x86-32-coverage.s | 9353 pmaxud 0xdeadbeef(%ebx,%ecx,8),%xmm5
9357 pmaxud 0x45,%xmm5
9361 pmaxud 0x7eed,%xmm5
9365 pmaxud 0xbabecafe,%xmm5
9369 pmaxud 0x12345678,%xmm5
9373 pmaxud %xmm5,%xmm5
|
| /external/swiftshader/src/Reactor/ |
| D | x86.hpp | 134 RValue<UInt4> pmaxud(RValue<UInt4> x, RValue<UInt4> y);
|
| D | Nucleus.cpp | 5923 return x86::pmaxud(x, y); in Max()
7737 RValue<UInt4> pmaxud(RValue<UInt4> x, RValue<UInt4> y) in pmaxud() function
7740 llvm::Function *pmaxud = Intrinsic::getDeclaration(module, Intrinsic::x86_sse41_pmaxud); in pmaxud() local
7742 return RValue<UInt4>(Nucleus::createCall(pmaxud, x.value, y.value)); in pmaxud()
|
| /external/valgrind/none/tests/amd64/ |
| D | sse4-64.stdout.exp-older-glibc | 2677 r pmaxud 1541139c8b1cd0d1a11d81326f4e7880 30c9028972f8733d11f7fa4450de2529 30c902898b1cd0d1a11d…
2678 m pmaxud 1541139c8b1cd0d1a11d81326f4e7880 30c9028972f8733d11f7fa4450de2529 30c902898b1cd0d1a11d…
2679 r pmaxud a1cd852d9cd970502d146432e64644c9 25c80a060da03fb0c33ebc4b44b8ddd8 a1cd852d9cd97050c33e…
2680 m pmaxud a1cd852d9cd970502d146432e64644c9 25c80a060da03fb0c33ebc4b44b8ddd8 a1cd852d9cd97050c33e…
2681 r pmaxud 5791e2f2a78f37627c9fe23c60c5d82b b3633c2f304791cde6c097130b5efcf6 b3633c2fa78f3762e6c0…
2682 m pmaxud 5791e2f2a78f37627c9fe23c60c5d82b b3633c2f304791cde6c097130b5efcf6 b3633c2fa78f3762e6c0…
2683 r pmaxud 94d7265949ca62b46a8a793cf9d5f0d1 35e7926e777aa43f56470887bfdd3daf 94d72659777aa43f6a8a…
2684 m pmaxud 94d7265949ca62b46a8a793cf9d5f0d1 35e7926e777aa43f56470887bfdd3daf 94d72659777aa43f6a8a…
2685 r pmaxud b2ed4ecc1e172df2d3a0a41fce854ae7 06a10a317fc4b5b3ef9f8c927c405d2f b2ed4ecc7fc4b5b3ef9f…
2686 m pmaxud b2ed4ecc1e172df2d3a0a41fce854ae7 06a10a317fc4b5b3ef9f8c927c405d2f b2ed4ecc7fc4b5b3ef9f…
[all …]
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| D | sse4-64.stdout.exp | 2697 r pmaxud 1004ff355bf02957805ff098ce3ed14b 9fedb2229a090d2c018b42f3d3ec8415 9fedb2229a090d2c805f…
2698 m pmaxud 1004ff355bf02957805ff098ce3ed14b 9fedb2229a090d2c018b42f3d3ec8415 9fedb2229a090d2c805f…
2699 r pmaxud 6c11edd5a106e2d655f9b97953917f46 b168a24af5479e7bc9f1d5f8e2de4bd3 b168a24af5479e7bc9f1…
2700 m pmaxud 6c11edd5a106e2d655f9b97953917f46 b168a24af5479e7bc9f1d5f8e2de4bd3 b168a24af5479e7bc9f1…
2701 r pmaxud 894d9fe1f98d1aa0861ef69cf4e34e11 f2789356f1fb0d2b99885af4db13d1b7 f2789356f98d1aa09988…
2702 m pmaxud 894d9fe1f98d1aa0861ef69cf4e34e11 f2789356f1fb0d2b99885af4db13d1b7 f2789356f98d1aa09988…
2703 r pmaxud c5040fc700120f62ee9b23edcc40fad9 bf6982b029b396ea4f1e4ed5da99d2ee c5040fc729b396eaee9b…
2704 m pmaxud c5040fc700120f62ee9b23edcc40fad9 bf6982b029b396ea4f1e4ed5da99d2ee c5040fc729b396eaee9b…
2705 r pmaxud 7b813bf15120fbc8683cbc58f8b23fca 74876ac63afb7562c67d2c86fa7c09a3 7b813bf15120fbc8c67d…
2706 m pmaxud 7b813bf15120fbc8683cbc58f8b23fca 74876ac63afb7562c67d2c86fa7c09a3 7b813bf15120fbc8c67d…
[all …]
|
| /external/elfutils/libcpu/ |
| D | ChangeLog | 81 pcmpgtq, phminposuw, pinsrb, pinsrd, pmaxsb, pmaxsd, pmaxud, pmaxuw,
|
| /external/elfutils/libcpu/defs/ |
| D | i386 | 942 01100110,00001111,00111000,00111111,{Mod}{xmmreg}{R_m}:pmaxud {Mod}{R_m},{xmmreg}
|
| /external/elfutils/tests/ |
| D | testfile44.expect.bz2 | 1testfile44.o: elf32-elf_i386
2
3Disassembly of section .text:
4
5 0 ... |
| D | testfile45.expect.bz2 | 1testfile45.o: elf64-elf_x86_64
2
3Disassembly of section .text:
4
5 0 ... |
| D | ChangeLog | 1644 pmaxsd, pmaxud, pmaxuw, pminsb, pminsd, pminud, pminuw, pmovsxbw,
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| D | avx-intrinsics-x86.ll | 1033 %res = call <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1]
1036 declare <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32>, <4 x i32>) nounwind readnone
|
| /external/swiftshader/third_party/LLVM/include/llvm/ |
| D | Intrinsics.gen | 419 x86_sse41_pmaxud, // llvm.x86.sse41.pmaxud
946 "llvm.x86.sse41.pmaxud",
3123 return Intrinsic::x86_sse41_pmaxud; // "86.sse41.pmaxud"
6050 case Intrinsic::x86_sse41_pmaxud: // llvm.x86.sse41.pmaxud
7322 case Intrinsic::x86_sse41_pmaxud: // llvm.x86.sse41.pmaxud
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86GenAsmMatcher.inc | 4378 { X86::PMAXUDrr, "pmaxud", Convert__Reg1_1__Tie0__Reg1_0, { MCK_FR32, MCK_FR32 }, 0},
4379 { X86::PMAXUDrm, "pmaxud", Convert__Reg1_1__Tie0__Mem5_0, { MCK_Mem, MCK_FR32 }, 0},
|