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/external/llvm/test/MC/Lanai/
Dv11.s15 add %r17, %r18, %r21
17 add.f %r17, %r18, %r21
19 addc %r17, %r18, %r21
21 addc.f %r17, %r18, %r21
43 and %r17, %r18, %r21
45 and.f %r17, %r18, %r21
145 ld %r18[%r17], %r21
147 uld %r18[%r17], %r21
221 ld %r18[*%r17], %r21
223 uld %r18[*%r17], %r21
[all …]
Dconditional_inst.s63 add.ge %r13, %r14, %r18
71 add.f %r13, %r14, %r18
/external/llvm/test/MC/Disassembler/Lanai/
Dv11.txt16 # CHECK: add %r17, %r18, %r21
18 # CHECK: add.f %r17, %r18, %r21
20 # CHECK: addc %r17, %r18, %r21
22 # CHECK: addc.f %r17, %r18, %r21
44 # CHECK: and %r17, %r18, %r21
46 # CHECK: and.f %r17, %r18, %r21
120 # CHECK: ld [%r17 add %r18], %r21
122 # CHECK: uld [%r17 add %r18], %r21
184 # CHECK: ld [*%r17 add %r18], %r21
246 # CHECK: ld [%r17* add %r18], %r21
[all …]
/external/libunwind/src/ia64/
DGinstall_cursor.S69 ld8 r18 = [r3], 2*LOC_SIZE // r18 = loc[IA64_REG_FR18]
80 and r18 = -4, r18
87 ldf.fill f18 = [r18] // f18 restored (don't touch no more)
169 ld8 r18 = [r2], (B5_LOC_OFF - B3_LOC_OFF) // r18 = b3_loc
181 and r18 = -4, r18
188 ld8 r18 = [r18] // r18 = *b3_loc
221 mov b3 = r18 // b3 restored (don't touch no more)
288 ld8 r18 = [r3] // r18 restored (don't touch no more)
DGresume.c50 unw_word_t r18; in local_resume() member
149 extra.r18 = c->eh_args[3]; in local_resume()
152 (long) extra.r17, (long) extra.r18); in local_resume()
Ducontext_i.h55 #define rB5 r18
/external/llvm/test/CodeGen/Lanai/
Dcomparisons_i64.ll32 ; CHECK: subb.f %r6, %r18, %r3
42 ; CHECK: subb.f %r18, %r6, %r3
52 ; CHECK: subb.f %r6, %r18, %r3
62 ; CHECK: subb.f %r18, %r6, %r3
72 ; CHECK: subb.f %r18, %r6, %r3
82 ; CHECK: subb.f %r6, %r18, %r3
92 ; CHECK: subb.f %r18, %r6, %r3
102 ; CHECK: subb.f %r6, %r18, %r3
Dselect.ll10 ; CHECK: sel.ne %r7, %r18, %rv
18 ; CHECK: sel.eq %r7, %r18, %rv
27 ; CHECK: sel.ne %r7, %r18, %rv
/external/llvm/test/CodeGen/MIR/Lanai/
Dpeephole-compare.mir9 # sel.eq %r18, %r3, %rv
193 - { reg: '%r18', virtual-reg: '%2' }
210 liveins: %r6, %r7, %r18
212 %2 = COPY %r18
240 - { reg: '%r18', virtual-reg: '%2' }
257 liveins: %r6, %r7, %r18
259 %2 = COPY %r18
287 - { reg: '%r18', virtual-reg: '%2' }
305 liveins: %r6, %r7, %r18, %r19
308 %2 = COPY %r18
[all …]
/external/llvm/test/MC/Hexagon/
DasmMap.s29 #CHECK: 457fc012 { if (!p0) r18 = memuh(r31{{ *}}+{{ *}}#0)
30 if (!p0) r18=memuh(r31)
149 #CHECK: 3e1ec032 { memb(r30{{ *}}+{{ *}}#0) {{ *}}-={{ *}} r18
150 memb(r30)-=r18
233 #CHECK: 4312c801 if (p1.new) r1 = memb(r18{{ *}}+{{ *}}#0)
235 if (p1.new) r1=memb(r18)
283 p1=cmp.eq(r18,##1159699785)
341 #CHECK: 4692df01 if (!p1.new) memw(r18{{ *}}+{{ *}}#0) = r31
343 if (!p1.new) memw(r18)=r31
350 p2=cmp.eq(r18,##1895120239)
[all …]
Dduplex-registers.s6 r18 = memuh(r19 + #0) define
10 # CHECK: r16 = memuh(r17 + #0);{{ *}}r18 = memuh(r19 + #0)
Dv60-vmem.s50 #CHECK: 2992dd1f { if (q3) vmem(r18++#-3) = v31 }
52 if (q3) vmem(r18++#-3)=v31
225 #CHECK: 28b2c925 { if (!p1) vmem(r18+#1) = v5 }
227 if (!p1) vmem(r18+#1)=v5
294 #CHECK: 2b52c02c v12.cur = vmem(r18++m0):nt }
296 v12.cur=vmem(r18++m0):nt
/external/linux-kselftest/tools/testing/selftests/powerpc/pmu/ebb/
Dbusy_loop.S16 std r18, 128(%r1)
57 li r18, 0x1818
58 std r18, -200(%r1)
117 cmpwi r18, 0x1818
160 li r18, 0xad
212 ld r18, -200(%r1)
213 cmpwi r18, 0x1818
256 ld r18, 128(%r1)
/external/libunwind/tests/
Dia64-test-stack-asm.S45 alloc r18 = ar.pfs, 0, 0, 0, 0 // read ar.pfs
67 st8 [r3] = r18, (SAVED_BSP_OFF - SAVED_PFS_OFF)
71 mov r18 = ar.rnat
80 st8 [r3] = r18
106 ld8 r18 = [r3], (SAVED_RNAT_OFF-SAVED_PFS_OFF);; // saved pfs
112 mov ar.pfs = r18
Dia64-test-rbs-asm.S46 alloc r18 = ar.pfs, 2, (n)-2, 2, 0;/* read ar.pfs */ \
74 st8 [r3] = r18, (SAVED_BSP_OFF - SAVED_PFS_OFF); \
77 mov r18 = ar.rnat; \
87 st8 [r3] = r18; \
100 ld8 r18 = [r3], (SAVED_RNAT_OFF-SAVED_PFS_OFF);;/* saved pfs */ \
105 mov ar.pfs = r18; \
188 mov r18 = in1
220 mov in1 = r18
/external/valgrind/VEX/switchback/
Dtest_ppc_jm1.c145 register uint32_t r18 __asm__ ("r18");
3722 r18 = 0; in test_int_three_args()
3727 flags = r18; in test_int_three_args()
3729 xer = r18; in test_int_three_args()
3752 r18 = 0; in test_int_two_args()
3757 flags = r18; in test_int_two_args()
3759 xer = r18; in test_int_two_args()
3778 r18 = 0; in test_int_one_arg()
3785 flags = r18; in test_int_one_arg()
3787 xer = r18; in test_int_one_arg()
[all …]
/external/swiftshader/third_party/LLVM/test/CodeGen/MBlaze/
Dsvol.ll21 ; CHECK: swi r18, r1
28 ; CHECK: lwi r18, r1
56 ; CHECK: swi r18, r1
61 ; CHECK: lwi r18, r1
Dintr.ll22 ; CHECK: swi r18, r1
31 ; CHECK: lwi r18, r1
/external/llvm/test/FileCheck/
Dsimple-var-capture.txt8 op3 r16, r18, r21
9 op4 r30, r18, r21
/external/llvm/test/Transforms/InstCombine/
Dfold-vector-zero.ll23 %r18 = add i64 %s0, %A
24 %r19 = inttoptr i64 %r18 to <2 x double>*
/external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/
Dfold-vector-zero.ll23 %r18 = add i64 %s0, %A
24 %r19 = inttoptr i64 %r18 to <2 x double>*
/external/llvm/test/CodeGen/Hexagon/
Dpic-regusage.ll16 …~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r15},~{r16},~{r17},~{r18},~{r19},~{r20},~{r2…
38 …~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r16},~{r17},~{r18},~{r19},~{r20},~{r2…
57 …{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{r16},~{r17},~{r18},~{r19},~{r20},~{r2…
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/MBlaze/
Dmblaze_operands.txt61 # CHECK: add r18, r18, r18
/external/swiftshader/third_party/LLVM/test/MC/MBlaze/
Dmblaze_operands.s103 add r18, r18, r18
/external/linux-kselftest/tools/testing/selftests/powerpc/switch_endian/
Dcheck.S53 addi r9,r15,18 # check r18
54 cmpd r9,r18

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