/external/libavc/common/armv8/ |
D | ih264_inter_pred_luma_horz_hpel_vert_hpel_av8.s | 144 smlal2 v23.4s, v0.8h, v28.8h 169 smlal2 v22.4s, v25.8h, v28.8h 225 smlal2 v23.4s, v2.8h, v28.8h 251 smlal2 v22.4s, v25.8h, v28.8h 304 smlal2 v23.4s, v4.8h, v28.8h 330 smlal2 v22.4s, v25.8h, v28.8h 386 smlal2 v23.4s, v6.8h, v28.8h 411 smlal2 v22.4s, v25.8h, v28.8h 496 smlal2 v22.4s, v16.8h, v26.8h 527 smlal2 v22.4s, v16.8h, v26.8h [all …]
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D | ih264_inter_pred_luma_horz_qpel_vert_hpel_av8.s | 207 smlal2 v22.4s, v0.8h, v28.8h 232 smlal2 v22.4s, v18.8h, v28.8h 294 smlal2 v22.4s, v2.8h, v28.8h 320 smlal2 v22.4s, v18.8h, v28.8h 378 smlal2 v22.4s, v4.8h, v28.8h 404 smlal2 v22.4s, v18.8h, v28.8h 465 smlal2 v22.4s, v6.8h, v28.8h 490 smlal2 v22.4s, v18.8h, v28.8h 581 smlal2 v22.4s, v16.8h, v26.8h 612 smlal2 v22.4s, v16.8h, v26.8h [all …]
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D | ih264_inter_pred_luma_horz_hpel_vert_qpel_av8.s | 268 smlal2 v6.4s, v30.8h, v22.8h 305 smlal2 v6.4s, v30.8h, v22.8h 346 smlal2 v6.4s, v30.8h, v22.8h 371 smlal2 v6.4s, v30.8h, v22.8h 517 smlal2 v6.4s, v30.8h, v22.8h 551 smlal2 v6.4s, v30.8h, v22.8h 590 smlal2 v6.4s, v30.8h, v22.8h 616 smlal2 v6.4s, v30.8h, v22.8h 761 smlal2 v6.4s, v30.8h, v22.8h 801 smlal2 v6.4s, v30.8h, v22.8h [all …]
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/external/llvm/test/MC/AArch64/ |
D | neon-2velem.s | 88 smlal2 v0.4s, v1.8h, v1.h[2] 89 smlal2 v0.2d, v1.4s, v1.s[2] 90 smlal2 v0.2d, v1.4s, v22.s[2]
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D | neon-3vdiff.s | 153 smlal2 v0.8h, v1.16b, v2.16b 154 smlal2 v0.4s, v1.8h, v2.8h 155 smlal2 v0.2d, v1.4s, v2.4s
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D | arm64-advsimd.s | 1176 smlal2.8h v1, v2, v3 1177 smlal2.4s v1, v2, v3 1178 smlal2.2d v1, v2, v3 1183 smlal2 v13.8h, v8.16b, v0.16b 1184 smlal2 v13.4s, v8.8h, v0.8h 1185 smlal2 v13.2d, v8.4s, v0.4s 1190 ; CHECK: smlal2.8h v1, v2, v3 ; encoding: [0x41,0x80,0x23,0x4e] 1191 ; CHECK: smlal2.4s v1, v2, v3 ; encoding: [0x41,0x80,0x63,0x4e] 1192 ; CHECK: smlal2.2d v1, v2, v3 ; encoding: [0x41,0x80,0xa3,0x4e] 1196 ; CHECK: smlal2.8h v13, v8, v0 ; encoding: [0x0d,0x81,0x20,0x4e] [all …]
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D | neon-diagnostics.s | 2337 smlal2 v0.8h, v1.16h, v2.16b 2338 smlal2 v0.4s, v1.8s, v2.8h 2339 smlal2 v0.2d, v1.4d, v2.4s 3091 smlal2 v0.4h, v1.8h, v1.h[2] 3092 smlal2 v0.4s, v1.8h, v1.h[8] 3093 smlal2 v0.4s, v1.8h, v16.h[2] 3094 smlal2 v0.2s, v1.4s, v1.s[2] 3095 smlal2 v0.2d, v1.4s, v1.s[4] 3096 smlal2 v0.2d, v1.4s, v22.s[4]
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/external/libjpeg-turbo/simd/ |
D | jsimd_arm64_neon.S | 295 …smlal2 v19.4s, v8.8h, XFIX_N_1_847 /* tmp2h tmp2 = z1 + MULTIPLY(z3, - FIX_1_847759065… 298 …smlal2 v21.4s, v4.8h, XFIX_P_0_765 /* tmp3h tmp3 = z1 + MULTIPLY(z2, FIX_0_765366865);… 554 …smlal2 v19.4s, v8.8h, XFIX_N_1_847 /* tmp2h tmp2 = z1 + MULTIPLY(z3, - FIX_1_847759065… 556 …smlal2 v21.4s, v4.8h, XFIX_P_0_765 /* tmp3h tmp3 = z1 + MULTIPLY(z2, FIX_0_765366865);… 634 …smlal2 v19.4s, v8.8h, XFIX_N_1_847 /* tmp2h tmp2 = z1 + MULTIPLY(z3, - FIX_1_847759065… 637 …smlal2 v21.4s, v4.8h, XFIX_P_0_765 /* tmp3h tmp3 = z1 + MULTIPLY(z2, FIX_0_765366865);… 1578 smlal2 v22.4s, v8.8h, v1.h[2] /* multiply by -23401 */ 1633 smlal2 v22.4s, v8.8h, v1.h[2] /* multiply by -23401 */ 1646 smlal2 v22.4s, v8.8h, v1.h[2] /* multiply by -23401 */ 2365 smlal2 v24.4s, v9.8h, XFIX_P_0_765 /* hi z1 + MULTIPLY(tmp13, XFIX_P_0_765) */ [all …]
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-neon-2velem-high.ll | 157 ; CHECK-NEXT: smlal2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, [[REPLICATE]].8h 173 ; CHECK-NEXT: smlal2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, [[REPLICATE]].8h 185 ; CHECK-NEXT: smlal2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, [[REPLICATE]].4s 199 ; CHECK-NEXT: smlal2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, [[REPLICATE]].4s
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D | arm64-vmul.ll | 1382 ; CHECK: smlal2.8h v0, v1, v2 1398 ; CHECK: smlal2.4s v0, v1, v2 1414 ; CHECK: smlal2.2d v0, v1, v2 1478 ; CHECK: smlal2.4s v0, v1, v2[3] 1494 ; CHECK: smlal2.2d v0, v1, v2[1]
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D | arm64-neon-3vdiff.ll | 1489 ; CHECK: smlal2 {{v[0-9]+}}.8h, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1500 ; CHECK: smlal2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1511 ; CHECK: smlal2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-advsimd.txt | 1715 # CHECK: smlal2.4s v0, v0, v0[1] 1717 # CHECK: smlal2.2d v0, v0, v0[3] 2257 # CHECK: smlal2.8h v0, v0, v0 2259 # CHECK: smlal2.2d v0, v0, v0
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D | neon-instructions.txt | 1244 # CHECK: smlal2 v0.8h, v1.16b, v2.16b 1245 # CHECK: smlal2 v0.4s, v1.8h, v2.8h 1246 # CHECK: smlal2 v0.2d, v1.4s, v2.4s
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/external/vixl/src/aarch64/ |
D | simulator-aarch64.h | 2033 LogicVRegister smlal2(VectorFormat vform, 2683 V(smlal2) \
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D | assembler-aarch64.h | 1603 void smlal2(const VRegister& vd, 2364 void smlal2(const VRegister& vd, const VRegister& vn, const VRegister& vm);
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D | logic-aarch64.cc | 949 LogicVRegister Simulator::smlal2(VectorFormat vform, in smlal2() function in vixl::aarch64::Simulator 957 return smlal2(vform, dst, src1, dup_element(indexform, temp, src2, index)); in smlal2() 3255 LogicVRegister Simulator::smlal2(VectorFormat vform, in smlal2() function in vixl::aarch64::Simulator
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D | macro-assembler-aarch64.h | 2184 V(smlal2, Smlal2) \ 2381 V(smlal2, Smlal2) \
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D | simulator-aarch64.cc | 3577 smlal2(vf_l, rd, rn, rm); in VisitNEON3Different() 3793 Op = &Simulator::smlal2; in VisitNEONByIndexedElement()
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D | assembler-aarch64.cc | 1910 V(smlal2, NEON_SMLAL2, vn.IsVector() && vn.IsQ()) \ 3009 V(smlal2, NEON_SMLAL_byelement, vn.IsVector() && vn.IsQ()) \ in NEON_FPBYELEMENT_LIST()
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/external/vixl/test/test-trace-reference/ |
D | log-disasm-colour | 1248 0x~~~~~~~~~~~~~~~~ 4eb0835e smlal2 v30.2d, v26.4s, v16.4s 1249 0x~~~~~~~~~~~~~~~~ 4f8123df smlal2 v31.2d, v30.4s, v1.s[0] 1250 0x~~~~~~~~~~~~~~~~ 4e6380d1 smlal2 v17.4s, v6.8h, v3.8h 1251 0x~~~~~~~~~~~~~~~~ 4f752beb smlal2 v11.4s, v31.8h, v5.h[7] 1252 0x~~~~~~~~~~~~~~~~ 4e3d821e smlal2 v30.8h, v16.16b, v29.16b
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D | log-disasm | 1248 0x~~~~~~~~~~~~~~~~ 4eb0835e smlal2 v30.2d, v26.4s, v16.4s 1249 0x~~~~~~~~~~~~~~~~ 4f8123df smlal2 v31.2d, v30.4s, v1.s[0] 1250 0x~~~~~~~~~~~~~~~~ 4e6380d1 smlal2 v17.4s, v6.8h, v3.8h 1251 0x~~~~~~~~~~~~~~~~ 4f752beb smlal2 v11.4s, v31.8h, v5.h[7] 1252 0x~~~~~~~~~~~~~~~~ 4e3d821e smlal2 v30.8h, v16.16b, v29.16b
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D | log-all | 3319 0x~~~~~~~~~~~~~~~~ 4eb0835e smlal2 v30.2d, v26.4s, v16.4s 3321 0x~~~~~~~~~~~~~~~~ 4f8123df smlal2 v31.2d, v30.4s, v1.s[0] 3323 0x~~~~~~~~~~~~~~~~ 4e6380d1 smlal2 v17.4s, v6.8h, v3.8h 3325 0x~~~~~~~~~~~~~~~~ 4f752beb smlal2 v11.4s, v31.8h, v5.h[7] 3327 0x~~~~~~~~~~~~~~~~ 4e3d821e smlal2 v30.8h, v16.16b, v29.16b
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/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 1482 __ smlal2(v30.V2D(), v26.V4S(), v16.V4S()); in GenerateTestSequenceNEON() local 1483 __ smlal2(v31.V2D(), v30.V4S(), v1.S(), 0); in GenerateTestSequenceNEON() local 1484 __ smlal2(v17.V4S(), v6.V8H(), v3.V8H()); in GenerateTestSequenceNEON() local 1485 __ smlal2(v11.V4S(), v31.V8H(), v5.H(), 7); in GenerateTestSequenceNEON() local 1486 __ smlal2(v30.V8H(), v16.V16B(), v29.V16B()); in GenerateTestSequenceNEON() local
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/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 3217 void smlal2(const VRegister& vd, 3226 void smlal2(const VRegister& vd,
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/external/valgrind/none/tests/arm64/ |
D | fp_and_simd.stdout.exp | 27802 smlal2 v29.2d, v20.4s, v3.s[1] 83bb34ea17f1b78b56747b73c2baacf5 eb4397700598e7124c97b85cd16c7e85… 27803 smlal2 v29.2d, v20.4s, v3.s[2] 12c25f774de13fd6e986f2021f56c08a 663aaf98335c13eda7b2aba44a5dccf0… 27806 smlal2 v29.4s, v20.8h, v3.h[1] 617ac74b1758f5923b1c7375b690a641 5b952f4c79ec2a5d37bd9495f0ecfe85… 27808 smlal2 v29.4s, v20.8h, v3.h[1] f53d03221fbfcb47193a3e0ac4ea2234 5ef76415cbe5fe8900b4875a0c7baf55… 27850 smlal2 v2.2d, v11.4s, v29.4s 8269aff4edcad53a4ac29deb66f7ecbf b1d2e05ee8a416612c60056957e55c90 … 27853 smlal2 v2.4s, v11.8h, v29.8h ba1f116fd77ba3530a73ef880f9499b9 6dd97ab43a4753301917ea9d8166158e … 27855 smlal2 v2.8h, v11.16b, v29.16b 4a68f42d2efbe332d8b4acb5ff3e78bd 986a65ebc080ecaa8f2d38ef6974df43…
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