1 /** @file
2   Definition of the MMC Host Protocol
3 
4   Copyright (c) 2011-2014, ARM Limited. All rights reserved.
5 
6   This program and the accompanying materials
7   are licensed and made available under the terms and conditions of the BSD License
8   which accompanies this distribution.  The full text of the license may be found at
9   http://opensource.org/licenses/bsd-license.php
10 
11   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13 
14 **/
15 
16 #ifndef __MMC_HOST_H__
17 #define __MMC_HOST_H__
18 
19 ///
20 /// Global ID for the MMC Host Protocol
21 ///
22 #define EFI_MMC_HOST_PROTOCOL_GUID \
23   { 0x3e591c00, 0x9e4a, 0x11df, {0x92, 0x44, 0x00, 0x02, 0xA5, 0xD5, 0xC5, 0x1B } }
24 
25 #define MMC_RESPONSE_TYPE_R1        0
26 #define MMC_RESPONSE_TYPE_R1b       0
27 #define MMC_RESPONSE_TYPE_R2        1
28 #define MMC_RESPONSE_TYPE_R3        0
29 #define MMC_RESPONSE_TYPE_R6        0
30 #define MMC_RESPONSE_TYPE_R7        0
31 #define MMC_RESPONSE_TYPE_OCR       0
32 #define MMC_RESPONSE_TYPE_CID       1
33 #define MMC_RESPONSE_TYPE_CSD       1
34 #define MMC_RESPONSE_TYPE_RCA       0
35 
36 typedef UINT32  MMC_RESPONSE_TYPE;
37 
38 typedef UINT32 MMC_CMD;
39 
40 #define MMC_CMD_WAIT_RESPONSE      (1 << 16)
41 #define MMC_CMD_LONG_RESPONSE      (1 << 17)
42 #define MMC_CMD_NO_CRC_RESPONSE    (1 << 18)
43 
44 #define MMC_INDX(Index)       ((Index) & 0xFFFF)
45 #define MMC_GET_INDX(MmcCmd)  ((MmcCmd) & 0xFFFF)
46 
47 #define MMC_CMD0              (MMC_INDX(0) | MMC_CMD_NO_CRC_RESPONSE)
48 #define MMC_CMD1              (MMC_INDX(1) | MMC_CMD_WAIT_RESPONSE | MMC_CMD_NO_CRC_RESPONSE)
49 #define MMC_CMD2              (MMC_INDX(2) | MMC_CMD_WAIT_RESPONSE | MMC_CMD_LONG_RESPONSE)
50 #define MMC_CMD3              (MMC_INDX(3) | MMC_CMD_WAIT_RESPONSE)
51 #define MMC_CMD5              (MMC_INDX(5) | MMC_CMD_WAIT_RESPONSE | MMC_CMD_NO_CRC_RESPONSE)
52 #define MMC_CMD6              (MMC_INDX(6) | MMC_CMD_WAIT_RESPONSE)
53 #define MMC_CMD7              (MMC_INDX(7) | MMC_CMD_WAIT_RESPONSE)
54 #define MMC_CMD8              (MMC_INDX(8) | MMC_CMD_WAIT_RESPONSE)
55 #define MMC_CMD9              (MMC_INDX(9) | MMC_CMD_WAIT_RESPONSE | MMC_CMD_LONG_RESPONSE)
56 #define MMC_CMD11             (MMC_INDX(11) | MMC_CMD_WAIT_RESPONSE)
57 #define MMC_CMD12             (MMC_INDX(12) | MMC_CMD_WAIT_RESPONSE)
58 #define MMC_CMD13             (MMC_INDX(13) | MMC_CMD_WAIT_RESPONSE)
59 #define MMC_CMD16             (MMC_INDX(16) | MMC_CMD_WAIT_RESPONSE)
60 #define MMC_CMD17             (MMC_INDX(17) | MMC_CMD_WAIT_RESPONSE)
61 #define MMC_CMD18             (MMC_INDX(18) | MMC_CMD_WAIT_RESPONSE)
62 #define MMC_CMD20             (MMC_INDX(20) | MMC_CMD_WAIT_RESPONSE)
63 #define MMC_CMD23             (MMC_INDX(23) | MMC_CMD_WAIT_RESPONSE)
64 #define MMC_CMD24             (MMC_INDX(24) | MMC_CMD_WAIT_RESPONSE)
65 #define MMC_CMD25             (MMC_INDX(25) | MMC_CMD_WAIT_RESPONSE)
66 #define MMC_CMD35             (MMC_INDX(35) | MMC_CMD_WAIT_RESPONSE)
67 #define MMC_CMD36             (MMC_INDX(36) | MMC_CMD_WAIT_RESPONSE)
68 #define MMC_CMD38             (MMC_INDX(38) | MMC_CMD_WAIT_RESPONSE)
69 #define MMC_CMD51             (MMC_INDX(51) | MMC_CMD_WAIT_RESPONSE)
70 #define MMC_CMD55             (MMC_INDX(55) | MMC_CMD_WAIT_RESPONSE)
71 #define MMC_ACMD41            (MMC_INDX(41) | MMC_CMD_WAIT_RESPONSE | MMC_CMD_NO_CRC_RESPONSE)
72 
73 // Valid responses for CMD1 in eMMC
74 #define EMMC_CMD1_CAPACITY_LESS_THAN_2GB 0x00FF8080 // Capacity <= 2GB, byte addressing used
75 #define EMMC_CMD1_CAPACITY_GREATER_THAN_2GB 0x40FF8080 // Capacity > 2GB, 512-byte sector addressing used
76 
77 typedef enum _MMC_STATE {
78     MmcInvalidState = 0,
79     MmcHwInitializationState,
80     MmcIdleState,
81     MmcReadyState,
82     MmcIdentificationState,
83     MmcStandByState,
84     MmcTransferState,
85     MmcSendingDataState,
86     MmcReceiveDataState,
87     MmcProgrammingState,
88     MmcDisconnectState,
89 } MMC_STATE;
90 
91 #define EMMCBACKWARD         (0)
92 #define EMMCHS26             (1 << 0)      // High-Speed @26MHz at rated device voltages
93 #define EMMCHS52             (1 << 1)      // High-Speed @52MHz at rated device voltages
94 #define EMMCHS52DDR1V8       (1 << 2)      // High-Speed Dual Data Rate @52MHz 1.8V or 3V I/O
95 #define EMMCHS52DDR1V2       (1 << 3)      // High-Speed Dual Data Rate @52MHz 1.2V I/O
96 #define EMMCHS200SDR1V8      (1 << 4)      // HS200 Single Data Rate @200MHz 1.8V I/O
97 #define EMMCHS200SDR1V2      (1 << 5)      // HS200 Single Data Rate @200MHz 1.2V I/O
98 #define EMMCHS400DDR1V8      (1 << 6)      // HS400 Dual Data Rate @400MHz 1.8V I/O
99 #define EMMCHS400DDR1V2      (1 << 7)      // HS400 Dual Data Rate @400MHz 1.2V I/O
100 
101 ///
102 /// Forward declaration for EFI_MMC_HOST_PROTOCOL
103 ///
104 typedef struct _EFI_MMC_HOST_PROTOCOL  EFI_MMC_HOST_PROTOCOL;
105 
106 typedef BOOLEAN (EFIAPI *MMC_ISCARDPRESENT) (
107   IN  EFI_MMC_HOST_PROTOCOL   *This
108   );
109 
110 typedef BOOLEAN (EFIAPI *MMC_ISREADONLY) (
111   IN  EFI_MMC_HOST_PROTOCOL   *This
112   );
113 
114 typedef EFI_STATUS (EFIAPI *MMC_BUILDDEVICEPATH) (
115   IN  EFI_MMC_HOST_PROTOCOL     *This,
116   OUT EFI_DEVICE_PATH_PROTOCOL  **DevicePath
117   );
118 
119 typedef EFI_STATUS (EFIAPI *MMC_NOTIFYSTATE) (
120   IN  EFI_MMC_HOST_PROTOCOL     *This,
121   IN  MMC_STATE                 State
122   );
123 
124 typedef EFI_STATUS (EFIAPI *MMC_SENDCOMMAND) (
125   IN  EFI_MMC_HOST_PROTOCOL     *This,
126   IN  MMC_CMD                   Cmd,
127   IN  UINT32                    Argument
128   );
129 
130 typedef EFI_STATUS (EFIAPI *MMC_RECEIVERESPONSE) (
131   IN  EFI_MMC_HOST_PROTOCOL     *This,
132   IN  MMC_RESPONSE_TYPE         Type,
133   IN  UINT32                    *Buffer
134   );
135 
136 typedef EFI_STATUS (EFIAPI *MMC_READBLOCKDATA) (
137   IN  EFI_MMC_HOST_PROTOCOL     *This,
138   IN  EFI_LBA                   Lba,
139   IN  UINTN                     Length,
140   OUT UINT32                    *Buffer
141   );
142 
143 typedef EFI_STATUS (EFIAPI *MMC_WRITEBLOCKDATA) (
144   IN  EFI_MMC_HOST_PROTOCOL     *This,
145   IN  EFI_LBA                   Lba,
146   IN  UINTN                     Length,
147   IN  UINT32                    *Buffer
148   );
149 
150 typedef EFI_STATUS (EFIAPI *MMC_SETIOS) (
151   IN  EFI_MMC_HOST_PROTOCOL     *This,
152   IN  UINT32                    BusClockFreq,
153   IN  UINT32                    BusWidth,
154   IN  UINT32                    TimingMode
155   );
156 
157 typedef BOOLEAN (EFIAPI *MMC_ISMULTIBLOCK) (
158   IN  EFI_MMC_HOST_PROTOCOL     *This
159   );
160 
161 
162 struct _EFI_MMC_HOST_PROTOCOL {
163 
164   UINT32                  Revision;
165   MMC_ISCARDPRESENT       IsCardPresent;
166   MMC_ISREADONLY          IsReadOnly;
167   MMC_BUILDDEVICEPATH     BuildDevicePath;
168 
169   MMC_NOTIFYSTATE         NotifyState;
170 
171   MMC_SENDCOMMAND         SendCommand;
172   MMC_RECEIVERESPONSE     ReceiveResponse;
173 
174   MMC_READBLOCKDATA       ReadBlockData;
175   MMC_WRITEBLOCKDATA      WriteBlockData;
176 
177   MMC_SETIOS              SetIos;
178   MMC_ISMULTIBLOCK        IsMultiBlock;
179 
180 };
181 
182 #define MMC_HOST_PROTOCOL_REVISION    0x00010001    // 1.1
183 
184 extern EFI_GUID gEfiMmcHostProtocolGuid;
185 
186 #endif
187 
188