Name | Date | Size | #Lines | LOC | ||
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.. | - | - | ||||
MCTargetDesc/ | 22-Nov-2023 | - | 191 | 84 | ||
TargetInfo/ | 22-Nov-2023 | - | 37 | 13 | ||
Alpha.h | D | 22-Nov-2023 | 1.3 KiB | 44 | 21 | |
Alpha.td | D | 22-Nov-2023 | 2.4 KiB | 69 | 50 | |
AlphaAsmPrinter.cpp | D | 22-Nov-2023 | 5.4 KiB | 167 | 121 | |
AlphaBranchSelector.cpp | D | 22-Nov-2023 | 1.9 KiB | 67 | 35 | |
AlphaCallingConv.td | D | 22-Nov-2023 | 1.7 KiB | 39 | 33 | |
AlphaFrameLowering.cpp | D | 22-Nov-2023 | 4.9 KiB | 144 | 93 | |
AlphaFrameLowering.h | D | 22-Nov-2023 | 1.2 KiB | 44 | 20 | |
AlphaISelDAGToDAG.cpp | D | 22-Nov-2023 | 15.4 KiB | 426 | 319 | |
AlphaISelLowering.cpp | D | 22-Nov-2023 | 36.9 KiB | 963 | 719 | |
AlphaISelLowering.h | D | 22-Nov-2023 | 5.2 KiB | 143 | 71 | |
AlphaInstrFormats.td | D | 22-Nov-2023 | 6.9 KiB | 269 | 226 | |
AlphaInstrInfo.cpp | D | 22-Nov-2023 | 12.8 KiB | 383 | 299 | |
AlphaInstrInfo.h | D | 22-Nov-2023 | 3.5 KiB | 86 | 47 | |
AlphaInstrInfo.td | D | 22-Nov-2023 | 58 KiB | 1,160 | 1,012 | |
AlphaLLRP.cpp | D | 22-Nov-2023 | 5.6 KiB | 159 | 132 | |
AlphaMachineFunctionInfo.h | D | 22-Nov-2023 | 2.2 KiB | 63 | 27 | |
AlphaRegisterInfo.cpp | D | 22-Nov-2023 | 6.3 KiB | 200 | 133 | |
AlphaRegisterInfo.h | D | 22-Nov-2023 | 1.6 KiB | 57 | 25 | |
AlphaRegisterInfo.td | D | 22-Nov-2023 | 4.9 KiB | 134 | 122 | |
AlphaRelocations.h | D | 22-Nov-2023 | 780 | 32 | 15 | |
AlphaSchedule.td | D | 22-Nov-2023 | 3.1 KiB | 86 | 79 | |
AlphaSelectionDAGInfo.cpp | D | 22-Nov-2023 | 749 | 24 | 8 | |
AlphaSelectionDAGInfo.h | D | 22-Nov-2023 | 832 | 32 | 12 | |
AlphaSubtarget.cpp | D | 22-Nov-2023 | 1.1 KiB | 36 | 15 | |
AlphaSubtarget.h | D | 22-Nov-2023 | 1.3 KiB | 50 | 21 | |
AlphaTargetMachine.cpp | D | 22-Nov-2023 | 1.8 KiB | 52 | 30 | |
AlphaTargetMachine.h | D | 22-Nov-2023 | 2.1 KiB | 67 | 43 | |
Makefile | D | 22-Nov-2023 | 700 | 22 | 8 | |
README.txt | D | 22-Nov-2023 | 1,023 | 43 | 26 |
README.txt
1*** 2 3add gcc builtins for alpha instructions 4 5 6*** 7 8custom expand byteswap into nifty 9extract/insert/mask byte/word/longword/quadword low/high 10sequences 11 12*** 13 14see if any of the extract/insert/mask operations can be added 15 16*** 17 18match more interesting things for cmovlbc cmovlbs (move if low bit clear/set) 19 20*** 21 22lower srem and urem 23 24remq(i,j): i - (j * divq(i,j)) if j != 0 25remqu(i,j): i - (j * divqu(i,j)) if j != 0 26reml(i,j): i - (j * divl(i,j)) if j != 0 27remlu(i,j): i - (j * divlu(i,j)) if j != 0 28 29*** 30 31add crazy vector instructions (MVI): 32 33(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word 34PKWB, UNPKBW pack/unpack word to byte 35PKLB UNPKBL pack/unpack long to byte 36PERR pixel error (sum across bytes of bytewise abs(i8v8 a - i8v8 b)) 37 38cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extensions) 39 40this has some good examples for other operations that can be synthesised well 41from these rather meager vector ops (such as saturating add). 42http://www.alphalinux.org/docs/MVI-full.html 43