Lines Matching refs:op2
525 vixl32::SRegister op2 = SRegisterFrom(op2_loc); in GenMinMaxFloat() local
535 __ Vcmp(op1, op2); in GenMinMaxFloat()
546 __ vmov(cond, F32, out, op2); in GenMinMaxFloat()
553 __ Vmov(temp2, op2); in GenMinMaxFloat()
611 vixl32::DRegister op2 = DRegisterFrom(op2_loc); in GenMinMaxDouble() local
618 __ Vcmp(op1, op2); in GenMinMaxDouble()
629 __ vmov(cond, F64, out, op2); in GenMinMaxDouble()
636 __ Vand(F64, out, op1, op2); in GenMinMaxDouble()
642 __ Vorr(F64, out, op1, op2); // assemble op1/-0.0/NaN. in GenMinMaxDouble()
730 vixl32::Register op2 = InputRegisterAt(invoke, 1); in GenMinMax() local
733 __ Cmp(op1, op2); in GenMinMax()
742 __ mov(is_min ? ge : le, out, op2); in GenMinMax()