Lines Matching refs:imm16
447 void Addiu(GpuRegister rt, GpuRegister rs, uint16_t imm16);
449 void Daddiu(GpuRegister rt, GpuRegister rs, uint16_t imm16); // MIPS64
467 void Andi(GpuRegister rt, GpuRegister rs, uint16_t imm16);
469 void Ori(GpuRegister rt, GpuRegister rs, uint16_t imm16);
471 void Xori(GpuRegister rt, GpuRegister rs, uint16_t imm16);
515 void Lb(GpuRegister rt, GpuRegister rs, uint16_t imm16);
516 void Lh(GpuRegister rt, GpuRegister rs, uint16_t imm16);
517 void Lw(GpuRegister rt, GpuRegister rs, uint16_t imm16);
518 void Ld(GpuRegister rt, GpuRegister rs, uint16_t imm16); // MIPS64
519 void Lbu(GpuRegister rt, GpuRegister rs, uint16_t imm16);
520 void Lhu(GpuRegister rt, GpuRegister rs, uint16_t imm16);
521 void Lwu(GpuRegister rt, GpuRegister rs, uint16_t imm16); // MIPS64
525 void Lui(GpuRegister rt, uint16_t imm16);
526 void Aui(GpuRegister rt, GpuRegister rs, uint16_t imm16);
527 void Daui(GpuRegister rt, GpuRegister rs, uint16_t imm16); // MIPS64
528 void Dahi(GpuRegister rs, uint16_t imm16); // MIPS64
529 void Dati(GpuRegister rs, uint16_t imm16); // MIPS64
532 void Sb(GpuRegister rt, GpuRegister rs, uint16_t imm16);
533 void Sh(GpuRegister rt, GpuRegister rs, uint16_t imm16);
534 void Sw(GpuRegister rt, GpuRegister rs, uint16_t imm16);
535 void Sd(GpuRegister rt, GpuRegister rs, uint16_t imm16); // MIPS64
539 void Slti(GpuRegister rt, GpuRegister rs, uint16_t imm16);
540 void Sltiu(GpuRegister rt, GpuRegister rs, uint16_t imm16);
551 void Auipc(GpuRegister rs, uint16_t imm16);
555 void Jic(GpuRegister rt, uint16_t imm16);
556 void Jialc(GpuRegister rt, uint16_t imm16);
557 void Bltc(GpuRegister rs, GpuRegister rt, uint16_t imm16);
558 void Bltzc(GpuRegister rt, uint16_t imm16);
559 void Bgtzc(GpuRegister rt, uint16_t imm16);
560 void Bgec(GpuRegister rs, GpuRegister rt, uint16_t imm16);
561 void Bgezc(GpuRegister rt, uint16_t imm16);
562 void Blezc(GpuRegister rt, uint16_t imm16);
563 void Bltuc(GpuRegister rs, GpuRegister rt, uint16_t imm16);
564 void Bgeuc(GpuRegister rs, GpuRegister rt, uint16_t imm16);
565 void Beqc(GpuRegister rs, GpuRegister rt, uint16_t imm16);
566 void Bnec(GpuRegister rs, GpuRegister rt, uint16_t imm16);
569 void Bc1eqz(FpuRegister ft, uint16_t imm16);
570 void Bc1nez(FpuRegister ft, uint16_t imm16);
571 void Beq(GpuRegister rs, GpuRegister rt, uint16_t imm16); // R2
572 void Bne(GpuRegister rs, GpuRegister rt, uint16_t imm16); // R2
573 void Beqz(GpuRegister rt, uint16_t imm16); // R2
574 void Bnez(GpuRegister rt, uint16_t imm16); // R2
575 void Bltz(GpuRegister rt, uint16_t imm16); // R2
576 void Bgez(GpuRegister rt, uint16_t imm16); // R2
577 void Blez(GpuRegister rt, uint16_t imm16); // R2
578 void Bgtz(GpuRegister rt, uint16_t imm16); // R2
660 void Lwc1(FpuRegister ft, GpuRegister rs, uint16_t imm16);
661 void Ldc1(FpuRegister ft, GpuRegister rs, uint16_t imm16);
662 void Swc1(FpuRegister ft, GpuRegister rs, uint16_t imm16);
663 void Sdc1(FpuRegister ft, GpuRegister rs, uint16_t imm16);
1658 void EmitBcondR2(BranchCondition cond, GpuRegister rs, GpuRegister rt, uint16_t imm16);