Lines Matching refs:getSubReg
80 if (SubIdx && getSubReg()) in substVirtReg()
81 SubIdx = TRI.composeSubRegIndices(SubIdx, getSubReg()); in substVirtReg()
89 if (getSubReg()) { in substPhysReg()
90 Reg = TRI.getSubReg(Reg, getSubReg()); in substPhysReg()
226 getSubReg() == Other.getSubReg(); in isIdenticalTo()
268 return hash_combine(MO.getType(), MO.getReg(), MO.getSubReg(), MO.isDef()); in hash_value()
317 OS << PrintReg(getReg(), TRI, getSubReg()); in print()
333 if (isUndef() && getSubReg()) in print()
1251 if (unsigned SubIdx = MO.getSubReg()) { in getRegClassConstraintEffect()
1325 else if (MO.getSubReg() && !MO.isUndef()) in readsWritesVirtualRegister()
1494 ToReg = RegInfo.getSubReg(ToReg, SubIdx); in substituteRegister()
2081 if (!MO.isReg() || !MO.isDef() || MO.getReg() != Reg || MO.getSubReg() == 0) in setRegisterDefReadUndef()
2096 MO.getSubReg() == 0) in addRegisterDefined()