Lines Matching refs:b11
442 defm MOVK : InsertImmediate<0b11, "movk">;
705 defm RORV : Shift<0b11, "ror", rotr>;
804 def CRC32Xrr : BaseCRC32<1, 0b11, 0, GPR64, int_aarch64_crc32x, "crc32x">;
809 def CRC32CXrr : BaseCRC32<1, 0b11, 1, GPR64, int_aarch64_crc32cx, "crc32cx">;
885 defm ANDS : LogicalImmS<0b11, "ands", AArch64and_flag, "bics">;
900 defm ANDS : LogicalRegS<0b11, 0, "ands", AArch64and_flag>;
901 defm BICS : LogicalRegS<0b11, 1, "bics",
1278 def DCPS3 : ExceptionGeneration<0b101, 0b11, "dcps3">;
1281 def SMC : ExceptionGeneration<0b000, 0b11, "smc">;
1336 defm LDRX : Load64RO<0b11, 0, 0b01, GPR64, "ldr", i64, load>;
1342 defm LDRD : Load64RO<0b11, 1, 0b01, FPR64, "ldr", f64, load>;
1343 defm LDRQ : Load128RO<0b00, 1, 0b11, FPR128, "ldr", f128, load>;
1346 defm LDRSHW : Load16RO<0b01, 0, 0b11, GPR32, "ldrsh", i32, sextloadi16>;
1350 defm LDRSBW : Load8RO<0b00, 0, 0b11, GPR32, "ldrsb", i32, sextloadi8>;
1357 defm PRFM : PrefetchRO<0b11, 0, 0b10, "prfm">;
1505 defm LDRX : LoadUI<0b11, 0, 0b01, GPR64, uimm12s8, "ldr",
1520 defm LDRD : LoadUI<0b11, 1, 0b01, FPR64, uimm12s8, "ldr",
1523 defm LDRQ : LoadUI<0b00, 1, 0b11, FPR128, uimm12s16, "ldr",
1640 defm LDRSHW : LoadUI<0b01, 0, 0b11, GPR32, uimm12s2, "ldrsh",
1650 defm LDRSBW : LoadUI<0b00, 0, 0b11, GPR32, uimm12s1, "ldrsb",
1670 def PRFMui : PrefetchUI<0b11, 0, 0b10, "prfm",
1689 def PRFMl : PrefetchLiteral<0b11, 0, "prfm", []>;
1694 defm LDURX : LoadUnscaled<0b11, 0, 0b01, GPR64, "ldur",
1709 defm LDURD : LoadUnscaled<0b11, 1, 0b01, FPR64, "ldur",
1712 defm LDURQ : LoadUnscaled<0b00, 1, 0b11, FPR128, "ldur",
1851 : LoadUnscaled<0b01, 0, 0b11, GPR32, "ldursh",
1861 : LoadUnscaled<0b00, 0, 0b11, GPR32, "ldursb",
1892 defm PRFUM : PrefetchUnscaled<0b11, 0, 0b10, "prfum",
1898 defm LDTRX : LoadUnprivileged<0b11, 0, 0b01, GPR64, "ldtr">;
1905 defm LDTRSHW : LoadUnprivileged<0b01, 0, 0b11, GPR32, "ldtrsh">;
1909 defm LDTRSBW : LoadUnprivileged<0b00, 0, 0b11, GPR32, "ldtrsb">;
1918 def LDRXpre : LoadPreIdx<0b11, 0, 0b01, GPR64, "ldr">;
1922 def LDRDpre : LoadPreIdx<0b11, 1, 0b01, FPR64, "ldr">;
1923 def LDRQpre : LoadPreIdx<0b00, 1, 0b11, FPR128, "ldr">;
1926 def LDRSHWpre : LoadPreIdx<0b01, 0, 0b11, GPR32, "ldrsh">;
1930 def LDRSBWpre : LoadPreIdx<0b00, 0, 0b11, GPR32, "ldrsb">;
1943 def LDRXpost : LoadPostIdx<0b11, 0, 0b01, GPR64, "ldr">;
1947 def LDRDpost : LoadPostIdx<0b11, 1, 0b01, FPR64, "ldr">;
1948 def LDRQpost : LoadPostIdx<0b00, 1, 0b11, FPR128, "ldr">;
1951 def LDRSHWpost : LoadPostIdx<0b01, 0, 0b11, GPR32, "ldrsh">;
1955 def LDRSBWpost : LoadPostIdx<0b00, 0, 0b11, GPR32, "ldrsb">;
2005 defm STRX : Store64RO<0b11, 0, 0b00, GPR64, "str", i64, store>;
2012 defm STRD : Store64RO<0b11, 1, 0b00, FPR64, "str", f64, store>;
2103 defm STRX : StoreUI<0b11, 0, 0b00, GPR64, uimm12s8, "str",
2118 defm STRD : StoreUI<0b11, 1, 0b00, FPR64, uimm12s8, "str",
2202 defm STURX : StoreUnscaled<0b11, 0, 0b00, GPR64, "stur",
2217 defm STURD : StoreUnscaled<0b11, 1, 0b00, FPR64, "stur",
2316 defm STTRX : StoreUnprivileged<0b11, 0, 0b00, GPR64, "sttr">;
2324 def STRXpre : StorePreIdx<0b11, 0, 0b00, GPR64, "str", pre_store, i64>;
2328 def STRDpre : StorePreIdx<0b11, 1, 0b00, FPR64, "str", pre_store, f64>;
2378 def STRXpost : StorePostIdx<0b11, 0, 0b00, GPR64, "str", post_store, i64>;
2382 def STRDpost : StorePostIdx<0b11, 1, 0b00, FPR64, "str", post_store, f64>;
2434 def LDARX : LoadAcquire <0b11, 1, 1, 0, 1, GPR64, "ldar">;
2439 def LDAXRX : LoadExclusive <0b11, 0, 1, 0, 1, GPR64, "ldaxr">;
2444 def LDXRX : LoadExclusive <0b11, 0, 1, 0, 0, GPR64, "ldxr">;
2449 def STLRX : StoreRelease <0b11, 1, 0, 0, 1, GPR64, "stlr">;
2454 def STLXRX : StoreExclusive<0b11, 0, 0, 0, 1, GPR64, "stlxr">;
2459 def STXRX : StoreExclusive<0b11, 0, 0, 0, 0, GPR64, "stxr">;
2464 def LDAXPX : LoadExclusivePair<0b11, 0, 1, 1, 1, GPR64, "ldaxp">;
2467 def LDXPX : LoadExclusivePair<0b11, 0, 1, 1, 0, GPR64, "ldxp">;
2470 def STLXPX : StoreExclusivePair<0b11, 0, 0, 1, 1, GPR64, "stlxp">;
2473 def STXPX : StoreExclusivePair<0b11, 0, 0, 1, 0, GPR64, "stxp">;
2478 def LDLARX : LoadAcquire <0b11, 1, 1, 0, 0, GPR64, "ldlar">;
2484 def STLLRX : StoreRelease <0b11, 1, 0, 0, 0, GPR64, "stllr">;
2501 defm FCVTZS : FPToIntegerUnscaled<0b11, 0b000, "fcvtzs", fp_to_sint>;
2502 defm FCVTZU : FPToIntegerUnscaled<0b11, 0b001, "fcvtzu", fp_to_uint>;
2503 defm FCVTZS : FPToIntegerScaled<0b11, 0b000, "fcvtzs", fp_to_sint>;
2504 defm FCVTZU : FPToIntegerScaled<0b11, 0b001, "fcvtzu", fp_to_uint>;
3033 defm BIF : SIMDLogicalThreeVector<1, 0b11, "bif">;
3038 defm ORN : SIMDLogicalThreeVector<0, 0b11, "orn",
4357 defm BIC : SIMDModifiedImmVectorShiftTied<1, 0b11, 0b01, "bic", AArch64bici>;
4359 defm ORR : SIMDModifiedImmVectorShiftTied<0, 0b11, 0b01, "orr", AArch64orri>;