Lines Matching refs:dr
100 ((dr INT -1) (sr INT -1)) ; inputs
101 ((dr INT -1)) ; outputs
121 ((dr INT -1) (sr INT -1)) ; inputs
122 ((dr INT -1)) ; output
541 (dnop dr "destination register" () h-gr f-r1)
763 (arithmetic21 addrhpof3 add add OP1_0 OP2_8 dr uimm3 HI "pof")
764 (arithmetic21 subrhpof3 sub sub OP1_2 OP2_8 dr uimm3 HI "pof")
767 (arithmetic21 addrhpag3 add add OP1_0 OP2_8 dr uimm3 HI "pag")
768 (arithmetic21 subrhpag3 sub sub OP1_2 OP2_8 dr uimm3 HI "pag")
815 (arithmetic24 addcrhpof3 addc addc OP1_1 OP2_8 dr uimm3 HI "pof")
816 (arithmetic24 subcrhpof3 subc subc OP1_3 OP2_8 dr uimm3 HI "pof")
819 (arithmetic24 addcrhpag3 addc addc OP1_1 OP2_8 dr uimm3 HI "pag")
820 (arithmetic24 subcrhpag3 subc subc OP1_3 OP2_8 dr uimm3 HI "pag")
851 (arithmetic10 addri add add OP1_0 OP2_8 dr uimm3 HI)
852 (arithmetic10 subri sub sub OP1_2 OP2_8 dr uimm3 HI)
895 (arithmetic13 addcri addc addc OP1_1 OP2_8 dr uimm3 HI)
896 (arithmetic13 subcri subc subc OP1_3 OP2_8 dr uimm3 HI)
940 (arithmetic addr add add OP1_0 OP2_0 dr sr HI)
941 (arithmetic subr sub sub OP1_2 OP2_0 dr sr HI)
956 (arithmetic1 add2 add add OP1_0 OP2_8 dr sr2 HI)
957 (arithmetic1 sub2 sub sub OP1_2 OP2_8 dr sr2 HI)
975 (arithmetic2 add2i add add OP1_0 OP2_8 dr sr2 HI)
976 (arithmetic2 sub2i sub sub OP1_2 OP2_8 dr sr2 HI)
991 (arithmetic3 addcr addc addc OP1_1 OP2_0 dr sr HI)
992 (arithmetic3 subcr subc subc OP1_3 OP2_0 dr sr HI)
1008 (arithmetic4 addcr2 addc addc OP1_1 OP2_8 dr sr2 HI)
1009 (arithmetic4 subcr2 subc subc OP1_3 OP2_8 dr sr2 HI)
1027 (arithmetic5 addcr2i addc addc OP1_1 OP2_8 dr sr2 HI)
1028 (arithmetic5 subcr2i subc subc OP1_3 OP2_8 dr sr2 HI)
1177 "cpl $dr"
1178 (+ OP1_9 OP2_1 dr (f-op-bit4 0))
1179 (set dr (inv HI dr))
1196 "neg $dr"
1197 (+ OP1_8 OP2_1 dr (f-op-bit4 0))
1198 (set dr (neg HI dr))
1226 (logical andr and and OP1_6 OP2_0 dr sr HI)
1227 (logical orr or or OP1_7 OP2_0 dr sr HI)
1228 (logical xorr xor xor OP1_5 OP2_0 dr sr HI)
1244 (logical1 andri and and OP1_6 OP2_8 dr uimm3 HI)
1245 (logical1 orri or or OP1_7 OP2_8 dr uimm3 HI)
1246 (logical1 xorri xor xor OP1_5 OP2_8 dr uimm3 HI)
1292 (logical4 and2 and and OP1_6 OP2_8 dr sr2 HI)
1293 (logical4 or2 or or OP1_7 OP2_8 dr sr2 HI)
1294 (logical4 xor2 xor xor OP1_5 OP2_8 dr sr2 HI)
1313 (logical5 and2i and and OP1_6 OP2_8 dr sr2 HI)
1314 (logical5 or2i or or OP1_7 OP2_8 dr sr2 HI)
1315 (logical5 xor2i xor xor OP1_5 OP2_8 dr sr2 HI)
1418 (move movr mov OP1_15 OP2_0 dr sr HI)
1464 (mov2 movr2 mov OP1_10 OP2_8 dr sr HI)
1478 (mov3 movri2 mov OP1_11 OP2_8 dr sr HI)
1495 (mov4 movri3 mov OP1_8 OP2_8 dr sr HI)
1512 (mov5 mov2i mov OP1_9 OP2_8 dr sr HI)
1526 (mov6 mov6i mov OP1_12 OP2_8 dr sr HI)
1527 (mov6 movb6i movb OP1_12 OP2_9 dr sr HI)
1543 (mov7 mov7i mov OP1_13 OP2_8 dr sr HI)
1544 (mov7 movb7i movb OP1_13 OP2_9 dr sr HI)
1560 (mov8 mov8i mov OP1_14 OP2_8 dr sr HI)
1561 (mov8 movb8i movb OP1_14 OP2_9 dr sr HI)
1577 (mov9 mov9i mov OP1_13 OP2_4 dr sr HI)
1594 (mov10 mov10i mov OP1_12 OP2_4 dr sr HI)
2648 "prior $dr,$sr"
2649 (+ OP1_2 OP2_11 dr sr)
2661 (set HI dr count)
2998 (cmp2 cmpr2 cmp OP1_4 OP2_8 dr sr2 HI)
3015 (cmp3 cmp2i cmp OP1_4 OP2_8 dr sr2 HI)
3126 (shift shlr shl sll OP1_4 OP2_12 dr sr HI)
3127 (shift shrr shr srl OP1_6 OP2_12 dr sr HI)
3128 (shift rolr rol rol OP1_0 OP2_12 dr sr HI)
3129 (shift rorr ror ror OP1_2 OP2_12 dr sr HI)
3130 (shift ashrr ashr sra OP1_10 OP2_12 dr sr HI)