Lines Matching refs:iw0

1998 decode_ProgCtrl_0 (int iw0)  in decode_ProgCtrl_0()  argument
2000 if (iw0 == 0) in decode_ProgCtrl_0()
2006 decode_LDSTpmod_0 (int iw0) in decode_LDSTpmod_0() argument
2012 int W = ((iw0 >> LDSTpmod_W_bits) & LDSTpmod_W_mask); in decode_LDSTpmod_0()
2013 int aop = ((iw0 >> LDSTpmod_aop_bits) & LDSTpmod_aop_mask); in decode_LDSTpmod_0()
2014 int idx = ((iw0 >> LDSTpmod_idx_bits) & LDSTpmod_idx_mask); in decode_LDSTpmod_0()
2015 int ptr = ((iw0 >> LDSTpmod_ptr_bits) & LDSTpmod_ptr_mask); in decode_LDSTpmod_0()
2016 int reg = ((iw0 >> LDSTpmod_reg_bits) & LDSTpmod_reg_mask); in decode_LDSTpmod_0()
2049 decode_dagMODim_0 (int iw0) in decode_dagMODim_0() argument
2055 int i = ((iw0 >> DagMODim_i_bits) & DagMODim_i_mask); in decode_dagMODim_0()
2056 int opc = ((iw0 >> DagMODim_op_bits) & DagMODim_op_mask); in decode_dagMODim_0()
2067 decode_dagMODik_0 (int iw0) in decode_dagMODik_0() argument
2073 int i = ((iw0 >> DagMODik_i_bits) & DagMODik_i_mask); in decode_dagMODik_0()
2079 decode_dspLDST_0 (int iw0) in decode_dspLDST_0() argument
2085 int i = ((iw0 >> DspLDST_i_bits) & DspLDST_i_mask); in decode_dspLDST_0()
2086 int m = ((iw0 >> DspLDST_m_bits) & DspLDST_m_mask); in decode_dspLDST_0()
2087 int W = ((iw0 >> DspLDST_W_bits) & DspLDST_W_mask); in decode_dspLDST_0()
2088 int aop = ((iw0 >> DspLDST_aop_bits) & DspLDST_aop_mask); in decode_dspLDST_0()
2089 int reg = ((iw0 >> DspLDST_reg_bits) & DspLDST_reg_mask); in decode_dspLDST_0()
2137 decode_LDST_0 (int iw0) in decode_LDST_0() argument
2143 int Z = ((iw0 >> LDST_Z_bits) & LDST_Z_mask); in decode_LDST_0()
2144 int W = ((iw0 >> LDST_W_bits) & LDST_W_mask); in decode_LDST_0()
2145 int sz = ((iw0 >> LDST_sz_bits) & LDST_sz_mask); in decode_LDST_0()
2146 int aop = ((iw0 >> LDST_aop_bits) & LDST_aop_mask); in decode_LDST_0()
2147 int reg = ((iw0 >> LDST_reg_bits) & LDST_reg_mask); in decode_LDST_0()
2214 decode_LDSTiiFP_0 (int iw0) in decode_LDSTiiFP_0() argument
2220 int reg = ((iw0 >> LDSTiiFP_reg_bits) & LDSTiiFP_reg_mask); in decode_LDSTiiFP_0()
2221 int W = ((iw0 >> LDSTiiFP_W_bits) & LDSTiiFP_W_mask); in decode_LDSTiiFP_0()
2230 decode_LDSTii_0 (int iw0) in decode_LDSTii_0() argument
2236 int reg = ((iw0 >> LDSTii_reg_bit) & LDSTii_reg_mask); in decode_LDSTii_0()
2237 int opc = ((iw0 >> LDSTii_op_bit) & LDSTii_op_mask); in decode_LDSTii_0()
2238 int W = ((iw0 >> LDSTii_W_bit) & LDSTii_W_mask); in decode_LDSTii_0()
2255 decode_dsp32mac_0 (int iw0, int iw1) in decode_dsp32mac_0() argument
2263 int op1 = ((iw0 >> (DSP32Mac_op1_bits - 16)) & DSP32Mac_op1_mask); in decode_dsp32mac_0()
2264 int w1 = ((iw0 >> (DSP32Mac_w1_bits - 16)) & DSP32Mac_w1_mask); in decode_dsp32mac_0()
2265 int P = ((iw0 >> (DSP32Mac_p_bits - 16)) & DSP32Mac_p_mask); in decode_dsp32mac_0()
2266 int mmod = ((iw0 >> (DSP32Mac_mmod_bits - 16)) & DSP32Mac_mmod_mask); in decode_dsp32mac_0()
2310 decode_dsp32mult_0 (int iw0, int iw1) in decode_dsp32mult_0() argument
2317 int w1 = ((iw0 >> (DSP32Mac_w1_bits - 16)) & DSP32Mac_w1_mask); in decode_dsp32mult_0()
2318 int P = ((iw0 >> (DSP32Mac_p_bits - 16)) & DSP32Mac_p_mask); in decode_dsp32mult_0()
2319 int mmod = ((iw0 >> (DSP32Mac_mmod_bits - 16)) & DSP32Mac_mmod_mask); in decode_dsp32mult_0()
2350 decode_dsp32alu_0 (int iw0, int iw1) in decode_dsp32alu_0() argument
2362 int HL = ((iw0 >> (DSP32Alu_HL_bits - 16)) & DSP32Alu_HL_mask); in decode_dsp32alu_0()
2363 int aopcde = ((iw0 >> (DSP32Alu_aopcde_bits - 16)) & DSP32Alu_aopcde_mask); in decode_dsp32alu_0()
2479 decode_dsp32shift_0 (int iw0, int iw1) in decode_dsp32shift_0() argument
2491 int sopcde = ((iw0 >> (DSP32Shift_sopcde_bits - 16)) & DSP32Shift_sopcde_mask); in decode_dsp32shift_0()
2582 decode_dsp32shiftimm_0 (int iw0, int iw1) in decode_dsp32shiftimm_0() argument
2592 int sopcde = ((iw0 >> (DSP32ShiftImm_sopcde_bits - 16)) & DSP32ShiftImm_sopcde_mask); in decode_dsp32shiftimm_0()
2647 insn_regmask (int iw0, int iw1) in insn_regmask() argument
2649 if ((iw0 & 0xf7ff) == 0xc003 && iw1 == 0x1800) in insn_regmask()
2651 else if ((iw0 & 0xff00) == 0x0000) in insn_regmask()
2652 return decode_ProgCtrl_0 (iw0); in insn_regmask()
2653 else if ((iw0 & 0xffc0) == 0x0240) in insn_regmask()
2655 else if ((iw0 & 0xff80) == 0x0100) in insn_regmask()
2657 else if ((iw0 & 0xfe00) == 0x0400) in insn_regmask()
2659 else if ((iw0 & 0xfe00) == 0x0600) in insn_regmask()
2661 else if ((iw0 & 0xf800) == 0x0800) in insn_regmask()
2663 else if ((iw0 & 0xffe0) == 0x0200) in insn_regmask()
2665 else if ((iw0 & 0xff00) == 0x0300) in insn_regmask()
2667 else if ((iw0 & 0xf000) == 0x1000) in insn_regmask()
2669 else if ((iw0 & 0xf000) == 0x2000) in insn_regmask()
2671 else if ((iw0 & 0xf000) == 0x3000) in insn_regmask()
2673 else if ((iw0 & 0xfc00) == 0x4000) in insn_regmask()
2675 else if ((iw0 & 0xfe00) == 0x4400) in insn_regmask()
2677 else if ((iw0 & 0xf800) == 0x4800) in insn_regmask()
2679 else if ((iw0 & 0xf000) == 0x5000) in insn_regmask()
2681 else if ((iw0 & 0xf800) == 0x6000) in insn_regmask()
2683 else if ((iw0 & 0xf800) == 0x6800) in insn_regmask()
2685 else if ((iw0 & 0xf000) == 0x8000) in insn_regmask()
2686 return decode_LDSTpmod_0 (iw0); in insn_regmask()
2687 else if ((iw0 & 0xff60) == 0x9e60) in insn_regmask()
2688 return decode_dagMODim_0 (iw0); in insn_regmask()
2689 else if ((iw0 & 0xfff0) == 0x9f60) in insn_regmask()
2690 return decode_dagMODik_0 (iw0); in insn_regmask()
2691 else if ((iw0 & 0xfc00) == 0x9c00) in insn_regmask()
2692 return decode_dspLDST_0 (iw0); in insn_regmask()
2693 else if ((iw0 & 0xf000) == 0x9000) in insn_regmask()
2694 return decode_LDST_0 (iw0); in insn_regmask()
2695 else if ((iw0 & 0xfc00) == 0xb800) in insn_regmask()
2696 return decode_LDSTiiFP_0 (iw0); in insn_regmask()
2697 else if ((iw0 & 0xe000) == 0xA000) in insn_regmask()
2698 return decode_LDSTii_0 (iw0); in insn_regmask()
2699 else if ((iw0 & 0xff80) == 0xe080 && (iw1 & 0x0C00) == 0x0000) in insn_regmask()
2701 else if ((iw0 & 0xff00) == 0xe100 && (iw1 & 0x0000) == 0x0000) in insn_regmask()
2703 else if ((iw0 & 0xfe00) == 0xe200 && (iw1 & 0x0000) == 0x0000) in insn_regmask()
2705 else if ((iw0 & 0xfc00) == 0xe400 && (iw1 & 0x0000) == 0x0000) in insn_regmask()
2707 else if ((iw0 & 0xfffe) == 0xe800 && (iw1 & 0x0000) == 0x0000) in insn_regmask()
2709 else if ((iw0 & 0xf600) == 0xc000 && (iw1 & 0x0000) == 0x0000) in insn_regmask()
2710 return decode_dsp32mac_0 (iw0, iw1); in insn_regmask()
2711 else if ((iw0 & 0xf600) == 0xc200 && (iw1 & 0x0000) == 0x0000) in insn_regmask()
2712 return decode_dsp32mult_0 (iw0, iw1); in insn_regmask()
2713 else if ((iw0 & 0xf7c0) == 0xc400 && (iw1 & 0x0000) == 0x0000) in insn_regmask()
2714 return decode_dsp32alu_0 (iw0, iw1); in insn_regmask()
2715 else if ((iw0 & 0xf780) == 0xc600 && (iw1 & 0x01c0) == 0x0000) in insn_regmask()
2716 return decode_dsp32shift_0 (iw0, iw1); in insn_regmask()
2717 else if ((iw0 & 0xf780) == 0xc680 && (iw1 & 0x0000) == 0x0000) in insn_regmask()
2718 return decode_dsp32shiftimm_0 (iw0, iw1); in insn_regmask()
2719 else if ((iw0 & 0xff00) == 0xf800) in insn_regmask()
2721 else if ((iw0 & 0xFFC0) == 0xf000 && (iw1 & 0x0000) == 0x0000) in insn_regmask()