2255 decode_dsp32mac_0 (int iw0, int iw1)  in decode_dsp32mac_0()  argument
2267   int w0   = ((iw1 >> DSP32Mac_w0_bits) & DSP32Mac_w0_mask);  in decode_dsp32mac_0()
2268   int MM   = ((iw1 >> DSP32Mac_MM_bits) & DSP32Mac_MM_mask);  in decode_dsp32mac_0()
2269   int dst  = ((iw1 >> DSP32Mac_dst_bits) & DSP32Mac_dst_mask);  in decode_dsp32mac_0()
2270   int op0  = ((iw1 >> DSP32Mac_op0_bits) & DSP32Mac_op0_mask);  in decode_dsp32mac_0()
2310 decode_dsp32mult_0 (int iw0, int iw1)  in decode_dsp32mult_0()  argument
2320   int w0   = ((iw1 >> DSP32Mac_w0_bits) & DSP32Mac_w0_mask);  in decode_dsp32mult_0()
2321   int dst  = ((iw1 >> DSP32Mac_dst_bits) & DSP32Mac_dst_mask);  in decode_dsp32mult_0()
2350 decode_dsp32alu_0 (int iw0, int iw1)  in decode_dsp32alu_0()  argument
2357   int s    = ((iw1 >> DSP32Alu_s_bits) & DSP32Alu_s_mask);  in decode_dsp32alu_0()
2358   int x    = ((iw1 >> DSP32Alu_x_bits) & DSP32Alu_x_mask);  in decode_dsp32alu_0()
2359   int aop  = ((iw1 >> DSP32Alu_aop_bits) & DSP32Alu_aop_mask);  in decode_dsp32alu_0()
2360   int dst0 = ((iw1 >> DSP32Alu_dst0_bits) & DSP32Alu_dst0_mask);  in decode_dsp32alu_0()
2361   int dst1 = ((iw1 >> DSP32Alu_dst1_bits) & DSP32Alu_dst1_mask);  in decode_dsp32alu_0()
2479 decode_dsp32shift_0 (int iw0, int iw1)  in decode_dsp32shift_0()  argument
2486   int HLs  = ((iw1 >> DSP32Shift_HLs_bits) & DSP32Shift_HLs_mask);  in decode_dsp32shift_0()
2487   int sop  = ((iw1 >> DSP32Shift_sop_bits) & DSP32Shift_sop_mask);  in decode_dsp32shift_0()
2488   int src0 = ((iw1 >> DSP32Shift_src0_bits) & DSP32Shift_src0_mask);  in decode_dsp32shift_0()
2489   int src1 = ((iw1 >> DSP32Shift_src1_bits) & DSP32Shift_src1_mask);  in decode_dsp32shift_0()
2490   int dst0 = ((iw1 >> DSP32Shift_dst0_bits) & DSP32Shift_dst0_mask);  in decode_dsp32shift_0()
2582 decode_dsp32shiftimm_0 (int iw0, int iw1)  in decode_dsp32shiftimm_0()  argument
2589   int sop      = ((iw1 >> DSP32ShiftImm_sop_bits) & DSP32ShiftImm_sop_mask);  in decode_dsp32shiftimm_0()
2590   int bit8     = ((iw1 >> 8) & 0x1);  in decode_dsp32shiftimm_0()
2591   int dst0     = ((iw1 >> DSP32ShiftImm_dst0_bits) & DSP32ShiftImm_dst0_mask);  in decode_dsp32shiftimm_0()
2593   int HLs      = ((iw1 >> DSP32ShiftImm_HLs_bits) & DSP32ShiftImm_HLs_mask);  in decode_dsp32shiftimm_0()
2647 insn_regmask (int iw0, int iw1)  in insn_regmask()  argument
2649   if ((iw0 & 0xf7ff) == 0xc003 && iw1 == 0x1800)  in insn_regmask()
2699   else if ((iw0 & 0xff80) == 0xe080 && (iw1 & 0x0C00) == 0x0000)  in insn_regmask()
2701   else if ((iw0 & 0xff00) == 0xe100 && (iw1 & 0x0000) == 0x0000)  in insn_regmask()
2703   else if ((iw0 & 0xfe00) == 0xe200 && (iw1 & 0x0000) == 0x0000)  in insn_regmask()
2705   else if ((iw0 & 0xfc00) == 0xe400 && (iw1 & 0x0000) == 0x0000)  in insn_regmask()
2707   else if ((iw0 & 0xfffe) == 0xe800 && (iw1 & 0x0000) == 0x0000)  in insn_regmask()
2709   else if ((iw0 & 0xf600) == 0xc000 && (iw1 & 0x0000) == 0x0000)  in insn_regmask()
2710     return decode_dsp32mac_0 (iw0, iw1);  in insn_regmask()
2711   else if ((iw0 & 0xf600) == 0xc200 && (iw1 & 0x0000) == 0x0000)  in insn_regmask()
2712     return decode_dsp32mult_0 (iw0, iw1);  in insn_regmask()
2713   else if ((iw0 & 0xf7c0) == 0xc400 && (iw1 & 0x0000) == 0x0000)  in insn_regmask()
2714     return decode_dsp32alu_0 (iw0, iw1);  in insn_regmask()
2715   else if ((iw0 & 0xf780) == 0xc600 && (iw1 & 0x01c0) == 0x0000)  in insn_regmask()
2716     return decode_dsp32shift_0 (iw0, iw1);  in insn_regmask()
2717   else if ((iw0 & 0xf780) == 0xc680 && (iw1 & 0x0000) == 0x0000)  in insn_regmask()
2718     return decode_dsp32shiftimm_0 (iw0, iw1);  in insn_regmask()
2721   else if ((iw0 & 0xFFC0) == 0xf000 && (iw1 & 0x0000) == 0x0000)  in insn_regmask()