Lines Matching refs:src1
1174 REG_T dst, REG_T src0, REG_T src1, int w0) in bfin_gen_dsp32mac() argument
1199 ASSIGN_R (src1); in bfin_gen_dsp32mac()
1207 REG_T dst, REG_T src0, REG_T src1, int w0) in bfin_gen_dsp32mult() argument
1230 ASSIGN_R (src1); in bfin_gen_dsp32mult()
1237 REG_T dst0, REG_T dst1, REG_T src0, REG_T src1) in bfin_gen_dsp32alu() argument
1249 ASSIGN_R (src1); in bfin_gen_dsp32alu()
1256 REG_T src1, int sop, int HLs) in bfin_gen_dsp32shift() argument
1266 ASSIGN_R (src1); in bfin_gen_dsp32shift()
1273 REG_T src1, int sop, int HLs) in bfin_gen_dsp32shiftimm() argument
1283 ASSIGN_R (src1); in bfin_gen_dsp32shiftimm()
1656 bfin_gen_comp3op (REG_T src0, REG_T src1, REG_T dst, int opc) in bfin_gen_comp3op() argument
1661 ASSIGN_R (src1); in bfin_gen_comp3op()
2489 int src1 = ((iw1 >> DSP32Shift_src1_bits) & DSP32Shift_src1_mask); in decode_dsp32shift_0() local
2538 return DREG_MASK (src0) | DREG_MASK (src1); in decode_dsp32shift_0()
2544 OUTS (outf, dregs (src1)); in decode_dsp32shift_0()
2549 return DREG_MASK (src0) | DREG_MASK (src1); in decode_dsp32shift_0()
2555 OUTS (outf, dregs (src1)); in decode_dsp32shift_0()