Lines Matching refs:mips_opts
109 #define AT mips_opts.at
291 static struct mips_set_options mips_opts = variable
312 #define ISA_SUPPORTS_MIPS16E (mips_opts.isa == ISA_MIPS32 \
313 || mips_opts.isa == ISA_MIPS32R2 \
314 || mips_opts.isa == ISA_MIPS32R3 \
315 || mips_opts.isa == ISA_MIPS32R5 \
316 || mips_opts.isa == ISA_MIPS64 \
317 || mips_opts.isa == ISA_MIPS64R2 \
318 || mips_opts.isa == ISA_MIPS64R3 \
319 || mips_opts.isa == ISA_MIPS64R5)
393 || (mips_opts.micromips \
408 || (mips_opts.ase & ASE_SMARTMIPS) \
409 || mips_opts.micromips \
456 (mips_opts.gp == 64 && !ISA_HAS_64BIT_REGS (mips_opts.isa) \
458 : mips_opts.gp)
461 (mips_opts.fp == 64 && !ISA_HAS_64BIT_FPRS (mips_opts.isa) \
463 : mips_opts.fp)
480 (HAVE_32BIT_ADDRESSES || !HAVE_64BIT_OBJECTS || mips_opts.sym32)
521 ((mips_opts.isa != ISA_MIPS1) && ((CPU) != CPU_R5900))
536 (mips_opts.isa == ISA_MIPS32 \
537 || mips_opts.isa == ISA_MIPS32R2 \
538 || mips_opts.isa == ISA_MIPS32R3 \
539 || mips_opts.isa == ISA_MIPS32R5 \
540 || mips_opts.isa == ISA_MIPS32R6 \
541 || mips_opts.isa == ISA_MIPS64 \
542 || mips_opts.isa == ISA_MIPS64R2 \
543 || mips_opts.isa == ISA_MIPS64R3 \
544 || mips_opts.isa == ISA_MIPS64R5 \
545 || mips_opts.isa == ISA_MIPS64R6 \
546 || mips_opts.arch == CPU_R4010 \
547 || mips_opts.arch == CPU_R5900 \
548 || mips_opts.arch == CPU_R10000 \
549 || mips_opts.arch == CPU_R12000 \
550 || mips_opts.arch == CPU_R14000 \
551 || mips_opts.arch == CPU_R16000 \
552 || mips_opts.arch == CPU_RM7000 \
553 || mips_opts.arch == CPU_VR5500 \
554 || mips_opts.micromips \
563 (mips_opts.isa != ISA_MIPS1 \
564 || mips_opts.arch == CPU_R3900 \
565 || mips_opts.arch == CPU_R5900 \
566 || mips_opts.micromips \
579 ((mips_opts.isa != ISA_MIPS1 \
580 && mips_opts.isa != ISA_MIPS2 \
581 && mips_opts.isa != ISA_MIPS3) \
582 || mips_opts.arch == CPU_R4300 \
583 || mips_opts.micromips \
593 (mips_opts.isa != ISA_MIPS1 \
594 || mips_opts.micromips \
605 ((mips_opts.mips16 | mips_opts.micromips) != 0)
810 #define NOP_INSN (mips_opts.mips16 \
812 : (mips_opts.micromips \
813 ? (mips_opts.insn32 \
819 #define NOP_INSN_SIZE ((mips_opts.mips16 \
820 || (mips_opts.micromips && !mips_opts.insn32)) \
1973 if (mips_opts.isa == ISA_MIPS32R2 || mips_opts.isa == ISA_MIPS64R2) in mips_isa_rev()
1976 if (mips_opts.isa == ISA_MIPS32R3 || mips_opts.isa == ISA_MIPS64R3) in mips_isa_rev()
1979 if (mips_opts.isa == ISA_MIPS32R5 || mips_opts.isa == ISA_MIPS64R5) in mips_isa_rev()
1982 if (mips_opts.isa == ISA_MIPS32R6 || mips_opts.isa == ISA_MIPS64R6) in mips_isa_rev()
1986 if (mips_opts.micromips) in mips_isa_rev()
1989 if (mips_opts.isa == ISA_MIPS32 || mips_opts.isa == ISA_MIPS64) in mips_isa_rev()
2019 if (ISA_HAS_64BIT_REGS (mips_opts.isa)) in mips_check_isa_supports_ase()
2020 min_rev = mips_opts.micromips ? ase->micromips64_rev : ase->mips64_rev; in mips_check_isa_supports_ase()
2022 min_rev = mips_opts.micromips ? ase->micromips32_rev : ase->mips32_rev; in mips_check_isa_supports_ase()
2027 base = mips_opts.micromips ? "microMIPS" : "MIPS"; in mips_check_isa_supports_ase()
2028 size = ISA_HAS_64BIT_REGS (mips_opts.isa) ? 64 : 32; in mips_check_isa_supports_ase()
2040 base = mips_opts.micromips ? "microMIPS" : "MIPS"; in mips_check_isa_supports_ase()
2041 size = ISA_HAS_64BIT_REGS (mips_opts.isa) ? 64 : 32; in mips_check_isa_supports_ase()
2047 && mips_opts.fp != 64 in mips_check_isa_supports_ase()
2066 if ((mips_opts.ase & mask) == mips_ases[i].flags) in mips_check_isa_supports_ases()
2123 if (mips_opts.micromips) in insn_length()
2125 else if (mips_opts.mips16) in insn_length()
2144 insn->fixed_p = (mips_opts.noreorder > 0); in create_insn()
2145 insn->noreorder_p = (mips_opts.noreorder > 0); in create_insn()
2210 if (si->tc_segment_info_data.mips16 != mips_opts.mips16) in mips_record_compressed_mode()
2211 si->tc_segment_info_data.mips16 = mips_opts.mips16; in mips_record_compressed_mode()
2212 if (si->tc_segment_info_data.micromips != mips_opts.micromips) in mips_record_compressed_mode()
2213 si->tc_segment_info_data.micromips = mips_opts.micromips; in mips_record_compressed_mode()
3208 int isa = mips_opts.isa; in is_opcode_valid()
3209 int ase = mips_opts.ase; in is_opcode_valid()
3213 if (ISA_HAS_64BIT_REGS (mips_opts.isa)) in is_opcode_valid()
3218 if (!opcode_is_member (mo, isa, ase, mips_opts.arch)) in is_opcode_valid()
3235 if (fp_d && (mips_opts.soft_float || mips_opts.single_float)) in is_opcode_valid()
3238 if (fp_s && mips_opts.soft_float) in is_opcode_valid()
3250 return opcode_is_member (mo, mips_opts.isa, 0, mips_opts.arch); in is_opcode_valid_16()
3259 if (!mips_opts.micromips) in is_size_valid()
3262 if (mips_opts.insn32) in is_size_valid()
3293 if (!mips_opts.micromips) in is_delay_slot_valid()
3932 else if (ISA_IS_R6 (mips_opts.isa)) in file_mips_check_options()
3988 mips_opts = file_mips_opts; in file_mips_check_options()
4017 if (mips_opts.mips16) in md_assemble()
4031 if (mips_opts.mips16) in md_assemble()
4287 if (mips_opts.mips16) in mips_compressed_mark_label()
4401 if (mips_opts.micromips in get_delay_slot_nop()
4557 mask |= 1 << EXTRACT_OPERAND (mips_opts.micromips, RT, *ip); in gpr_read_mask()
4558 mask |= 1 << EXTRACT_OPERAND (mips_opts.micromips, RS, *ip); in gpr_read_mask()
4589 mask |= 1 << EXTRACT_OPERAND (mips_opts.micromips, RD, *ip); in gpr_write_mask()
4641 bfd_boolean oddspreg = (ISA_HAS_ODD_SINGLE_FPR (mips_opts.isa, mips_opts.arch) in mips_oddfpreg_ok()
4643 && mips_opts.oddspreg; in mips_oddfpreg_ok()
4830 if ((mips_opts.ase & ASE_MDMX) in convert_reg_type()
5066 && !mips_opts.micromips in match_int_operand()
5230 || (mips_opts.arch == CPU_R5900 in match_perf_reg_operand()
5841 || ISA_HAS_MXHC1 (mips_opts.isa) in match_float_constant()
6064 if (!mips_opts.noreorder in reg_needs_delay()
6129 && !mips_opts.micromips in insns_between()
6136 if (mips_fix_24k && !mips_opts.micromips) in insns_between()
6151 if (mips_fix_rm7000 && !mips_opts.micromips) in insns_between()
6163 if (mips_fix_vr4120 && !mips_opts.micromips) in insns_between()
6500 if (mips_fix_vr4130 && !mips_opts.micromips) in nops_for_insn()
6507 if (mips_fix_24k && !mips_opts.micromips) in nops_for_insn()
6592 if (! mips_opts.at) in fix_loongson2f_jump()
6637 if (mips_opts.nomove) in can_swap_branch_p()
6661 if (mips_opts.mips16 && history[0].fixp[0]) in can_swap_branch_p()
6674 if (!mips_opts.mips16 in can_swap_branch_p()
6740 if (mips_opts.micromips in can_swap_branch_p()
6744 if (mips_opts.micromips in can_swap_branch_p()
6752 if (mips_opts.arch == CPU_R5900 in can_swap_branch_p()
6814 if (mips_opts.noreorder) in get_append_method()
6824 if (mips_opts.mips16 in get_append_method()
6956 if (!mips_opts.micromips) in micromips_map_reloc()
7035 file_ase_mips16 |= mips_opts.mips16; in append_insn()
7036 file_ase_micromips |= mips_opts.micromips; in append_insn()
7041 if (mips_opts.micromips in append_insn()
7064 shift = (mips_opts.micromips in append_insn()
7090 shift = mips_opts.micromips ? 1 : 2; in append_insn()
7155 if (mips_relax.sequence != 2 && !mips_opts.noreorder) in append_insn()
7255 && !mips_opts.warn_about_macros in append_insn()
7256 && (mips_opts.at || mips_pic == NO_PIC) in append_insn()
7283 else if (mips_opts.micromips in append_insn()
7311 else if (mips_opts.mips16 && *reloc_type > BFD_RELOC_UNUSED) in append_insn()
7339 else if (mips_opts.mips16 && insn_length (ip) == 2) in append_insn()
7349 if (mips_opts.mips16 in append_insn()
7350 && mips_opts.noreorder in append_insn()
7379 if (mips_opts.mips16) in append_insn()
7511 gas_assert (mips_opts.mips16); in append_insn()
7588 if (! mips_opts.noreorder) in mips_emit_delays()
7606 if (mips_opts.noreorder == 0) in start_noreorder()
7644 mips_opts.noreorder++; in start_noreorder()
7653 mips_opts.noreorder--; in end_noreorder()
7654 if (mips_opts.noreorder == 0 && prev_nop_frag != NULL) in end_noreorder()
7736 operand = (mips_opts.micromips in match_insn()
7903 gas_assert (mips_opts.micromips); in match_insn()
7920 operand = (mips_opts.micromips in match_insn()
8134 mips_cpu_info_from_arch (mips_opts.arch)->name, in match_invalid_for_isa()
8135 mips_cpu_info_from_isa (mips_opts.isa)->name); in match_invalid_for_isa()
8211 if (mips_opts.insn32) in match_insns()
8271 mips_macro_warning.delay_slot_p = (mips_opts.noreorder in macro_start()
8340 if (mips_opts.warn_about_macros) in macro_end()
8396 #define BRK_FMT (brk_fmt[mips_opts.micromips][mips_opts.insn32])
8397 #define COP12_FMT (ISA_IS_R6 (mips_opts.isa) ? "E,+:(d)" \
8398 : cop12_fmt[mips_opts.micromips])
8399 #define JALR_FMT (jalr_fmt[mips_opts.micromips])
8400 #define LUI_FMT (lui_fmt[mips_opts.micromips])
8401 #define MEM12_FMT (mem12_fmt[mips_opts.micromips])
8402 #define LL_SC_FMT (ISA_IS_R6 (mips_opts.isa) ? "t,+j(b)" \
8403 : mem12_fmt[mips_opts.micromips])
8404 #define MFHL_FMT (mfhl_fmt[mips_opts.micromips][mips_opts.insn32])
8405 #define SHFT_FMT (shft_fmt[mips_opts.micromips])
8406 #define TRAP_FMT (trap_fmt[mips_opts.micromips])
8452 if (mips_opts.mips16) in macro_build()
8462 hash = mips_opts.micromips ? micromips_op_hash : op_hash; in macro_build()
8549 gas_assert (!mips_opts.micromips); in macro_build()
8570 operand = (mips_opts.micromips in macro_build()
8688 bfd_reloc_code_real_type jalr_reloc = jalr_relocs[mips_opts.micromips]; in macro_build_jalr()
8697 if (mips_opts.micromips) in macro_build_jalr()
8699 jalr = ((mips_opts.noreorder && !cprestore) || mips_opts.insn32 in macro_build_jalr()
8702 || mips_opts.insn32 in macro_build_jalr()
8720 gas_assert (! mips_opts.mips16); in macro_build_lui()
8771 if (!mips_opts.at) in macro_build_ldst_constoffset()
9166 if (*used_at == 0 && mips_opts.at) in load_address()
9355 if (!mips_opts.at && *used_at == 1) in load_address()
9366 if (mips_opts.micromips in move_register()
9367 && !mips_opts.insn32 in move_register()
9485 int noreorder = mips_opts.noreorder; in macro_build_branch_likely()
9488 gas_assert (mips_opts.micromips); in macro_build_branch_likely()
9558 br = mips_opts.micromips ? "bgez" : "bgezl"; in macro_build_branch_rs()
9562 gas_assert (mips_opts.micromips); in macro_build_branch_rs()
9563 br = mips_opts.insn32 ? "bgezal" : "bgezals"; in macro_build_branch_rs()
9571 br = mips_opts.micromips ? "bgtz" : "bgtzl"; in macro_build_branch_rs()
9578 br = mips_opts.micromips ? "blez" : "blezl"; in macro_build_branch_rs()
9585 br = mips_opts.micromips ? "bltz" : "bltzl"; in macro_build_branch_rs()
9589 gas_assert (mips_opts.micromips); in macro_build_branch_rs()
9590 br = mips_opts.insn32 ? "bltzal" : "bltzals"; in macro_build_branch_rs()
9597 if (mips_opts.micromips && brneg) in macro_build_branch_rs()
9622 br = mips_opts.micromips ? "beq" : "beql"; in macro_build_branch_rsrt()
9631 br = mips_opts.micromips ? "bne" : "bnel"; in macro_build_branch_rsrt()
9637 if (mips_opts.micromips && brneg) in macro_build_branch_rsrt()
9732 gas_assert (! mips_opts.mips16); in macro()
9767 if (mips_opts.micromips) in macro()
9777 if (mips_opts.micromips) in macro()
9795 if (!mips_opts.micromips) in macro()
9882 gas_assert (mips_opts.micromips); in macro()
10198 if (mips_opts.micromips) in macro()
10205 if (mips_opts.micromips) in macro()
10211 if (mips_opts.micromips) in macro()
10236 if (mips_opts.micromips) in macro()
10249 if (mips_opts.micromips) in macro()
10349 if (mips_opts.micromips) in macro()
10360 if (mips_opts.micromips) in macro()
10394 if (mips_opts.at && (op[0] == breg)) in macro()
10451 if (used_at == 0 && mips_opts.at) in macro()
10970 gas_assert (!mips_opts.micromips); in macro()
10975 gas_assert (!mips_opts.micromips); in macro()
10980 gas_assert (!mips_opts.micromips); in macro()
10985 gas_assert (!mips_opts.micromips); in macro()
10990 gas_assert (!mips_opts.micromips); in macro()
11012 gas_assert (mips_opts.micromips); in macro()
11013 if (mips_opts.insn32) in macro()
11029 if (mips_opts.micromips in macro()
11030 && !mips_opts.insn32 in macro()
11045 s = ((mips_opts.micromips in macro()
11046 && !mips_opts.insn32 in macro()
11047 && (!mips_opts.noreorder || cprestore)) in macro()
11049 if (mips_opts.micromips in macro()
11050 && !mips_opts.insn32 in macro()
11074 if (mips_opts.noreorder) in macro()
11088 gas_assert (mips_opts.micromips); in macro()
11089 if (mips_opts.insn32) in macro()
11218 if (mips_opts.noreorder) in macro()
11336 gas_assert (!mips_opts.micromips); in macro()
11351 offbits = (mips_opts.micromips ? 12 in macro()
11352 : ISA_IS_R6 (mips_opts.isa) ? 11 in macro()
11358 gas_assert (!mips_opts.micromips); in macro()
11367 offbits = (mips_opts.micromips ? 12 : 16); in macro()
11372 offbits = (mips_opts.micromips ? 12 : 16); in macro()
11383 offbits = (mips_opts.micromips ? 12 in macro()
11384 : ISA_IS_R6 (mips_opts.isa) ? 11 in macro()
11404 offbits = (mips_opts.micromips ? 12 : 16); in macro()
11409 offbits = (mips_opts.micromips ? 12 : 16); in macro()
11414 offbits = (mips_opts.micromips ? 12 in macro()
11415 : ISA_IS_R6 (mips_opts.isa) ? 9 in macro()
11421 offbits = (mips_opts.micromips ? 12 in macro()
11422 : ISA_IS_R6 (mips_opts.isa) ? 9 in macro()
11428 offbits = (mips_opts.micromips ? 12 : 16); in macro()
11431 gas_assert (mips_opts.micromips); in macro()
11438 gas_assert (mips_opts.micromips); in macro()
11445 gas_assert (mips_opts.micromips); in macro()
11451 gas_assert (mips_opts.micromips); in macro()
11478 gas_assert (!mips_opts.micromips); in macro()
11493 offbits = (mips_opts.micromips ? 12 in macro()
11494 : ISA_IS_R6 (mips_opts.isa) ? 11 in macro()
11500 gas_assert (!mips_opts.micromips); in macro()
11509 offbits = (mips_opts.micromips ? 12 : 16); in macro()
11514 offbits = (mips_opts.micromips ? 12 : 16); in macro()
11519 offbits = (mips_opts.micromips ? 12 in macro()
11520 : ISA_IS_R6 (mips_opts.isa) ? 9 in macro()
11526 offbits = (mips_opts.micromips ? 12 in macro()
11527 : ISA_IS_R6 (mips_opts.isa) ? 9 in macro()
11532 fmt = (mips_opts.micromips ? "k,~(b)" in macro()
11533 : ISA_IS_R6 (mips_opts.isa) ? "k,+j(b)" in macro()
11535 offbits = (mips_opts.micromips ? 12 in macro()
11536 : ISA_IS_R6 (mips_opts.isa) ? 9 in macro()
11546 fmt = (mips_opts.micromips ? "k,~(b)" in macro()
11547 : ISA_IS_R6 (mips_opts.isa) ? "k,+j(b)" in macro()
11549 offbits = (mips_opts.micromips ? 12 in macro()
11550 : ISA_IS_R6 (mips_opts.isa) ? 9 in macro()
11567 offbits = (mips_opts.micromips ? 12 in macro()
11568 : ISA_IS_R6 (mips_opts.isa) ? 11 in macro()
11580 gas_assert (!mips_opts.micromips); in macro()
11589 offbits = (mips_opts.micromips ? 12 : 16); in macro()
11594 offbits = (mips_opts.micromips ? 12 : 16); in macro()
11597 gas_assert (mips_opts.micromips); in macro()
11603 gas_assert (mips_opts.micromips); in macro()
11609 gas_assert (mips_opts.micromips); in macro()
11615 gas_assert (mips_opts.micromips); in macro()
11791 if (used_at == 0 && mips_opts.at) in macro()
12014 gas_assert (mips_opts.micromips); in macro()
12015 gas_assert (mips_opts.insn32); in macro()
12024 gas_assert (mips_opts.micromips); in macro()
12025 gas_assert (mips_opts.insn32); in macro()
12027 if (mips_opts.noreorder) in macro()
12153 if (ISA_HAS_MXHC1 (mips_opts.isa)) in macro()
12220 if (CPU_HAS_LDC1_SDC1 (mips_opts.arch)) in macro()
12229 gas_assert (!mips_opts.micromips); in macro()
12233 if (CPU_HAS_LDC1_SDC1 (mips_opts.arch)) in macro()
12540 gas_assert (!mips_opts.micromips); in macro()
12574 gas_assert (!mips_opts.micromips); in macro()
12585 gas_assert (mips_opts.micromips); in macro()
12586 gas_assert (mips_opts.insn32); in macro()
12596 if (mips_opts.arch == CPU_R5900) in macro()
12641 if (mips_opts.micromips) in macro()
12648 if (mips_opts.micromips) in macro()
12677 if (mips_opts.micromips) in macro()
12684 if (mips_opts.micromips) in macro()
12691 if (ISA_HAS_DROR (mips_opts.isa) || CPU_HAS_DROR (mips_opts.arch)) in macro()
12712 if (ISA_HAS_ROR (mips_opts.isa) || CPU_HAS_ROR (mips_opts.arch)) in macro()
12739 if (ISA_HAS_DROR (mips_opts.isa) || CPU_HAS_DROR (mips_opts.arch)) in macro()
12768 if (ISA_HAS_ROR (mips_opts.isa) || CPU_HAS_ROR (mips_opts.arch)) in macro()
12787 if (ISA_HAS_DROR (mips_opts.isa) || CPU_HAS_DROR (mips_opts.arch)) in macro()
12800 if (ISA_HAS_ROR (mips_opts.isa) || CPU_HAS_ROR (mips_opts.arch)) in macro()
12819 if (ISA_HAS_DROR (mips_opts.isa) || CPU_HAS_DROR (mips_opts.arch)) in macro()
12847 if (ISA_HAS_ROR (mips_opts.isa) || CPU_HAS_ROR (mips_opts.arch)) in macro()
12889 if (CPU_HAS_SEQ (mips_opts.arch) in macro()
12907 else if (CPU_HAS_SEQ (mips_opts.arch)) in macro()
13043 if (CPU_HAS_SEQ (mips_opts.arch) in macro()
13064 else if (CPU_HAS_SEQ (mips_opts.arch)) in macro()
13092 if (!mips_opts.micromips) in macro()
13145 gas_assert (!mips_opts.micromips); in macro()
13146 gas_assert (mips_opts.isa == ISA_MIPS1); in macro()
13183 offbits = (mips_opts.micromips ? 12 : 16); in macro()
13189 offbits = (mips_opts.micromips ? 12 : 16); in macro()
13201 offbits = (mips_opts.micromips ? 12 : 16); in macro()
13208 offbits = (mips_opts.micromips ? 12 : 16); in macro()
13325 if (!mips_opts.at && used_at) in macro()
13597 if (mips_opts.micromips) in mips_lookup_insn()
13644 if (mips_opts.micromips) in mips_ip()
13730 if (mips_opts.noautoextend && !forced_insn_length) in mips16_ip()
13929 if (mips_opts.mips16) in parse_relocation()
14590 mips_opts = file_mips_opts; in mips_after_parse_args()
15632 if (!reg_lookup (&s, RTYPE_NUM | RTYPE_GP, &mips_opts.at)) in parse_code_option()
15636 mips_opts.at = ATREG; in parse_code_option()
15638 mips_opts.at = ZERO; in parse_code_option()
15640 mips_opts.nomove = 0; in parse_code_option()
15642 mips_opts.nomove = 1; in parse_code_option()
15644 mips_opts.nobopt = 0; in parse_code_option()
15646 mips_opts.nobopt = 1; in parse_code_option()
15648 mips_opts.gp = 32; in parse_code_option()
15650 mips_opts.gp = 64; in parse_code_option()
15652 mips_opts.fp = 32; in parse_code_option()
15654 mips_opts.fp = 0; in parse_code_option()
15656 mips_opts.fp = 64; in parse_code_option()
15658 mips_opts.soft_float = 1; in parse_code_option()
15660 mips_opts.soft_float = 0; in parse_code_option()
15662 mips_opts.single_float = 1; in parse_code_option()
15664 mips_opts.single_float = 0; in parse_code_option()
15666 mips_opts.oddspreg = 0; in parse_code_option()
15668 mips_opts.oddspreg = 1; in parse_code_option()
15671 mips_opts.mips16 = 1; in parse_code_option()
15674 mips_opts.mips16 = 0; in parse_code_option()
15676 mips_opts.micromips = 1; in parse_code_option()
15678 mips_opts.micromips = 0; in parse_code_option()
15682 mips_set_ase (ase, &mips_opts, FALSE); in parse_code_option()
15684 mips_set_ase (ase, &mips_opts, TRUE); in parse_code_option()
15698 mips_opts.arch = p->cpu; in parse_code_option()
15699 mips_opts.isa = p->isa; in parse_code_option()
15712 mips_opts.arch = p->cpu; in parse_code_option()
15713 mips_opts.isa = p->isa; in parse_code_option()
15721 mips_opts.noautoextend = 0; in parse_code_option()
15723 mips_opts.noautoextend = 1; in parse_code_option()
15725 mips_opts.insn32 = TRUE; in parse_code_option()
15727 mips_opts.insn32 = FALSE; in parse_code_option()
15729 mips_opts.sym32 = TRUE; in parse_code_option()
15731 mips_opts.sym32 = FALSE; in parse_code_option()
15764 if (mips_opts.noreorder) in s_mipsset()
15769 if (!mips_opts.noreorder) in s_mipsset()
15773 mips_opts.warn_about_macros = 0; in s_mipsset()
15776 if (mips_opts.noreorder == 0) in s_mipsset()
15778 mips_opts.warn_about_macros = 1; in s_mipsset()
15781 mips_opts.gp = file_mips_opts.gp; in s_mipsset()
15783 mips_opts.fp = file_mips_opts.fp; in s_mipsset()
15786 mips_opts.isa = file_mips_opts.isa; in s_mipsset()
15787 mips_opts.arch = file_mips_opts.arch; in s_mipsset()
15788 mips_opts.gp = file_mips_opts.gp; in s_mipsset()
15789 mips_opts.fp = file_mips_opts.fp; in s_mipsset()
15797 s->options = mips_opts; in s_mipsset()
15811 if (s->options.noreorder && ! mips_opts.noreorder) in s_mipsset()
15813 else if (! s->options.noreorder && mips_opts.noreorder) in s_mipsset()
15816 mips_opts = s->options; in s_mipsset()
15832 switch (mips_opts.isa) in s_mipsset()
15838 mips_opts.fp = 32; in s_mipsset()
15845 mips_opts.gp = 32; in s_mipsset()
15846 if (mips_opts.fp != 0) in s_mipsset()
15847 mips_opts.fp = 32; in s_mipsset()
15850 mips_opts.gp = 32; in s_mipsset()
15851 mips_opts.fp = 64; in s_mipsset()
15861 mips_opts.gp = 64; in s_mipsset()
15862 if (mips_opts.fp != 0) in s_mipsset()
15864 if (mips_opts.arch == CPU_R5900) in s_mipsset()
15865 mips_opts.fp = 32; in s_mipsset()
15867 mips_opts.fp = 64; in s_mipsset()
15876 mips_check_options (&mips_opts, FALSE); in s_mipsset()
15901 file_mips_opts = mips_opts; in s_module()
15962 if (mips_opts.mips16) in s_cpload()
15970 if (mips_opts.noreorder == 0) in s_cpload()
16041 if (mips_opts.mips16) in s_cpsetup()
16145 if (mips_opts.mips16) in s_cplocal()
16175 if (mips_opts.mips16) in s_cprestore()
16224 if (mips_opts.mips16) in s_cpreturn()
16485 file_ase_mips16 |= mips_opts.mips16; in s_insn()
16486 file_ase_micromips |= mips_opts.micromips; in s_insn()
16922 if (mips_opts.isa == ISA_MIPS1) in relaxed_branch_length()
17553 if (mips_opts.isa == ISA_MIPS1) in md_convert_frag()
18364 if (nop_opcode == NOP_OPCODE_MICROMIPS && !mips_opts.insn32) in mips_handle_align()