Lines Matching refs:pseudo

963 An error occurs if the name is undefined.  Note - this pseudo op can
1010 implements several pseudo opcodes, including several synthetic load
1015 @cindex @code{NOP} pseudo op, ARM
1021 This pseudo op will always evaluate to a legal ARM instruction that does
1024 @cindex @code{LDR reg,=<label>} pseudo op, ARM
1036 @cindex @code{ADR reg,<label>} pseudo op, ARM
1049 @cindex @code{ADRL reg,<label>} pseudo op, ARM
1114 pseudo ops to ensure that appropriate exception unwind information is
1120 To illustrate the use of these pseudo ops, we will examine the code
1173 instructions are not important since we are focusing on the pseudo ops
1184 The @code{.fnstart} (@pxref{arm_fnstart,,.fnstart pseudo op}) pseudo
1186 while the @code{.fnend} (@pxref{arm_fnend,,.fnend pseudo op}) pseudo
1188 These pseudo ops specify the range of the function.
1192 example above, the compiler emits the pseudo ops with particular
1195 of the pseudo ops other than @code{.fnend} in the same order, but
1198 The @code{.save} (@pxref{arm_save,,.save pseudo op}) pseudo op
1201 @code{.save} pseudo op is a list of registers to save.  If a register
1209 pseudo op restores these registers in the function epilogue, as is
1213 of the function and you do not need to use the @code{.save} pseudo op
1217 might throw an exception.  And, you must use the @code{.save} pseudo
1220 The @code{.pad} (@pxref{arm_pad,,.pad}) pseudo op indicates a
1226 The @code{.setfp} (@pxref{arm_setfp,,.setfp pseudo op}) pseudo op
1236 @code{.setfp} pseudo op.  If you do not use a frame pointer, then you
1241 The pseudo ops described above are sufficient for writing assembly