Lines Matching refs:gen

3 	* i386-gen.c (opcode_modifiers): Remove VexNDS, VexNDD and
22 	* i386-gen.c (operand_types): Move Imm1 before Imm8.
33 	* i386-gen.c (opcode_modifiers): Remove ByteOkIntel.
43 	* i386-gen.c (opcode_modifiers): Remove Vex0F, Vex0F38,
71 	* i386-gen.c (opcode_modifiers): Remove Vex3Sources and
88 	* i386-gen.c (opcode_modifiers): Remove VexW0 and VexW1.  Add
191 	* ia64-gen.c: Likewise.
270 	* i386-gen.c (CPU_CVT16_FLAGS): Removed.
295 	* i386-gen.c (cpu_flag_init): Add CPU_XOP_FLAGS and CPU_CVT16_FLAGS.
393 	* i386-gen.c (opcode_modifiers): Add IsLockable.
471 	* opcodes/i386-gen.c (cpu_flag_init): Add CPU_LWP_FLAGS, CpuLWP.
682 	* i386-gen.c (opcode_modifiers): Remove Vex256.
794 	(i386-gen, ia64-gen, z8kgen): ..here.
835 	(i386-gen$(EXEEXT_FOR_BUILD)): Use it.
836 	(ia64-gen$(EXEEXT_FOR_BUILD)): And here.
857 	* i386-gen.c (process_i386_opcodes): Update code to use
901 	(i386-gen$(EXEEXT_FOR_BUILD)): Renamed from i386-gen, rewrite
903 	(i386-gen.o): New rule.
906 	(ia64-gen$(EXEEXT_FOR_BUILD)): Rename from ia64-gen, adjust likewise.
907 	(ia64-gen.o): New rule.
925 	i386-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c, ia64-opc-i.c,
926 	ia64-opc-m.c, ia64-opc-d.c, ia64-gen.c, ia64-asmtab.c removed, and
958 	(i386-gen.o, ia64-gen.o): Remove dependency statements.
998 	* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
1016 	* i386-gen.c (cpu_flag_init): Add FP enabling flags where needed.
1087 	* i386-gen.c: Add CPU_FMA4_FLAGS.
1237 	* ia64-gen.c (parse_resource_users, print_dependency_table,
1293 	* i386-gen.c: Remove CpuSSE5, Drex, Drexv and Drexc.
1514 	* i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4.
1644 	* i386-gen.c (cpu_flag_init): Remove a white space.
1660 	* i386-gen.c (cpu_flag_init): Replace CpuP4 and CpuK6 with
1693 	* i386-gen.c (cpu_flag_init): Add CpuRdtscp to CPU_K8_FLAGS
1727 	* i386-gen.c (process_copyright): Update for 2009.