Lines Matching refs:dis

4 	* hppa-dis.c (compare_cond_64_names): Change never condition to ",*".
11 * i386-dis.c (print_insn): Support bfd_mach_x64_32 and
18 * mips-dis.c (print_insn_args): Handle the new arguments +a|b|c|z|Z.
38 * mips-dis.c (mips_arch_choices): Add loongson3a.
65 * tic6x-dis.c: Add attribution.
85 * bfin-dis.c (decode_dsp32alu_0): Call imm5d() for BYTEOP2M.
145 * or32-dis.c (DEBUG): Don't redefine.
152 * tic6x-dis.c (print_insn_tic6x): Correct decoding of fstg field
158 * i386-dis.c (RMAL): Remove duplicate.
183 * s390-dis.c (print_insn_s390): Pick instruction with most
196 * arm-dis.c (arm_opcodes): Add Virtualiztion Extensions support.
204 * arm-dis.c (arm_opcodes): Support disassembly of UDIV and SDIV in
209 * arm-dis.c (arm_opcodes): SMC implies Security Extensions.
214 * arm-dis.c (arm_opcodes): Add support for pldw.
219 * bfin-dis.c (fmtconst): Cast address to 32bits.
223 * bfin-dis.c (decode_REGMV_0): Rewrite valid combo checks.
227 * bfin-dis.c (decode_ProgCtrl_0): Check for parallel insns.
249 * bfin-dis.c (decode_PushPopMultiple_0): Return 0 when pr > 5.
253 * bfin-dis.c (decode_dsp32shiftimm_0): Add missing "S" flag.
257 * bfin-dis.c (decode_CC2stat_0): Decode all ASTAT bits.
261 * bfin-dis.c (IS_DREG, IS_PREG, IS_GENREG, IS_DAGREG): Reject
270 * bfin-dis.c (decode_pseudoDEBUG_0): Add space after DBG.
274 * bfin-dis.c (machine_registers): Add AC0_COPY, V_COPY, and RND_MOD.
280 * bfin-dis.c (decode_pseudoDEBUG_0): Add space after OUTC.
286 * bfin-dis.c (decode_dsp32shift_0): Decode sub opcodes 2/2 as
291 * bfin-dis.c (constant_formats): Constify the whole structure.
308 * src/opcodes/dlx-dis.c (print_insn_dlx): Use dlx_insn type for
314 * i386-dis.c (sIv): New.
328 * i386-dis.c (reg_table): Replace Eb with Mb on prefetch and
357 * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
371 * i386-dis.c: Add 0F to VEX opcode enums.
382 * v850-dis.c (v850_sreg_names): Updated structure for system
404 * arm-dis.c (print_insn_arm): Add cases for printing more
410 * mips-dis.c (print_insn_mips): Correct branch instruction type
415 * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
428 * i386-dis.c (mod_table): Replace rdrnd with rdrand.
438 * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
445 * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
467 * i386-dis.c (PREFIX_0FAE_REG_0): New.
503 * maxq-dis.c: Delete file.
513 * mep-dis.c: Regenerate.
521 * arc-dis.c (arc_sprintf): Delete set but unused variables.
523 * dlx-dis.c (print_insn_dlx): Likewise.
524 * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
525 * maxq-dis.c (check_move, print_insn): Likewise.
526 * mep-dis.c (mep_examine_ivc2_insns): Likewise.
527 * msp430-dis.c (msp430_branchinstr): Likewise.
528 * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
530 * sparc-dis.c (print_insn_sparc): Likewise.
552 * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
556 * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and
565 * arm-dis.c (thumb-opcodes): Add disassembly for movs.
569 * arm-dis.c (print_insn_neon): Ensure disassembly of Neon
574 * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
585 * i386-dis.c (sib): New.
592 * mips-dis.c (mips_arch): Remove INSN_MIPS16.
607 * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
627 * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
632 * i386-dis.c (print_insn): Remove unused variable op.
651 * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
657 * tic6x-dis.c: New.
661 * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
665 * dis-buf.c (buffer_read_memory): Give error for reading just
671 * i386-dis.c (OP_LWP_I): Removed.
681 * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
686 * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
700 * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
702 * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
703 * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
704 * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
705 * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
722 * i386-dis.c: Update copyright.
730 * i386-dis.c (OP_EX_VexImmW): Reintroduced
750 * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
755 * ppc-dis.c (ppc_opts): Add titan entry.
772 * opcodes/arm-dis.c (struct arm_private_data): New.
784 * i386-dis.c (EXVexWdqScalar): New.
796 * i386-dis.c (XMScalar): New.
838 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
842 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
846 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
850 * i386-dis.c (Bad_Opcode): New.
881 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
889 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
904 * i386-dis.c (names_mm): New.
930 * i386-dis.c (print_insn): Update comments.
934 * i386-dis.c (rex_original): Removed.
958 * arm-dis.c (print_insn): Fixed search for next symbol and data
972 * arm-dis.c (print_insn_coprocessor): Initialise value.
976 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
981 * cgen-dis.in: Update copyright year.
983 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
985 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
986 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
988 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
990 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
992 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
993 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
995 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
996 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
998 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
1000 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
1002 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,