Lines Matching +refs:add +refs:change +refs:log +refs:entry
67 update OPCODE_MASK_H13S, add OPCODE_MASK_HN, define MIN_IMM5 / MAX_IMM5,
69 (op_code_struct): add mbar and sleep
70 * microblaze-opcm.h (microblaze_instr): add mbar
77 * microblaze-opc.h: Increase MAX_OPCODES (op_code_struct): add clz insn
78 * microblaze-opcm.h (microblaze_instr): add clz
82 * microblaze-opc.h: Increase MAX_OPCODES (op_code_struct): add lbur,
84 * microblaze-opcm.h (microblaze_instr): add lbur, lhur, lwr, sbr, shr,
104 * configure.in: Apply 2012-09-10 change to config.in here.
258 (in_iclass_mov_x): Add an entry for the new mov_* instruction type.
623 * xgate-opc.c: Corrected 'com' opcode entry and
825 * ppc-dis.c (ppc_opts): Add vle entry.
896 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
903 corresponding to unused opcodes to following entry.
993 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
996 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
1017 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
1062 mode: change-log