Lines Matching refs:OP_IX

78 #define OP_IX           M6811_OP_IX  macro
124 { "adca", OP_IX, 2, 0xa9, 4, 4, CHG_HNZVC, cpu6811, 0 },
135 { "adcb", OP_IX, 2, 0xe9, 4, 4, CHG_HNZVC, cpu6811, 0 },
146 { "adda", OP_IX, 2, 0xab, 4, 4, CHG_HNZVC, cpu6811, 0 },
157 { "addb", OP_IX, 2, 0xeb, 4, 4, CHG_HNZVC, cpu6811, 0 },
168 { "addd", OP_IX, 2, 0xe3, 6, 6, CHG_NZVC, cpu6811, 0 },
224 { "anda", OP_IX, 2, 0xa4, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
235 { "andb", OP_IX, 2, 0xe4, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
264 { "asl", OP_IX, 2, 0x68, 6, 6, CHG_NZVC, cpu6811, 0 },
289 { "asr", OP_IX, 2, 0x67, 6, 6, CHG_NZVC, cpu6811, 0 },
314 { "bclr", OP_BITMASK|OP_IX, 3, 0x1d, 7, 7, CLR_V_CHG_NZ, cpu6811, 0 },
335 { "bita", OP_IX, 2, 0xa5, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
346 { "bitb", OP_IX, 2, 0xe5, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
384 | OP_IX, 4, 0x1f, 7, 7, CHG_NONE, cpu6811, 0 },
405 | OP_IX, 4, 0x1e, 7, 7, CHG_NONE, cpu6811, 0 },
421 { "bset", OP_BITMASK | OP_IX, 3, 0x1c, 7, 7, CLR_V_CHG_NZ, cpu6811, 0 },
461 { "clr", OP_IX, 2, 0x6f, 6, 6, SET_Z_CLR_NVC, cpu6811, 0 },
491 { "cmpa", OP_IX, 2, 0xa1, 4, 4, CHG_NZVC, cpu6811, 0 },
502 { "cmpb", OP_IX, 2, 0xe1, 4, 4, CHG_NZVC, cpu6811, 0 },
511 { "com", OP_IX, 2, 0x63, 6, 6, SET_C_CLR_V_CHG_NZ, cpu6811, 0 },
539 { "cpd", OP_IX | OP_PAGE3, 3, 0xa3, 7, 7, CHG_NZVC, cpu6811, 0 },
598 { "cpx", OP_IX, 2, 0xac, 6, 6, CHG_NZVC, cpu6811, 0 },
613 { "cpy", OP_PAGE3 | OP_IX, 3, 0xac, 7, 7, CHG_NZVC, cpu6811, 0 },
632 { "dec", OP_IX, 2, 0x6a, 6, 6, CHG_NZV, cpu6811, 0 },
698 { "eora", OP_IX, 2, 0xa8, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
709 { "eorb", OP_IX, 2, 0xe8, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
849 { "inc", OP_IX, 2, 0x6c, 6, 6, CHG_NZV, cpu6811, 0 },
882 { "jmp", OP_IX, 2, 0x6e, 3, 3, CHG_NONE, cpu6811, 0 },
893 { "jsr", OP_IX, 2, 0xad, 6, 6, CHG_NONE, cpu6811, 0 },
925 { "ldaa", OP_IX, 2, 0xa6, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
936 { "ldab", OP_IX, 2, 0xe6, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
947 { "ldd", OP_IX, 2, 0xec, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
958 { "lds", OP_IX, 2, 0xae, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
972 { "ldx", OP_IX, 2, 0xee, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
983 { "ldy", OP_IX | OP_PAGE3, 3, 0xee, 6, 6, CLR_V_CHG_NZ, cpu6811, 0 },
1007 { "lsl", OP_IX, 2, 0x68, 6, 6, CHG_NZVC, cpu6811, 0 },
1032 { "lsr", OP_IX, 2, 0x64, 6, 6, CLR_N_CHG_ZVC, cpu6811, 0 },
1185 { "neg", OP_IX, 2, 0x60, 6, 6, CHG_NZVC, cpu6811, 0 },
1213 { "oraa", OP_IX, 2, 0xaa, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
1224 { "orab", OP_IX, 2, 0xea, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
1276 { "rol", OP_IX, 2, 0x69, 6, 6, CHG_NZVC, cpu6811, 0 },
1301 { "ror", OP_IX, 2, 0x66, 6, 6, CHG_NZVC, cpu6811, 0 },
1334 { "sbca", OP_IX, 2, 0xa2, 4, 4, CHG_NZVC, cpu6811, 0 },
1345 { "sbcb", OP_IX, 2, 0xe2, 4, 4, CHG_NZVC, cpu6811, 0 },
1390 { "staa", OP_IX, 2, 0xa7, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
1402 { "stab", OP_IX, 2, 0xe7, 4, 4, CLR_V_CHG_NZ, cpu6811, 0 },
1414 { "std", OP_IX, 2, 0xed, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
1429 { "sts", OP_IX, 2, 0xaf, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
1441 { "stx", OP_IX, 2, 0xef, 5, 5, CLR_V_CHG_NZ, cpu6811, 0 },
1454 { "sty", OP_IX | OP_PAGE3, 3, 0xef, 6, 6, CLR_V_CHG_NZ, cpu6811, 0 },
1466 { "suba", OP_IX, 2, 0xa0, 4, 4, CHG_NZVC, cpu6811, 0 },
1477 { "subb", OP_IX, 2, 0xe0, 4, 4, CHG_NZVC, cpu6811, 0 },
1488 { "subd", OP_IX, 2, 0xa3, 6, 6, CHG_NZVC, cpu6811, 0 },
1544 { "tst", OP_IX, 2, 0x6d, 6, 6, CLR_VC_CHG_NZ, cpu6811, 0 },