Lines Matching refs:VA
735 #define VA UI7 + 1 macro
739 #define VB VA + 1
3142 {"vaddubm", VX (4, 0), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3143 {"vmul10cuq", VX (4, 1), VXVB_MASK, PPCVEC3, 0, {VD, VA}},
3144 {"vmaxub", VX (4, 2), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3145 {"vrlb", VX (4, 4), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3146 {"vcmpequb", VXR(4, 6,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3147 {"vcmpneb", VXR(4, 7,0), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},
3148 {"vmuloub", VX (4, 8), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3149 {"vaddfp", VX (4, 10), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3151 {"vmrghb", VX (4, 12), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3153 {"vpkuhum", VX (4, 14), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3170 {"vmhaddshs", VXA(4, 32), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},
3171 {"vmhraddshs", VXA(4, 33), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},
3172 {"vmladduhm", VXA(4, 34), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},
3173 {"vmsumudm", VXA(4, 35), VXA_MASK, PPCVEC3, 0, {VD, VA, VB, VC}},
3175 {"vmsumubm", VXA(4, 36), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},
3177 {"vmsummbm", VXA(4, 37), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},
3178 {"vmsumuhm", VXA(4, 38), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},
3179 {"vmsumuhs", VXA(4, 39), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},
3181 {"vmsumshm", VXA(4, 40), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},
3183 {"vmsumshs", VXA(4, 41), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},
3185 {"vsel", VXA(4, 42), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},
3187 {"vperm", VXA(4, 43), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},
3188 {"vsldoi", VXA(4, 44), VXASHB_MASK, PPCVEC, 0, {VD, VA, VB, SHB}},
3189 {"vpermxor", VXA(4, 45), VXA_MASK, PPCVEC2, 0, {VD, VA, VB, VC}},
3191 {"vmaddfp", VXA(4, 46), VXA_MASK, PPCVEC, 0, {VD, VA, VC, VB}},
3193 {"vnmsubfp", VXA(4, 47), VXA_MASK, PPCVEC, 0, {VD, VA, VC, VB}},
3207 {"vpermr", VXA(4, 59), VXA_MASK, PPCVEC3, 0, {VD, VA, VB, VC}},
3209 {"vaddeuqm", VXA(4, 60), VXA_MASK, PPCVEC2, 0, {VD, VA, VB, VC}},
3211 {"vaddecuq", VXA(4, 61), VXA_MASK, PPCVEC2, 0, {VD, VA, VB, VC}},
3213 {"vsubeuqm", VXA(4, 62), VXA_MASK, PPCVEC2, 0, {VD, VA, VB, VC}},
3215 {"vsubecuq", VXA(4, 63), VXA_MASK, PPCVEC2, 0, {VD, VA, VB, VC}},
3217 {"vadduhm", VX (4, 64), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3218 {"vmul10ecuq", VX (4, 65), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},
3219 {"vmaxuh", VX (4, 66), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3220 {"vrlh", VX (4, 68), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3221 {"vcmpequh", VXR(4, 70,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3222 {"vcmpneh", VXR(4, 71,0), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},
3223 {"vmulouh", VX (4, 72), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3224 {"vsubfp", VX (4, 74), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3226 {"vmrghh", VX (4, 76), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3228 {"vpkuwum", VX (4, 78), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3238 {"vadduwm", VX (4, 128), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3239 {"vmaxuw", VX (4, 130), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3240 {"vrlw", VX (4, 132), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3241 {"vrlwmi", VX (4, 133), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},
3242 {"vcmpequw", VXR(4, 134,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3243 {"vcmpnew", VXR(4, 135,0), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},
3244 {"vmulouw", VX (4, 136), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3245 {"vmuluwm", VX (4, 137), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3246 {"vmrghw", VX (4, 140), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3247 {"vpkuhus", VX (4, 142), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3253 {"vaddudm", VX (4, 192), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3254 {"vmaxud", VX (4, 194), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3255 {"vrld", VX (4, 196), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3256 {"vrldmi", VX (4, 197), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},
3257 {"vcmpeqfp", VXR(4, 198,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3258 {"vcmpequd", VXR(4, 199,0), VXR_MASK, PPCVEC2, 0, {VD, VA, VB}},
3259 {"vpkuwus", VX (4, 206), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3264 {"vadduqm", VX (4, 256), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3265 {"vmaxsb", VX (4, 258), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3266 {"vslb", VX (4, 260), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3267 {"vcmpnezb", VXR(4, 263,0), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},
3268 {"vmulosb", VX (4, 264), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3270 {"vmrglb", VX (4, 268), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3271 {"vpkshus", VX (4, 270), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3278 {"vaddcuq", VX (4, 320), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3279 {"vmaxsh", VX (4, 322), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3280 {"vslh", VX (4, 324), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3281 {"vcmpnezh", VXR(4, 327,0), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},
3282 {"vmulosh", VX (4, 328), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3284 {"vmrglh", VX (4, 332), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3285 {"vpkswus", VX (4, 334), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3292 {"vaddcuw", VX (4, 384), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3293 {"vmaxsw", VX (4, 386), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3294 {"vslw", VX (4, 388), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3295 {"vrlwnm", VX (4, 389), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},
3296 {"vcmpnezw", VXR(4, 391,0), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},
3297 {"vmulosw", VX (4, 392), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3299 {"vmrglw", VX (4, 396), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3300 {"vpkshss", VX (4, 398), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3303 {"vmaxsd", VX (4, 450), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3304 {"vsl", VX (4, 452), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3305 {"vrldnm", VX (4, 453), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},
3306 {"vcmpgefp", VXR(4, 454,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3308 {"vpkswss", VX (4, 462), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3314 {"vaddubs", VX (4, 512), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3315 {"vmul10uq", VX (4, 513), VXVB_MASK, PPCVEC3, 0, {VD, VA}},
3317 {"vminub", VX (4, 514), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3320 {"vsrb", VX (4, 516), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3323 {"vcmpgtub", VXR(4, 518,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3325 {"vmuleub", VX (4, 520), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3370 {"vadduhs", VX (4, 576), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3371 {"vmul10euq", VX (4, 577), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},
3372 {"vminuh", VX (4, 578), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3373 {"vsrh", VX (4, 580), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3374 {"vcmpgtuh", VXR(4, 582,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3375 {"vmuleuh", VX (4, 584), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3384 {"vadduws", VX (4, 640), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3386 {"vminuw", VX (4, 642), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3388 {"vsrw", VX (4, 644), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3391 {"vcmpgtuw", VXR(4, 646,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3392 {"vmuleuw", VX (4, 648), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3419 {"vminud", VX (4, 706), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3421 {"vsr", VX (4, 708), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3424 {"vcmpgtfp", VXR(4, 710,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3425 {"vcmpgtud", VXR(4, 711,0), VXR_MASK, PPCVEC2, 0, {VD, VA, VB}},
3479 {"vaddsbs", VX (4, 768), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3482 {"vminsb", VX (4, 770), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3485 {"vsrab", VX (4, 772), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3487 {"vcmpgtsb", VXR(4, 774,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3489 {"vmulesb", VX (4, 776), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3498 {"vpkpx", VX (4, 782), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3528 {"vaddshs", VX (4, 832), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3529 {"bcdcpsgn.", VX (4, 833), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},
3530 {"vminsh", VX (4, 834), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3531 {"vsrah", VX (4, 836), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3532 {"vcmpgtsh", VXR(4, 838,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3533 {"vmulesh", VX (4, 840), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3545 {"vaddsws", VX (4, 896), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3546 {"vminsw", VX (4, 898), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3547 {"vsraw", VX (4, 900), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3548 {"vcmpgtsw", VXR(4, 902,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3549 {"vmulesw", VX (4, 904), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3556 {"vminsd", VX (4, 962), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3557 {"vsrad", VX (4, 964), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3558 {"vcmpbfp", VXR(4, 966,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3559 {"vcmpgtsd", VXR(4, 967,0), VXR_MASK, PPCVEC2, 0, {VD, VA, VB}},
3568 {"vsububm", VX (4,1024), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3569 {"bcdadd.", VX (4,1025), VXPS_MASK, PPCVEC2, 0, {VD, VA, VB, PS}},
3570 {"vavgub", VX (4,1026), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3571 {"vabsdub", VX (4,1027), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3573 {"vand", VX (4,1028), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3574 {"vcmpequb.", VXR(4, 6,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3575 {"vcmpneb.", VXR(4, 7,1), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},
3579 {"vpmsumb", VX (4,1032), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3582 {"vmaxfp", VX (4,1034), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3585 {"vslo", VX (4,1036), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3600 {"vsubuhm", VX (4,1088), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3601 {"bcdsub.", VX (4,1089), VXPS_MASK, PPCVEC2, 0, {VD, VA, VB, PS}},
3602 {"vavguh", VX (4,1090), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3603 {"vabsduh", VX (4,1091), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3604 {"vandc", VX (4,1092), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3605 {"vcmpequh.", VXR(4, 70,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3608 {"vcmpneh.", VXR(4, 71,1), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},
3610 {"vpmsumh", VX (4,1096), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3612 {"vminfp", VX (4,1098), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3614 {"vsro", VX (4,1100), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3616 {"vpkudum", VX (4,1102), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3637 {"vsubuwm", VX (4,1152), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3638 {"bcdus.", VX (4,1153), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},
3639 {"vavguw", VX (4,1154), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3640 {"vabsduw", VX (4,1155), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3641 {"vmr", VX (4,1156), VX_MASK, PPCVEC, 0, {VD, VA, VBA}},
3642 {"vor", VX (4,1156), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3643 {"vcmpnew.", VXR(4, 135,1), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},
3644 {"vpmsumw", VX (4,1160), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3645 {"vcmpequw.", VXR(4, 134,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3652 {"vsubudm", VX (4,1216), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3654 {"bcds.", VX (4,1217), VXPS_MASK, PPCVEC3, 0, {VD, VA, VB, PS}},
3659 {"vxor", VX (4,1220), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3661 {"vcmpeqfp.", VXR(4, 198,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3663 {"vcmpequd.", VXR(4, 199,1), VXR_MASK, PPCVEC2, 0, {VD, VA, VB}},
3666 {"vpmsumd", VX (4,1224), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3671 {"vpkudus", VX (4,1230), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3678 {"vsubuqm", VX (4,1280), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3680 {"bcdtrunc.", VX (4,1281), VXPS_MASK, PPCVEC3, 0, {VD, VA, VB, PS}},
3682 {"vavgsb", VX (4,1282), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3685 {"vnot", VX (4,1284), VX_MASK, PPCVEC, 0, {VD, VA, VBA}},
3686 {"vnor", VX (4,1284), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3690 {"vcmpnezb.", VXR(4, 263,1), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},
3693 {"vcipher", VX (4,1288), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3694 {"vcipherlast", VX (4,1289), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3709 {"vsubcuq", VX (4,1344), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3711 {"bcdutrunc.", VX (4,1345), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},
3713 {"vavgsh", VX (4,1346), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3714 {"vorc", VX (4,1348), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3717 {"vcmpnezh.", VXR(4, 327,1), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},
3718 {"vncipher", VX (4,1352), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3720 {"vncipherlast",VX (4,1353), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3722 {"vbpermq", VX (4,1356), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3723 {"vpksdus", VX (4,1358), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3733 {"vsubcuw", VX (4,1408), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3742 {"vavgsw", VX (4,1410), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3744 {"vnand", VX (4,1412), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3749 {"vcmpnezw.", VXR(4, 391,1), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},
3766 {"bcdsr.", VX (4,1473), VXPS_MASK, PPCVEC3, 0, {VD, VA, VB, PS}},
3768 {"vsld", VX (4,1476), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3769 {"vcmpgefp.", VXR(4, 454,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3772 {"vsbox", VX (4,1480), VXVB_MASK, PPCVEC2, 0, {VD, VA}},
3775 {"vbpermd", VX (4,1484), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},
3776 {"vpksdss", VX (4,1486), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3785 {"vsububs", VX (4,1536), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3803 {"vcmpgtub.", VXR(4, 518,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3806 {"vsum4ubs", VX (4,1544), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3808 {"vsubuhs", VX (4,1600), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3810 {"vcmpgtuh.", VXR(4, 582,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3811 {"vsum4shs", VX (4,1608), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3816 {"vsubuws", VX (4,1664), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3817 {"vshasigmaw", VX (4,1666), VX_MASK, PPCVEC2, 0, {VD, VA, ST, SIX}},
3818 {"veqv", VX (4,1668), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3819 {"vcmpgtuw.", VXR(4, 646,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3822 {"vsum2sws", VX (4,1672), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3823 {"vmrgow", VX (4,1676), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3825 {"vshasigmad", VX (4,1730), VX_MASK, PPCVEC2, 0, {VD, VA, ST, SIX}},
3826 {"vsrd", VX (4,1732), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3827 {"vcmpgtfp.", VXR(4, 710,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3829 {"vcmpgtud.", VXR(4, 711,1), VXR_MASK, PPCVEC2, 0, {VD, VA, VB}},
3832 {"vsubsbs", VX (4,1792), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3835 {"vsrv", VX (4,1796), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},
3836 {"vcmpgtsb.", VXR(4, 774,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3839 {"vsum4sbs", VX (4,1800), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3843 {"vsubshs", VX (4,1856), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3846 {"vslv", VX (4,1860), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},
3847 {"vcmpgtsh.", VXR(4, 838,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3855 {"vsubsws", VX (4,1920), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3858 {"vcmpgtsw.", VXR(4, 902,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3861 {"vsumsws", VX (4,1928), VX_MASK, PPCVEC, 0, {VD, VA, VB}},
3862 {"vmrgew", VX (4,1932), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},
3868 {"vcmpbfp.", VXR(4, 966,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},
3870 {"vcmpgtsd.", VXR(4, 967,1), VXR_MASK, PPCVEC2, 0, {VD, VA, VB}},
6735 {"xsaddqp", XRC(63,4,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6736 {"xsaddqpo", XRC(63,4,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6821 {"xsmulqp", XRC(63,36,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6822 {"xsmulqpo", XRC(63,36,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6852 {"xscpsgnqp", X(63,100), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6858 {"xscmpoqp", X(63,132), XBF_MASK, PPCVSX3, PPCVLE, {BF, VA, VB}},
6877 {"xscmpexpqp", X(63,164), XBF_MASK, PPCVSX3, PPCVLE, {BF, VA, VB}},
6900 {"xsmaddqp", XRC(63,388,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6901 {"xsmaddqpo", XRC(63,388,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6906 {"xsmsubqp", XRC(63,420,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6907 {"xsmsubqpo", XRC(63,420,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6912 {"xsnmaddqp", XRC(63,452,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6913 {"xsnmaddqpo", XRC(63,452,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6918 {"xsnmsubqp", XRC(63,484,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6919 {"xsnmsubqpo", XRC(63,484,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6927 {"xssubqp", XRC(63,516,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6928 {"xssubqpo", XRC(63,516,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6933 {"xsdivqp", XRC(63,548,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6934 {"xsdivqpo", XRC(63,548,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},
6948 {"xscmpuqp", X(63,644), XBF_MASK, PPCVSX3, PPCVLE, {BF, VA, VB}},
7007 {"xsiexpqp", X(63,868), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},