1 /*
2 * Copyright (C) 2016 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #include "assembler_mips.h"
18
19 #include <map>
20
21 #include "base/stl_util.h"
22 #include "utils/assembler_test.h"
23
24 #define __ GetAssembler()->
25
26 namespace art {
27
28 struct MIPSCpuRegisterCompare {
operator ()art::MIPSCpuRegisterCompare29 bool operator()(const mips::Register& a, const mips::Register& b) const {
30 return a < b;
31 }
32 };
33
34 class AssemblerMIPS32r6Test : public AssemblerTest<mips::MipsAssembler,
35 mips::MipsLabel,
36 mips::Register,
37 mips::FRegister,
38 uint32_t,
39 mips::VectorRegister> {
40 public:
41 typedef AssemblerTest<mips::MipsAssembler,
42 mips::MipsLabel,
43 mips::Register,
44 mips::FRegister,
45 uint32_t,
46 mips::VectorRegister> Base;
47
AssemblerMIPS32r6Test()48 AssemblerMIPS32r6Test() :
49 instruction_set_features_(MipsInstructionSetFeatures::FromVariant("mips32r6", nullptr)) {
50 }
51
52 protected:
53 // Get the typically used name for this architecture, e.g., aarch64, x86-64, ...
GetArchitectureString()54 std::string GetArchitectureString() OVERRIDE {
55 return "mips";
56 }
57
GetAssemblerCmdName()58 std::string GetAssemblerCmdName() OVERRIDE {
59 // We assemble and link for MIPS32R6. See GetAssemblerParameters() for details.
60 return "gcc";
61 }
62
GetAssemblerParameters()63 std::string GetAssemblerParameters() OVERRIDE {
64 // We assemble and link for MIPS32R6. The reason is that object files produced for MIPS32R6
65 // (and MIPS64R6) with the GNU assembler don't have correct final offsets in PC-relative
66 // branches in the .text section and so they require a relocation pass (there's a relocation
67 // section, .rela.text, that has the needed info to fix up the branches).
68 // We use "-modd-spreg" so we can use odd-numbered single precision FPU registers.
69 // We put the code at address 0x1000000 (instead of 0) to avoid overlapping with the
70 // .MIPS.abiflags section (there doesn't seem to be a way to suppress its generation easily).
71 return " -march=mips32r6 -mmsa -modd-spreg -Wa,--no-warn"
72 " -Wl,-Ttext=0x1000000 -Wl,-e0x1000000 -nostdlib";
73 }
74
Pad(std::vector<uint8_t> & data)75 void Pad(std::vector<uint8_t>& data) OVERRIDE {
76 // The GNU linker unconditionally pads the code segment with NOPs to a size that is a multiple
77 // of 16 and there doesn't appear to be a way to suppress this padding. Our assembler doesn't
78 // pad, so, in order for two assembler outputs to match, we need to match the padding as well.
79 // NOP is encoded as four zero bytes on MIPS.
80 size_t pad_size = RoundUp(data.size(), 16u) - data.size();
81 data.insert(data.end(), pad_size, 0);
82 }
83
GetDisassembleParameters()84 std::string GetDisassembleParameters() OVERRIDE {
85 return " -D -bbinary -mmips:isa32r6";
86 }
87
CreateAssembler(ArenaAllocator * allocator)88 mips::MipsAssembler* CreateAssembler(ArenaAllocator* allocator) OVERRIDE {
89 return new (allocator) mips::MipsAssembler(allocator, instruction_set_features_.get());
90 }
91
SetUpHelpers()92 void SetUpHelpers() OVERRIDE {
93 if (registers_.size() == 0) {
94 registers_.push_back(new mips::Register(mips::ZERO));
95 registers_.push_back(new mips::Register(mips::AT));
96 registers_.push_back(new mips::Register(mips::V0));
97 registers_.push_back(new mips::Register(mips::V1));
98 registers_.push_back(new mips::Register(mips::A0));
99 registers_.push_back(new mips::Register(mips::A1));
100 registers_.push_back(new mips::Register(mips::A2));
101 registers_.push_back(new mips::Register(mips::A3));
102 registers_.push_back(new mips::Register(mips::T0));
103 registers_.push_back(new mips::Register(mips::T1));
104 registers_.push_back(new mips::Register(mips::T2));
105 registers_.push_back(new mips::Register(mips::T3));
106 registers_.push_back(new mips::Register(mips::T4));
107 registers_.push_back(new mips::Register(mips::T5));
108 registers_.push_back(new mips::Register(mips::T6));
109 registers_.push_back(new mips::Register(mips::T7));
110 registers_.push_back(new mips::Register(mips::S0));
111 registers_.push_back(new mips::Register(mips::S1));
112 registers_.push_back(new mips::Register(mips::S2));
113 registers_.push_back(new mips::Register(mips::S3));
114 registers_.push_back(new mips::Register(mips::S4));
115 registers_.push_back(new mips::Register(mips::S5));
116 registers_.push_back(new mips::Register(mips::S6));
117 registers_.push_back(new mips::Register(mips::S7));
118 registers_.push_back(new mips::Register(mips::T8));
119 registers_.push_back(new mips::Register(mips::T9));
120 registers_.push_back(new mips::Register(mips::K0));
121 registers_.push_back(new mips::Register(mips::K1));
122 registers_.push_back(new mips::Register(mips::GP));
123 registers_.push_back(new mips::Register(mips::SP));
124 registers_.push_back(new mips::Register(mips::FP));
125 registers_.push_back(new mips::Register(mips::RA));
126
127 secondary_register_names_.emplace(mips::Register(mips::ZERO), "zero");
128 secondary_register_names_.emplace(mips::Register(mips::AT), "at");
129 secondary_register_names_.emplace(mips::Register(mips::V0), "v0");
130 secondary_register_names_.emplace(mips::Register(mips::V1), "v1");
131 secondary_register_names_.emplace(mips::Register(mips::A0), "a0");
132 secondary_register_names_.emplace(mips::Register(mips::A1), "a1");
133 secondary_register_names_.emplace(mips::Register(mips::A2), "a2");
134 secondary_register_names_.emplace(mips::Register(mips::A3), "a3");
135 secondary_register_names_.emplace(mips::Register(mips::T0), "t0");
136 secondary_register_names_.emplace(mips::Register(mips::T1), "t1");
137 secondary_register_names_.emplace(mips::Register(mips::T2), "t2");
138 secondary_register_names_.emplace(mips::Register(mips::T3), "t3");
139 secondary_register_names_.emplace(mips::Register(mips::T4), "t4");
140 secondary_register_names_.emplace(mips::Register(mips::T5), "t5");
141 secondary_register_names_.emplace(mips::Register(mips::T6), "t6");
142 secondary_register_names_.emplace(mips::Register(mips::T7), "t7");
143 secondary_register_names_.emplace(mips::Register(mips::S0), "s0");
144 secondary_register_names_.emplace(mips::Register(mips::S1), "s1");
145 secondary_register_names_.emplace(mips::Register(mips::S2), "s2");
146 secondary_register_names_.emplace(mips::Register(mips::S3), "s3");
147 secondary_register_names_.emplace(mips::Register(mips::S4), "s4");
148 secondary_register_names_.emplace(mips::Register(mips::S5), "s5");
149 secondary_register_names_.emplace(mips::Register(mips::S6), "s6");
150 secondary_register_names_.emplace(mips::Register(mips::S7), "s7");
151 secondary_register_names_.emplace(mips::Register(mips::T8), "t8");
152 secondary_register_names_.emplace(mips::Register(mips::T9), "t9");
153 secondary_register_names_.emplace(mips::Register(mips::K0), "k0");
154 secondary_register_names_.emplace(mips::Register(mips::K1), "k1");
155 secondary_register_names_.emplace(mips::Register(mips::GP), "gp");
156 secondary_register_names_.emplace(mips::Register(mips::SP), "sp");
157 secondary_register_names_.emplace(mips::Register(mips::FP), "fp");
158 secondary_register_names_.emplace(mips::Register(mips::RA), "ra");
159
160 fp_registers_.push_back(new mips::FRegister(mips::F0));
161 fp_registers_.push_back(new mips::FRegister(mips::F1));
162 fp_registers_.push_back(new mips::FRegister(mips::F2));
163 fp_registers_.push_back(new mips::FRegister(mips::F3));
164 fp_registers_.push_back(new mips::FRegister(mips::F4));
165 fp_registers_.push_back(new mips::FRegister(mips::F5));
166 fp_registers_.push_back(new mips::FRegister(mips::F6));
167 fp_registers_.push_back(new mips::FRegister(mips::F7));
168 fp_registers_.push_back(new mips::FRegister(mips::F8));
169 fp_registers_.push_back(new mips::FRegister(mips::F9));
170 fp_registers_.push_back(new mips::FRegister(mips::F10));
171 fp_registers_.push_back(new mips::FRegister(mips::F11));
172 fp_registers_.push_back(new mips::FRegister(mips::F12));
173 fp_registers_.push_back(new mips::FRegister(mips::F13));
174 fp_registers_.push_back(new mips::FRegister(mips::F14));
175 fp_registers_.push_back(new mips::FRegister(mips::F15));
176 fp_registers_.push_back(new mips::FRegister(mips::F16));
177 fp_registers_.push_back(new mips::FRegister(mips::F17));
178 fp_registers_.push_back(new mips::FRegister(mips::F18));
179 fp_registers_.push_back(new mips::FRegister(mips::F19));
180 fp_registers_.push_back(new mips::FRegister(mips::F20));
181 fp_registers_.push_back(new mips::FRegister(mips::F21));
182 fp_registers_.push_back(new mips::FRegister(mips::F22));
183 fp_registers_.push_back(new mips::FRegister(mips::F23));
184 fp_registers_.push_back(new mips::FRegister(mips::F24));
185 fp_registers_.push_back(new mips::FRegister(mips::F25));
186 fp_registers_.push_back(new mips::FRegister(mips::F26));
187 fp_registers_.push_back(new mips::FRegister(mips::F27));
188 fp_registers_.push_back(new mips::FRegister(mips::F28));
189 fp_registers_.push_back(new mips::FRegister(mips::F29));
190 fp_registers_.push_back(new mips::FRegister(mips::F30));
191 fp_registers_.push_back(new mips::FRegister(mips::F31));
192
193 vec_registers_.push_back(new mips::VectorRegister(mips::W0));
194 vec_registers_.push_back(new mips::VectorRegister(mips::W1));
195 vec_registers_.push_back(new mips::VectorRegister(mips::W2));
196 vec_registers_.push_back(new mips::VectorRegister(mips::W3));
197 vec_registers_.push_back(new mips::VectorRegister(mips::W4));
198 vec_registers_.push_back(new mips::VectorRegister(mips::W5));
199 vec_registers_.push_back(new mips::VectorRegister(mips::W6));
200 vec_registers_.push_back(new mips::VectorRegister(mips::W7));
201 vec_registers_.push_back(new mips::VectorRegister(mips::W8));
202 vec_registers_.push_back(new mips::VectorRegister(mips::W9));
203 vec_registers_.push_back(new mips::VectorRegister(mips::W10));
204 vec_registers_.push_back(new mips::VectorRegister(mips::W11));
205 vec_registers_.push_back(new mips::VectorRegister(mips::W12));
206 vec_registers_.push_back(new mips::VectorRegister(mips::W13));
207 vec_registers_.push_back(new mips::VectorRegister(mips::W14));
208 vec_registers_.push_back(new mips::VectorRegister(mips::W15));
209 vec_registers_.push_back(new mips::VectorRegister(mips::W16));
210 vec_registers_.push_back(new mips::VectorRegister(mips::W17));
211 vec_registers_.push_back(new mips::VectorRegister(mips::W18));
212 vec_registers_.push_back(new mips::VectorRegister(mips::W19));
213 vec_registers_.push_back(new mips::VectorRegister(mips::W20));
214 vec_registers_.push_back(new mips::VectorRegister(mips::W21));
215 vec_registers_.push_back(new mips::VectorRegister(mips::W22));
216 vec_registers_.push_back(new mips::VectorRegister(mips::W23));
217 vec_registers_.push_back(new mips::VectorRegister(mips::W24));
218 vec_registers_.push_back(new mips::VectorRegister(mips::W25));
219 vec_registers_.push_back(new mips::VectorRegister(mips::W26));
220 vec_registers_.push_back(new mips::VectorRegister(mips::W27));
221 vec_registers_.push_back(new mips::VectorRegister(mips::W28));
222 vec_registers_.push_back(new mips::VectorRegister(mips::W29));
223 vec_registers_.push_back(new mips::VectorRegister(mips::W30));
224 vec_registers_.push_back(new mips::VectorRegister(mips::W31));
225 }
226 }
227
TearDown()228 void TearDown() OVERRIDE {
229 AssemblerTest::TearDown();
230 STLDeleteElements(®isters_);
231 STLDeleteElements(&fp_registers_);
232 STLDeleteElements(&vec_registers_);
233 }
234
GetAddresses()235 std::vector<mips::MipsLabel> GetAddresses() {
236 UNIMPLEMENTED(FATAL) << "Feature not implemented yet";
237 UNREACHABLE();
238 }
239
GetRegisters()240 std::vector<mips::Register*> GetRegisters() OVERRIDE {
241 return registers_;
242 }
243
GetFPRegisters()244 std::vector<mips::FRegister*> GetFPRegisters() OVERRIDE {
245 return fp_registers_;
246 }
247
GetVectorRegisters()248 std::vector<mips::VectorRegister*> GetVectorRegisters() OVERRIDE {
249 return vec_registers_;
250 }
251
CreateImmediate(int64_t imm_value)252 uint32_t CreateImmediate(int64_t imm_value) OVERRIDE {
253 return imm_value;
254 }
255
GetSecondaryRegisterName(const mips::Register & reg)256 std::string GetSecondaryRegisterName(const mips::Register& reg) OVERRIDE {
257 CHECK(secondary_register_names_.find(reg) != secondary_register_names_.end());
258 return secondary_register_names_[reg];
259 }
260
RepeatInsn(size_t count,const std::string & insn)261 std::string RepeatInsn(size_t count, const std::string& insn) {
262 std::string result;
263 for (; count != 0u; --count) {
264 result += insn;
265 }
266 return result;
267 }
268
BranchHelper(void (mips::MipsAssembler::* f)(mips::MipsLabel *,bool),const std::string & instr_name,bool has_slot,bool is_bare=false)269 void BranchHelper(void (mips::MipsAssembler::*f)(mips::MipsLabel*,
270 bool),
271 const std::string& instr_name,
272 bool has_slot,
273 bool is_bare = false) {
274 __ SetReorder(false);
275 mips::MipsLabel label1, label2;
276 (Base::GetAssembler()->*f)(&label1, is_bare);
277 constexpr size_t kAdduCount1 = 63;
278 for (size_t i = 0; i != kAdduCount1; ++i) {
279 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
280 }
281 __ Bind(&label1);
282 (Base::GetAssembler()->*f)(&label2, is_bare);
283 constexpr size_t kAdduCount2 = 64;
284 for (size_t i = 0; i != kAdduCount2; ++i) {
285 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
286 }
287 __ Bind(&label2);
288 (Base::GetAssembler()->*f)(&label1, is_bare);
289 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
290
291 std::string expected =
292 ".set noreorder\n" +
293 instr_name + " 1f\n" +
294 ((is_bare || !has_slot) ? "" : "nop\n") +
295 RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
296 "1:\n" +
297 instr_name + " 2f\n" +
298 ((is_bare || !has_slot) ? "" : "nop\n") +
299 RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
300 "2:\n" +
301 instr_name + " 1b\n" +
302 ((is_bare || !has_slot) ? "" : "nop\n") +
303 "addu $zero, $zero, $zero\n";
304 DriverStr(expected, instr_name);
305 }
306
BranchCondOneRegHelper(void (mips::MipsAssembler::* f)(mips::Register,mips::MipsLabel *,bool),const std::string & instr_name,bool is_bare=false)307 void BranchCondOneRegHelper(void (mips::MipsAssembler::*f)(mips::Register,
308 mips::MipsLabel*,
309 bool),
310 const std::string& instr_name,
311 bool is_bare = false) {
312 __ SetReorder(false);
313 mips::MipsLabel label;
314 (Base::GetAssembler()->*f)(mips::A0, &label, is_bare);
315 constexpr size_t kAdduCount1 = 63;
316 for (size_t i = 0; i != kAdduCount1; ++i) {
317 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
318 }
319 __ Bind(&label);
320 constexpr size_t kAdduCount2 = 64;
321 for (size_t i = 0; i != kAdduCount2; ++i) {
322 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
323 }
324 (Base::GetAssembler()->*f)(mips::A1, &label, is_bare);
325 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
326
327 std::string expected =
328 ".set noreorder\n" +
329 instr_name + " $a0, 1f\n" +
330 (is_bare ? "" : "nop\n") +
331 RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
332 "1:\n" +
333 RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
334 instr_name + " $a1, 1b\n" +
335 (is_bare ? "" : "nop\n") +
336 "addu $zero, $zero, $zero\n";
337 DriverStr(expected, instr_name);
338 }
339
BranchCondTwoRegsHelper(void (mips::MipsAssembler::* f)(mips::Register,mips::Register,mips::MipsLabel *,bool),const std::string & instr_name,bool is_bare=false)340 void BranchCondTwoRegsHelper(void (mips::MipsAssembler::*f)(mips::Register,
341 mips::Register,
342 mips::MipsLabel*,
343 bool),
344 const std::string& instr_name,
345 bool is_bare = false) {
346 __ SetReorder(false);
347 mips::MipsLabel label;
348 (Base::GetAssembler()->*f)(mips::A0, mips::A1, &label, is_bare);
349 constexpr size_t kAdduCount1 = 63;
350 for (size_t i = 0; i != kAdduCount1; ++i) {
351 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
352 }
353 __ Bind(&label);
354 constexpr size_t kAdduCount2 = 64;
355 for (size_t i = 0; i != kAdduCount2; ++i) {
356 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
357 }
358 (Base::GetAssembler()->*f)(mips::A2, mips::A3, &label, is_bare);
359 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
360
361 std::string expected =
362 ".set noreorder\n" +
363 instr_name + " $a0, $a1, 1f\n" +
364 (is_bare ? "" : "nop\n") +
365 RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
366 "1:\n" +
367 RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
368 instr_name + " $a2, $a3, 1b\n" +
369 (is_bare ? "" : "nop\n") +
370 "addu $zero, $zero, $zero\n";
371 DriverStr(expected, instr_name);
372 }
373
BranchFpuCondHelper(void (mips::MipsAssembler::* f)(mips::FRegister,mips::MipsLabel *,bool),const std::string & instr_name,bool is_bare=false)374 void BranchFpuCondHelper(void (mips::MipsAssembler::*f)(mips::FRegister,
375 mips::MipsLabel*,
376 bool),
377 const std::string& instr_name,
378 bool is_bare = false) {
379 __ SetReorder(false);
380 mips::MipsLabel label;
381 (Base::GetAssembler()->*f)(mips::F0, &label, is_bare);
382 constexpr size_t kAdduCount1 = 63;
383 for (size_t i = 0; i != kAdduCount1; ++i) {
384 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
385 }
386 __ Bind(&label);
387 constexpr size_t kAdduCount2 = 64;
388 for (size_t i = 0; i != kAdduCount2; ++i) {
389 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
390 }
391 (Base::GetAssembler()->*f)(mips::F30, &label, is_bare);
392 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
393
394 std::string expected =
395 ".set noreorder\n" +
396 instr_name + " $f0, 1f\n" +
397 (is_bare ? "" : "nop\n") +
398 RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
399 "1:\n" +
400 RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
401 instr_name + " $f30, 1b\n" +
402 (is_bare ? "" : "nop\n") +
403 "addu $zero, $zero, $zero\n";
404 DriverStr(expected, instr_name);
405 }
406
407 private:
408 std::vector<mips::Register*> registers_;
409 std::map<mips::Register, std::string, MIPSCpuRegisterCompare> secondary_register_names_;
410
411 std::vector<mips::FRegister*> fp_registers_;
412 std::vector<mips::VectorRegister*> vec_registers_;
413 std::unique_ptr<const MipsInstructionSetFeatures> instruction_set_features_;
414 };
415
416
TEST_F(AssemblerMIPS32r6Test,Toolchain)417 TEST_F(AssemblerMIPS32r6Test, Toolchain) {
418 EXPECT_TRUE(CheckTools());
419 }
420
TEST_F(AssemblerMIPS32r6Test,MulR6)421 TEST_F(AssemblerMIPS32r6Test, MulR6) {
422 DriverStr(RepeatRRR(&mips::MipsAssembler::MulR6, "mul ${reg1}, ${reg2}, ${reg3}"), "MulR6");
423 }
424
TEST_F(AssemblerMIPS32r6Test,MuhR6)425 TEST_F(AssemblerMIPS32r6Test, MuhR6) {
426 DriverStr(RepeatRRR(&mips::MipsAssembler::MuhR6, "muh ${reg1}, ${reg2}, ${reg3}"), "MuhR6");
427 }
428
TEST_F(AssemblerMIPS32r6Test,MuhuR6)429 TEST_F(AssemblerMIPS32r6Test, MuhuR6) {
430 DriverStr(RepeatRRR(&mips::MipsAssembler::MuhuR6, "muhu ${reg1}, ${reg2}, ${reg3}"), "MuhuR6");
431 }
432
TEST_F(AssemblerMIPS32r6Test,DivR6)433 TEST_F(AssemblerMIPS32r6Test, DivR6) {
434 DriverStr(RepeatRRR(&mips::MipsAssembler::DivR6, "div ${reg1}, ${reg2}, ${reg3}"), "DivR6");
435 }
436
TEST_F(AssemblerMIPS32r6Test,ModR6)437 TEST_F(AssemblerMIPS32r6Test, ModR6) {
438 DriverStr(RepeatRRR(&mips::MipsAssembler::ModR6, "mod ${reg1}, ${reg2}, ${reg3}"), "ModR6");
439 }
440
TEST_F(AssemblerMIPS32r6Test,DivuR6)441 TEST_F(AssemblerMIPS32r6Test, DivuR6) {
442 DriverStr(RepeatRRR(&mips::MipsAssembler::DivuR6, "divu ${reg1}, ${reg2}, ${reg3}"), "DivuR6");
443 }
444
TEST_F(AssemblerMIPS32r6Test,ModuR6)445 TEST_F(AssemblerMIPS32r6Test, ModuR6) {
446 DriverStr(RepeatRRR(&mips::MipsAssembler::ModuR6, "modu ${reg1}, ${reg2}, ${reg3}"), "ModuR6");
447 }
448
449 //////////
450 // MISC //
451 //////////
452
TEST_F(AssemblerMIPS32r6Test,Aui)453 TEST_F(AssemblerMIPS32r6Test, Aui) {
454 DriverStr(RepeatRRIb(&mips::MipsAssembler::Aui, 16, "aui ${reg1}, ${reg2}, {imm}"), "Aui");
455 }
456
TEST_F(AssemblerMIPS32r6Test,Auipc)457 TEST_F(AssemblerMIPS32r6Test, Auipc) {
458 DriverStr(RepeatRIb(&mips::MipsAssembler::Auipc, 16, "auipc ${reg}, {imm}"), "Auipc");
459 }
460
TEST_F(AssemblerMIPS32r6Test,Lwpc)461 TEST_F(AssemblerMIPS32r6Test, Lwpc) {
462 // Lwpc() takes an unsigned 19-bit immediate, while the GNU assembler needs a signed offset,
463 // hence the sign extension from bit 18 with `imm - ((imm & 0x40000) << 1)`.
464 // The GNU assembler also wants the offset to be a multiple of 4, which it will shift right
465 // by 2 positions when encoding, hence `<< 2` to compensate for that shift.
466 // We capture the value of the immediate with `.set imm, {imm}` because the value is needed
467 // twice for the sign extension, but `{imm}` is substituted only once.
468 const char* code = ".set imm, {imm}\nlw ${reg}, ((imm - ((imm & 0x40000) << 1)) << 2)($pc)";
469 DriverStr(RepeatRIb(&mips::MipsAssembler::Lwpc, 19, code), "Lwpc");
470 }
471
TEST_F(AssemblerMIPS32r6Test,Addiupc)472 TEST_F(AssemblerMIPS32r6Test, Addiupc) {
473 // The comment from the Lwpc() test applies to this Addiupc() test as well.
474 const char* code = ".set imm, {imm}\naddiupc ${reg}, (imm - ((imm & 0x40000) << 1)) << 2";
475 DriverStr(RepeatRIb(&mips::MipsAssembler::Addiupc, 19, code), "Addiupc");
476 }
477
TEST_F(AssemblerMIPS32r6Test,Bitswap)478 TEST_F(AssemblerMIPS32r6Test, Bitswap) {
479 DriverStr(RepeatRR(&mips::MipsAssembler::Bitswap, "bitswap ${reg1}, ${reg2}"), "bitswap");
480 }
481
TEST_F(AssemblerMIPS32r6Test,Lsa)482 TEST_F(AssemblerMIPS32r6Test, Lsa) {
483 DriverStr(RepeatRRRIb(&mips::MipsAssembler::Lsa,
484 2,
485 "lsa ${reg1}, ${reg2}, ${reg3}, {imm}",
486 1),
487 "lsa");
488 }
489
TEST_F(AssemblerMIPS32r6Test,Seleqz)490 TEST_F(AssemblerMIPS32r6Test, Seleqz) {
491 DriverStr(RepeatRRR(&mips::MipsAssembler::Seleqz, "seleqz ${reg1}, ${reg2}, ${reg3}"), "seleqz");
492 }
493
TEST_F(AssemblerMIPS32r6Test,Selnez)494 TEST_F(AssemblerMIPS32r6Test, Selnez) {
495 DriverStr(RepeatRRR(&mips::MipsAssembler::Selnez, "selnez ${reg1}, ${reg2}, ${reg3}"), "selnez");
496 }
497
TEST_F(AssemblerMIPS32r6Test,ClzR6)498 TEST_F(AssemblerMIPS32r6Test, ClzR6) {
499 DriverStr(RepeatRR(&mips::MipsAssembler::ClzR6, "clz ${reg1}, ${reg2}"), "clzR6");
500 }
501
TEST_F(AssemblerMIPS32r6Test,CloR6)502 TEST_F(AssemblerMIPS32r6Test, CloR6) {
503 DriverStr(RepeatRR(&mips::MipsAssembler::CloR6, "clo ${reg1}, ${reg2}"), "cloR6");
504 }
505
506 ////////////////////
507 // FLOATING POINT //
508 ////////////////////
509
TEST_F(AssemblerMIPS32r6Test,SelS)510 TEST_F(AssemblerMIPS32r6Test, SelS) {
511 DriverStr(RepeatFFF(&mips::MipsAssembler::SelS, "sel.s ${reg1}, ${reg2}, ${reg3}"), "sel.s");
512 }
513
TEST_F(AssemblerMIPS32r6Test,SelD)514 TEST_F(AssemblerMIPS32r6Test, SelD) {
515 DriverStr(RepeatFFF(&mips::MipsAssembler::SelD, "sel.d ${reg1}, ${reg2}, ${reg3}"), "sel.d");
516 }
517
TEST_F(AssemblerMIPS32r6Test,SeleqzS)518 TEST_F(AssemblerMIPS32r6Test, SeleqzS) {
519 DriverStr(RepeatFFF(&mips::MipsAssembler::SeleqzS, "seleqz.s ${reg1}, ${reg2}, ${reg3}"),
520 "seleqz.s");
521 }
522
TEST_F(AssemblerMIPS32r6Test,SeleqzD)523 TEST_F(AssemblerMIPS32r6Test, SeleqzD) {
524 DriverStr(RepeatFFF(&mips::MipsAssembler::SeleqzD, "seleqz.d ${reg1}, ${reg2}, ${reg3}"),
525 "seleqz.d");
526 }
527
TEST_F(AssemblerMIPS32r6Test,SelnezS)528 TEST_F(AssemblerMIPS32r6Test, SelnezS) {
529 DriverStr(RepeatFFF(&mips::MipsAssembler::SelnezS, "selnez.s ${reg1}, ${reg2}, ${reg3}"),
530 "selnez.s");
531 }
532
TEST_F(AssemblerMIPS32r6Test,SelnezD)533 TEST_F(AssemblerMIPS32r6Test, SelnezD) {
534 DriverStr(RepeatFFF(&mips::MipsAssembler::SelnezD, "selnez.d ${reg1}, ${reg2}, ${reg3}"),
535 "selnez.d");
536 }
537
TEST_F(AssemblerMIPS32r6Test,ClassS)538 TEST_F(AssemblerMIPS32r6Test, ClassS) {
539 DriverStr(RepeatFF(&mips::MipsAssembler::ClassS, "class.s ${reg1}, ${reg2}"), "class.s");
540 }
541
TEST_F(AssemblerMIPS32r6Test,ClassD)542 TEST_F(AssemblerMIPS32r6Test, ClassD) {
543 DriverStr(RepeatFF(&mips::MipsAssembler::ClassD, "class.d ${reg1}, ${reg2}"), "class.d");
544 }
545
TEST_F(AssemblerMIPS32r6Test,MinS)546 TEST_F(AssemblerMIPS32r6Test, MinS) {
547 DriverStr(RepeatFFF(&mips::MipsAssembler::MinS, "min.s ${reg1}, ${reg2}, ${reg3}"), "min.s");
548 }
549
TEST_F(AssemblerMIPS32r6Test,MinD)550 TEST_F(AssemblerMIPS32r6Test, MinD) {
551 DriverStr(RepeatFFF(&mips::MipsAssembler::MinD, "min.d ${reg1}, ${reg2}, ${reg3}"), "min.d");
552 }
553
TEST_F(AssemblerMIPS32r6Test,MaxS)554 TEST_F(AssemblerMIPS32r6Test, MaxS) {
555 DriverStr(RepeatFFF(&mips::MipsAssembler::MaxS, "max.s ${reg1}, ${reg2}, ${reg3}"), "max.s");
556 }
557
TEST_F(AssemblerMIPS32r6Test,MaxD)558 TEST_F(AssemblerMIPS32r6Test, MaxD) {
559 DriverStr(RepeatFFF(&mips::MipsAssembler::MaxD, "max.d ${reg1}, ${reg2}, ${reg3}"), "max.d");
560 }
561
TEST_F(AssemblerMIPS32r6Test,CmpUnS)562 TEST_F(AssemblerMIPS32r6Test, CmpUnS) {
563 DriverStr(RepeatFFF(&mips::MipsAssembler::CmpUnS, "cmp.un.s ${reg1}, ${reg2}, ${reg3}"),
564 "cmp.un.s");
565 }
566
TEST_F(AssemblerMIPS32r6Test,CmpEqS)567 TEST_F(AssemblerMIPS32r6Test, CmpEqS) {
568 DriverStr(RepeatFFF(&mips::MipsAssembler::CmpEqS, "cmp.eq.s ${reg1}, ${reg2}, ${reg3}"),
569 "cmp.eq.s");
570 }
571
TEST_F(AssemblerMIPS32r6Test,CmpUeqS)572 TEST_F(AssemblerMIPS32r6Test, CmpUeqS) {
573 DriverStr(RepeatFFF(&mips::MipsAssembler::CmpUeqS, "cmp.ueq.s ${reg1}, ${reg2}, ${reg3}"),
574 "cmp.ueq.s");
575 }
576
TEST_F(AssemblerMIPS32r6Test,CmpLtS)577 TEST_F(AssemblerMIPS32r6Test, CmpLtS) {
578 DriverStr(RepeatFFF(&mips::MipsAssembler::CmpLtS, "cmp.lt.s ${reg1}, ${reg2}, ${reg3}"),
579 "cmp.lt.s");
580 }
581
TEST_F(AssemblerMIPS32r6Test,CmpUltS)582 TEST_F(AssemblerMIPS32r6Test, CmpUltS) {
583 DriverStr(RepeatFFF(&mips::MipsAssembler::CmpUltS, "cmp.ult.s ${reg1}, ${reg2}, ${reg3}"),
584 "cmp.ult.s");
585 }
586
TEST_F(AssemblerMIPS32r6Test,CmpLeS)587 TEST_F(AssemblerMIPS32r6Test, CmpLeS) {
588 DriverStr(RepeatFFF(&mips::MipsAssembler::CmpLeS, "cmp.le.s ${reg1}, ${reg2}, ${reg3}"),
589 "cmp.le.s");
590 }
591
TEST_F(AssemblerMIPS32r6Test,CmpUleS)592 TEST_F(AssemblerMIPS32r6Test, CmpUleS) {
593 DriverStr(RepeatFFF(&mips::MipsAssembler::CmpUleS, "cmp.ule.s ${reg1}, ${reg2}, ${reg3}"),
594 "cmp.ule.s");
595 }
596
TEST_F(AssemblerMIPS32r6Test,CmpOrS)597 TEST_F(AssemblerMIPS32r6Test, CmpOrS) {
598 DriverStr(RepeatFFF(&mips::MipsAssembler::CmpOrS, "cmp.or.s ${reg1}, ${reg2}, ${reg3}"),
599 "cmp.or.s");
600 }
601
TEST_F(AssemblerMIPS32r6Test,CmpUneS)602 TEST_F(AssemblerMIPS32r6Test, CmpUneS) {
603 DriverStr(RepeatFFF(&mips::MipsAssembler::CmpUneS, "cmp.une.s ${reg1}, ${reg2}, ${reg3}"),
604 "cmp.une.s");
605 }
606
TEST_F(AssemblerMIPS32r6Test,CmpNeS)607 TEST_F(AssemblerMIPS32r6Test, CmpNeS) {
608 DriverStr(RepeatFFF(&mips::MipsAssembler::CmpNeS, "cmp.ne.s ${reg1}, ${reg2}, ${reg3}"),
609 "cmp.ne.s");
610 }
611
TEST_F(AssemblerMIPS32r6Test,CmpUnD)612 TEST_F(AssemblerMIPS32r6Test, CmpUnD) {
613 DriverStr(RepeatFFF(&mips::MipsAssembler::CmpUnD, "cmp.un.d ${reg1}, ${reg2}, ${reg3}"),
614 "cmp.un.d");
615 }
616
TEST_F(AssemblerMIPS32r6Test,CmpEqD)617 TEST_F(AssemblerMIPS32r6Test, CmpEqD) {
618 DriverStr(RepeatFFF(&mips::MipsAssembler::CmpEqD, "cmp.eq.d ${reg1}, ${reg2}, ${reg3}"),
619 "cmp.eq.d");
620 }
621
TEST_F(AssemblerMIPS32r6Test,CmpUeqD)622 TEST_F(AssemblerMIPS32r6Test, CmpUeqD) {
623 DriverStr(RepeatFFF(&mips::MipsAssembler::CmpUeqD, "cmp.ueq.d ${reg1}, ${reg2}, ${reg3}"),
624 "cmp.ueq.d");
625 }
626
TEST_F(AssemblerMIPS32r6Test,CmpLtD)627 TEST_F(AssemblerMIPS32r6Test, CmpLtD) {
628 DriverStr(RepeatFFF(&mips::MipsAssembler::CmpLtD, "cmp.lt.d ${reg1}, ${reg2}, ${reg3}"),
629 "cmp.lt.d");
630 }
631
TEST_F(AssemblerMIPS32r6Test,CmpUltD)632 TEST_F(AssemblerMIPS32r6Test, CmpUltD) {
633 DriverStr(RepeatFFF(&mips::MipsAssembler::CmpUltD, "cmp.ult.d ${reg1}, ${reg2}, ${reg3}"),
634 "cmp.ult.d");
635 }
636
TEST_F(AssemblerMIPS32r6Test,CmpLeD)637 TEST_F(AssemblerMIPS32r6Test, CmpLeD) {
638 DriverStr(RepeatFFF(&mips::MipsAssembler::CmpLeD, "cmp.le.d ${reg1}, ${reg2}, ${reg3}"),
639 "cmp.le.d");
640 }
641
TEST_F(AssemblerMIPS32r6Test,CmpUleD)642 TEST_F(AssemblerMIPS32r6Test, CmpUleD) {
643 DriverStr(RepeatFFF(&mips::MipsAssembler::CmpUleD, "cmp.ule.d ${reg1}, ${reg2}, ${reg3}"),
644 "cmp.ule.d");
645 }
646
TEST_F(AssemblerMIPS32r6Test,CmpOrD)647 TEST_F(AssemblerMIPS32r6Test, CmpOrD) {
648 DriverStr(RepeatFFF(&mips::MipsAssembler::CmpOrD, "cmp.or.d ${reg1}, ${reg2}, ${reg3}"),
649 "cmp.or.d");
650 }
651
TEST_F(AssemblerMIPS32r6Test,CmpUneD)652 TEST_F(AssemblerMIPS32r6Test, CmpUneD) {
653 DriverStr(RepeatFFF(&mips::MipsAssembler::CmpUneD, "cmp.une.d ${reg1}, ${reg2}, ${reg3}"),
654 "cmp.une.d");
655 }
656
TEST_F(AssemblerMIPS32r6Test,CmpNeD)657 TEST_F(AssemblerMIPS32r6Test, CmpNeD) {
658 DriverStr(RepeatFFF(&mips::MipsAssembler::CmpNeD, "cmp.ne.d ${reg1}, ${reg2}, ${reg3}"),
659 "cmp.ne.d");
660 }
661
TEST_F(AssemblerMIPS32r6Test,LoadDFromOffset)662 TEST_F(AssemblerMIPS32r6Test, LoadDFromOffset) {
663 __ LoadDFromOffset(mips::F0, mips::A0, -0x8000);
664 __ LoadDFromOffset(mips::F0, mips::A0, +0);
665 __ LoadDFromOffset(mips::F0, mips::A0, +0x7FF8);
666 __ LoadDFromOffset(mips::F0, mips::A0, +0x7FFB);
667 __ LoadDFromOffset(mips::F0, mips::A0, +0x7FFC);
668 __ LoadDFromOffset(mips::F0, mips::A0, +0x7FFF);
669 __ LoadDFromOffset(mips::F0, mips::A0, -0xFFF0);
670 __ LoadDFromOffset(mips::F0, mips::A0, -0x8008);
671 __ LoadDFromOffset(mips::F0, mips::A0, -0x8001);
672 __ LoadDFromOffset(mips::F0, mips::A0, +0x8000);
673 __ LoadDFromOffset(mips::F0, mips::A0, +0xFFF0);
674 __ LoadDFromOffset(mips::F0, mips::A0, -0x17FE8);
675 __ LoadDFromOffset(mips::F0, mips::A0, -0x0FFF8);
676 __ LoadDFromOffset(mips::F0, mips::A0, -0x0FFF1);
677 __ LoadDFromOffset(mips::F0, mips::A0, +0x0FFF1);
678 __ LoadDFromOffset(mips::F0, mips::A0, +0x0FFF8);
679 __ LoadDFromOffset(mips::F0, mips::A0, +0x17FE8);
680 __ LoadDFromOffset(mips::F0, mips::A0, -0x17FF0);
681 __ LoadDFromOffset(mips::F0, mips::A0, -0x17FE9);
682 __ LoadDFromOffset(mips::F0, mips::A0, +0x17FE9);
683 __ LoadDFromOffset(mips::F0, mips::A0, +0x17FF0);
684 __ LoadDFromOffset(mips::F0, mips::A0, +0x12345678);
685
686 const char* expected =
687 "ldc1 $f0, -0x8000($a0)\n"
688 "ldc1 $f0, 0($a0)\n"
689 "ldc1 $f0, 0x7FF8($a0)\n"
690 "lwc1 $f0, 0x7FFB($a0)\n"
691 "lw $t8, 0x7FFF($a0)\n"
692 "mthc1 $t8, $f0\n"
693 "addiu $at, $a0, 0x7FF8\n"
694 "lwc1 $f0, 4($at)\n"
695 "lw $t8, 8($at)\n"
696 "mthc1 $t8, $f0\n"
697 "addiu $at, $a0, 0x7FF8\n"
698 "lwc1 $f0, 7($at)\n"
699 "lw $t8, 11($at)\n"
700 "mthc1 $t8, $f0\n"
701 "addiu $at, $a0, -0x7FF8\n"
702 "ldc1 $f0, -0x7FF8($at)\n"
703 "addiu $at, $a0, -0x7FF8\n"
704 "ldc1 $f0, -0x10($at)\n"
705 "addiu $at, $a0, -0x7FF8\n"
706 "lwc1 $f0, -9($at)\n"
707 "lw $t8, -5($at)\n"
708 "mthc1 $t8, $f0\n"
709 "addiu $at, $a0, 0x7FF8\n"
710 "ldc1 $f0, 8($at)\n"
711 "addiu $at, $a0, 0x7FF8\n"
712 "ldc1 $f0, 0x7FF8($at)\n"
713 "aui $at, $a0, 0xFFFF\n"
714 "ldc1 $f0, -0x7FE8($at)\n"
715 "aui $at, $a0, 0xFFFF\n"
716 "ldc1 $f0, 0x8($at)\n"
717 "aui $at, $a0, 0xFFFF\n"
718 "lwc1 $f0, 0xF($at)\n"
719 "lw $t8, 0x13($at)\n"
720 "mthc1 $t8, $f0\n"
721 "aui $at, $a0, 0x1\n"
722 "lwc1 $f0, -0xF($at)\n"
723 "lw $t8, -0xB($at)\n"
724 "mthc1 $t8, $f0\n"
725 "aui $at, $a0, 0x1\n"
726 "ldc1 $f0, -0x8($at)\n"
727 "aui $at, $a0, 0x1\n"
728 "ldc1 $f0, 0x7FE8($at)\n"
729 "aui $at, $a0, 0xFFFF\n"
730 "ldc1 $f0, -0x7FF0($at)\n"
731 "aui $at, $a0, 0xFFFF\n"
732 "lwc1 $f0, -0x7FE9($at)\n"
733 "lw $t8, -0x7FE5($at)\n"
734 "mthc1 $t8, $f0\n"
735 "aui $at, $a0, 0x1\n"
736 "lwc1 $f0, 0x7FE9($at)\n"
737 "lw $t8, 0x7FED($at)\n"
738 "mthc1 $t8, $f0\n"
739 "aui $at, $a0, 0x1\n"
740 "ldc1 $f0, 0x7FF0($at)\n"
741 "aui $at, $a0, 0x1234\n"
742 "ldc1 $f0, 0x5678($at)\n";
743 DriverStr(expected, "LoadDFromOffset");
744 }
745
TEST_F(AssemblerMIPS32r6Test,LoadQFromOffset)746 TEST_F(AssemblerMIPS32r6Test, LoadQFromOffset) {
747 __ LoadQFromOffset(mips::F0, mips::A0, 0);
748 __ LoadQFromOffset(mips::F0, mips::A0, 1);
749 __ LoadQFromOffset(mips::F0, mips::A0, 2);
750 __ LoadQFromOffset(mips::F0, mips::A0, 4);
751 __ LoadQFromOffset(mips::F0, mips::A0, 8);
752 __ LoadQFromOffset(mips::F0, mips::A0, 511);
753 __ LoadQFromOffset(mips::F0, mips::A0, 512);
754 __ LoadQFromOffset(mips::F0, mips::A0, 513);
755 __ LoadQFromOffset(mips::F0, mips::A0, 514);
756 __ LoadQFromOffset(mips::F0, mips::A0, 516);
757 __ LoadQFromOffset(mips::F0, mips::A0, 1022);
758 __ LoadQFromOffset(mips::F0, mips::A0, 1024);
759 __ LoadQFromOffset(mips::F0, mips::A0, 1025);
760 __ LoadQFromOffset(mips::F0, mips::A0, 1026);
761 __ LoadQFromOffset(mips::F0, mips::A0, 1028);
762 __ LoadQFromOffset(mips::F0, mips::A0, 2044);
763 __ LoadQFromOffset(mips::F0, mips::A0, 2048);
764 __ LoadQFromOffset(mips::F0, mips::A0, 2049);
765 __ LoadQFromOffset(mips::F0, mips::A0, 2050);
766 __ LoadQFromOffset(mips::F0, mips::A0, 2052);
767 __ LoadQFromOffset(mips::F0, mips::A0, 4088);
768 __ LoadQFromOffset(mips::F0, mips::A0, 4096);
769 __ LoadQFromOffset(mips::F0, mips::A0, 4097);
770 __ LoadQFromOffset(mips::F0, mips::A0, 4098);
771 __ LoadQFromOffset(mips::F0, mips::A0, 4100);
772 __ LoadQFromOffset(mips::F0, mips::A0, 4104);
773 __ LoadQFromOffset(mips::F0, mips::A0, 0x7FFC);
774 __ LoadQFromOffset(mips::F0, mips::A0, 0x8000);
775 __ LoadQFromOffset(mips::F0, mips::A0, 0x10000);
776 __ LoadQFromOffset(mips::F0, mips::A0, 0x12345678);
777 __ LoadQFromOffset(mips::F0, mips::A0, 0x12350078);
778 __ LoadQFromOffset(mips::F0, mips::A0, -256);
779 __ LoadQFromOffset(mips::F0, mips::A0, -511);
780 __ LoadQFromOffset(mips::F0, mips::A0, -513);
781 __ LoadQFromOffset(mips::F0, mips::A0, -1022);
782 __ LoadQFromOffset(mips::F0, mips::A0, -1026);
783 __ LoadQFromOffset(mips::F0, mips::A0, -2044);
784 __ LoadQFromOffset(mips::F0, mips::A0, -2052);
785 __ LoadQFromOffset(mips::F0, mips::A0, -4096);
786 __ LoadQFromOffset(mips::F0, mips::A0, -4104);
787 __ LoadQFromOffset(mips::F0, mips::A0, -32768);
788 __ LoadQFromOffset(mips::F0, mips::A0, 0xABCDEF00);
789 __ LoadQFromOffset(mips::F0, mips::A0, 0x7FFFABCD);
790
791 const char* expected =
792 "ld.d $w0, 0($a0)\n"
793 "ld.b $w0, 1($a0)\n"
794 "ld.h $w0, 2($a0)\n"
795 "ld.w $w0, 4($a0)\n"
796 "ld.d $w0, 8($a0)\n"
797 "ld.b $w0, 511($a0)\n"
798 "ld.d $w0, 512($a0)\n"
799 "addiu $at, $a0, 513\n"
800 "ld.b $w0, 0($at)\n"
801 "ld.h $w0, 514($a0)\n"
802 "ld.w $w0, 516($a0)\n"
803 "ld.h $w0, 1022($a0)\n"
804 "ld.d $w0, 1024($a0)\n"
805 "addiu $at, $a0, 1025\n"
806 "ld.b $w0, 0($at)\n"
807 "addiu $at, $a0, 1026\n"
808 "ld.h $w0, 0($at)\n"
809 "ld.w $w0, 1028($a0)\n"
810 "ld.w $w0, 2044($a0)\n"
811 "ld.d $w0, 2048($a0)\n"
812 "addiu $at, $a0, 2049\n"
813 "ld.b $w0, 0($at)\n"
814 "addiu $at, $a0, 2050\n"
815 "ld.h $w0, 0($at)\n"
816 "addiu $at, $a0, 2052\n"
817 "ld.w $w0, 0($at)\n"
818 "ld.d $w0, 4088($a0)\n"
819 "addiu $at, $a0, 4096\n"
820 "ld.d $w0, 0($at)\n"
821 "addiu $at, $a0, 4097\n"
822 "ld.b $w0, 0($at)\n"
823 "addiu $at, $a0, 4098\n"
824 "ld.h $w0, 0($at)\n"
825 "addiu $at, $a0, 4100\n"
826 "ld.w $w0, 0($at)\n"
827 "addiu $at, $a0, 4104\n"
828 "ld.d $w0, 0($at)\n"
829 "addiu $at, $a0, 0x7FFC\n"
830 "ld.w $w0, 0($at)\n"
831 "addiu $at, $a0, 0x7FF8\n"
832 "ld.d $w0, 8($at)\n"
833 "aui $at, $a0, 0x1\n"
834 "ld.d $w0, 0($at)\n"
835 "aui $at, $a0, 0x1234\n"
836 "addiu $at, $at, 0x6000\n"
837 "ld.d $w0, -2440($at) # 0xF678\n"
838 "aui $at, $a0, 0x1235\n"
839 "ld.d $w0, 0x78($at)\n"
840 "ld.d $w0, -256($a0)\n"
841 "ld.b $w0, -511($a0)\n"
842 "addiu $at, $a0, -513\n"
843 "ld.b $w0, 0($at)\n"
844 "ld.h $w0, -1022($a0)\n"
845 "addiu $at, $a0, -1026\n"
846 "ld.h $w0, 0($at)\n"
847 "ld.w $w0, -2044($a0)\n"
848 "addiu $at, $a0, -2052\n"
849 "ld.w $w0, 0($at)\n"
850 "ld.d $w0, -4096($a0)\n"
851 "addiu $at, $a0, -4104\n"
852 "ld.d $w0, 0($at)\n"
853 "addiu $at, $a0, -32768\n"
854 "ld.d $w0, 0($at)\n"
855 "aui $at, $a0, 0xABCE\n"
856 "addiu $at, $at, -8192 # 0xE000\n"
857 "ld.d $w0, 0xF00($at)\n"
858 "aui $at, $a0, 0x8000\n"
859 "addiu $at, $at, -21504 # 0xAC00\n"
860 "ld.b $w0, -51($at) # 0xFFCD\n";
861 DriverStr(expected, "LoadQFromOffset");
862 }
863
TEST_F(AssemblerMIPS32r6Test,StoreDToOffset)864 TEST_F(AssemblerMIPS32r6Test, StoreDToOffset) {
865 __ StoreDToOffset(mips::F0, mips::A0, -0x8000);
866 __ StoreDToOffset(mips::F0, mips::A0, +0);
867 __ StoreDToOffset(mips::F0, mips::A0, +0x7FF8);
868 __ StoreDToOffset(mips::F0, mips::A0, +0x7FFB);
869 __ StoreDToOffset(mips::F0, mips::A0, +0x7FFC);
870 __ StoreDToOffset(mips::F0, mips::A0, +0x7FFF);
871 __ StoreDToOffset(mips::F0, mips::A0, -0xFFF0);
872 __ StoreDToOffset(mips::F0, mips::A0, -0x8008);
873 __ StoreDToOffset(mips::F0, mips::A0, -0x8001);
874 __ StoreDToOffset(mips::F0, mips::A0, +0x8000);
875 __ StoreDToOffset(mips::F0, mips::A0, +0xFFF0);
876 __ StoreDToOffset(mips::F0, mips::A0, -0x17FE8);
877 __ StoreDToOffset(mips::F0, mips::A0, -0x0FFF8);
878 __ StoreDToOffset(mips::F0, mips::A0, -0x0FFF1);
879 __ StoreDToOffset(mips::F0, mips::A0, +0x0FFF1);
880 __ StoreDToOffset(mips::F0, mips::A0, +0x0FFF8);
881 __ StoreDToOffset(mips::F0, mips::A0, +0x17FE8);
882 __ StoreDToOffset(mips::F0, mips::A0, -0x17FF0);
883 __ StoreDToOffset(mips::F0, mips::A0, -0x17FE9);
884 __ StoreDToOffset(mips::F0, mips::A0, +0x17FE9);
885 __ StoreDToOffset(mips::F0, mips::A0, +0x17FF0);
886 __ StoreDToOffset(mips::F0, mips::A0, +0x12345678);
887
888 const char* expected =
889 "sdc1 $f0, -0x8000($a0)\n"
890 "sdc1 $f0, 0($a0)\n"
891 "sdc1 $f0, 0x7FF8($a0)\n"
892 "mfhc1 $t8, $f0\n"
893 "swc1 $f0, 0x7FFB($a0)\n"
894 "sw $t8, 0x7FFF($a0)\n"
895 "addiu $at, $a0, 0x7FF8\n"
896 "mfhc1 $t8, $f0\n"
897 "swc1 $f0, 4($at)\n"
898 "sw $t8, 8($at)\n"
899 "addiu $at, $a0, 0x7FF8\n"
900 "mfhc1 $t8, $f0\n"
901 "swc1 $f0, 7($at)\n"
902 "sw $t8, 11($at)\n"
903 "addiu $at, $a0, -0x7FF8\n"
904 "sdc1 $f0, -0x7FF8($at)\n"
905 "addiu $at, $a0, -0x7FF8\n"
906 "sdc1 $f0, -0x10($at)\n"
907 "addiu $at, $a0, -0x7FF8\n"
908 "mfhc1 $t8, $f0\n"
909 "swc1 $f0, -9($at)\n"
910 "sw $t8, -5($at)\n"
911 "addiu $at, $a0, 0x7FF8\n"
912 "sdc1 $f0, 8($at)\n"
913 "addiu $at, $a0, 0x7FF8\n"
914 "sdc1 $f0, 0x7FF8($at)\n"
915 "aui $at, $a0, 0xFFFF\n"
916 "sdc1 $f0, -0x7FE8($at)\n"
917 "aui $at, $a0, 0xFFFF\n"
918 "sdc1 $f0, 0x8($at)\n"
919 "aui $at, $a0, 0xFFFF\n"
920 "mfhc1 $t8, $f0\n"
921 "swc1 $f0, 0xF($at)\n"
922 "sw $t8, 0x13($at)\n"
923 "aui $at, $a0, 0x1\n"
924 "mfhc1 $t8, $f0\n"
925 "swc1 $f0, -0xF($at)\n"
926 "sw $t8, -0xB($at)\n"
927 "aui $at, $a0, 0x1\n"
928 "sdc1 $f0, -0x8($at)\n"
929 "aui $at, $a0, 0x1\n"
930 "sdc1 $f0, 0x7FE8($at)\n"
931 "aui $at, $a0, 0xFFFF\n"
932 "sdc1 $f0, -0x7FF0($at)\n"
933 "aui $at, $a0, 0xFFFF\n"
934 "mfhc1 $t8, $f0\n"
935 "swc1 $f0, -0x7FE9($at)\n"
936 "sw $t8, -0x7FE5($at)\n"
937 "aui $at, $a0, 0x1\n"
938 "mfhc1 $t8, $f0\n"
939 "swc1 $f0, 0x7FE9($at)\n"
940 "sw $t8, 0x7FED($at)\n"
941 "aui $at, $a0, 0x1\n"
942 "sdc1 $f0, 0x7FF0($at)\n"
943 "aui $at, $a0, 0x1234\n"
944 "sdc1 $f0, 0x5678($at)\n";
945 DriverStr(expected, "StoreDToOffset");
946 }
947
TEST_F(AssemblerMIPS32r6Test,StoreQToOffset)948 TEST_F(AssemblerMIPS32r6Test, StoreQToOffset) {
949 __ StoreQToOffset(mips::F0, mips::A0, 0);
950 __ StoreQToOffset(mips::F0, mips::A0, 1);
951 __ StoreQToOffset(mips::F0, mips::A0, 2);
952 __ StoreQToOffset(mips::F0, mips::A0, 4);
953 __ StoreQToOffset(mips::F0, mips::A0, 8);
954 __ StoreQToOffset(mips::F0, mips::A0, 511);
955 __ StoreQToOffset(mips::F0, mips::A0, 512);
956 __ StoreQToOffset(mips::F0, mips::A0, 513);
957 __ StoreQToOffset(mips::F0, mips::A0, 514);
958 __ StoreQToOffset(mips::F0, mips::A0, 516);
959 __ StoreQToOffset(mips::F0, mips::A0, 1022);
960 __ StoreQToOffset(mips::F0, mips::A0, 1024);
961 __ StoreQToOffset(mips::F0, mips::A0, 1025);
962 __ StoreQToOffset(mips::F0, mips::A0, 1026);
963 __ StoreQToOffset(mips::F0, mips::A0, 1028);
964 __ StoreQToOffset(mips::F0, mips::A0, 2044);
965 __ StoreQToOffset(mips::F0, mips::A0, 2048);
966 __ StoreQToOffset(mips::F0, mips::A0, 2049);
967 __ StoreQToOffset(mips::F0, mips::A0, 2050);
968 __ StoreQToOffset(mips::F0, mips::A0, 2052);
969 __ StoreQToOffset(mips::F0, mips::A0, 4088);
970 __ StoreQToOffset(mips::F0, mips::A0, 4096);
971 __ StoreQToOffset(mips::F0, mips::A0, 4097);
972 __ StoreQToOffset(mips::F0, mips::A0, 4098);
973 __ StoreQToOffset(mips::F0, mips::A0, 4100);
974 __ StoreQToOffset(mips::F0, mips::A0, 4104);
975 __ StoreQToOffset(mips::F0, mips::A0, 0x7FFC);
976 __ StoreQToOffset(mips::F0, mips::A0, 0x8000);
977 __ StoreQToOffset(mips::F0, mips::A0, 0x10000);
978 __ StoreQToOffset(mips::F0, mips::A0, 0x12345678);
979 __ StoreQToOffset(mips::F0, mips::A0, 0x12350078);
980 __ StoreQToOffset(mips::F0, mips::A0, -256);
981 __ StoreQToOffset(mips::F0, mips::A0, -511);
982 __ StoreQToOffset(mips::F0, mips::A0, -513);
983 __ StoreQToOffset(mips::F0, mips::A0, -1022);
984 __ StoreQToOffset(mips::F0, mips::A0, -1026);
985 __ StoreQToOffset(mips::F0, mips::A0, -2044);
986 __ StoreQToOffset(mips::F0, mips::A0, -2052);
987 __ StoreQToOffset(mips::F0, mips::A0, -4096);
988 __ StoreQToOffset(mips::F0, mips::A0, -4104);
989 __ StoreQToOffset(mips::F0, mips::A0, -32768);
990 __ StoreQToOffset(mips::F0, mips::A0, 0xABCDEF00);
991 __ StoreQToOffset(mips::F0, mips::A0, 0x7FFFABCD);
992
993 const char* expected =
994 "st.d $w0, 0($a0)\n"
995 "st.b $w0, 1($a0)\n"
996 "st.h $w0, 2($a0)\n"
997 "st.w $w0, 4($a0)\n"
998 "st.d $w0, 8($a0)\n"
999 "st.b $w0, 511($a0)\n"
1000 "st.d $w0, 512($a0)\n"
1001 "addiu $at, $a0, 513\n"
1002 "st.b $w0, 0($at)\n"
1003 "st.h $w0, 514($a0)\n"
1004 "st.w $w0, 516($a0)\n"
1005 "st.h $w0, 1022($a0)\n"
1006 "st.d $w0, 1024($a0)\n"
1007 "addiu $at, $a0, 1025\n"
1008 "st.b $w0, 0($at)\n"
1009 "addiu $at, $a0, 1026\n"
1010 "st.h $w0, 0($at)\n"
1011 "st.w $w0, 1028($a0)\n"
1012 "st.w $w0, 2044($a0)\n"
1013 "st.d $w0, 2048($a0)\n"
1014 "addiu $at, $a0, 2049\n"
1015 "st.b $w0, 0($at)\n"
1016 "addiu $at, $a0, 2050\n"
1017 "st.h $w0, 0($at)\n"
1018 "addiu $at, $a0, 2052\n"
1019 "st.w $w0, 0($at)\n"
1020 "st.d $w0, 4088($a0)\n"
1021 "addiu $at, $a0, 4096\n"
1022 "st.d $w0, 0($at)\n"
1023 "addiu $at, $a0, 4097\n"
1024 "st.b $w0, 0($at)\n"
1025 "addiu $at, $a0, 4098\n"
1026 "st.h $w0, 0($at)\n"
1027 "addiu $at, $a0, 4100\n"
1028 "st.w $w0, 0($at)\n"
1029 "addiu $at, $a0, 4104\n"
1030 "st.d $w0, 0($at)\n"
1031 "addiu $at, $a0, 0x7FFC\n"
1032 "st.w $w0, 0($at)\n"
1033 "addiu $at, $a0, 0x7FF8\n"
1034 "st.d $w0, 8($at)\n"
1035 "aui $at, $a0, 0x1\n"
1036 "st.d $w0, 0($at)\n"
1037 "aui $at, $a0, 0x1234\n"
1038 "addiu $at, $at, 0x6000\n"
1039 "st.d $w0, -2440($at) # 0xF678\n"
1040 "aui $at, $a0, 0x1235\n"
1041 "st.d $w0, 0x78($at)\n"
1042 "st.d $w0, -256($a0)\n"
1043 "st.b $w0, -511($a0)\n"
1044 "addiu $at, $a0, -513\n"
1045 "st.b $w0, 0($at)\n"
1046 "st.h $w0, -1022($a0)\n"
1047 "addiu $at, $a0, -1026\n"
1048 "st.h $w0, 0($at)\n"
1049 "st.w $w0, -2044($a0)\n"
1050 "addiu $at, $a0, -2052\n"
1051 "st.w $w0, 0($at)\n"
1052 "st.d $w0, -4096($a0)\n"
1053 "addiu $at, $a0, -4104\n"
1054 "st.d $w0, 0($at)\n"
1055 "addiu $at, $a0, -32768\n"
1056 "st.d $w0, 0($at)\n"
1057 "aui $at, $a0, 0xABCE\n"
1058 "addiu $at, $at, -8192 # 0xE000\n"
1059 "st.d $w0, 0xF00($at)\n"
1060 "aui $at, $a0, 0x8000\n"
1061 "addiu $at, $at, -21504 # 0xAC00\n"
1062 "st.b $w0, -51($at) # 0xFFCD\n";
1063 DriverStr(expected, "StoreQToOffset");
1064 }
1065
1066 //////////////
1067 // BRANCHES //
1068 //////////////
1069
TEST_F(AssemblerMIPS32r6Test,Bc)1070 TEST_F(AssemblerMIPS32r6Test, Bc) {
1071 BranchHelper(&mips::MipsAssembler::Bc, "Bc", /* has_slot */ false);
1072 }
1073
TEST_F(AssemblerMIPS32r6Test,Balc)1074 TEST_F(AssemblerMIPS32r6Test, Balc) {
1075 BranchHelper(&mips::MipsAssembler::Balc, "Balc", /* has_slot */ false);
1076 }
1077
TEST_F(AssemblerMIPS32r6Test,Beqc)1078 TEST_F(AssemblerMIPS32r6Test, Beqc) {
1079 BranchCondTwoRegsHelper(&mips::MipsAssembler::Beqc, "Beqc");
1080 }
1081
TEST_F(AssemblerMIPS32r6Test,Bnec)1082 TEST_F(AssemblerMIPS32r6Test, Bnec) {
1083 BranchCondTwoRegsHelper(&mips::MipsAssembler::Bnec, "Bnec");
1084 }
1085
TEST_F(AssemblerMIPS32r6Test,Beqzc)1086 TEST_F(AssemblerMIPS32r6Test, Beqzc) {
1087 BranchCondOneRegHelper(&mips::MipsAssembler::Beqzc, "Beqzc");
1088 }
1089
TEST_F(AssemblerMIPS32r6Test,Bnezc)1090 TEST_F(AssemblerMIPS32r6Test, Bnezc) {
1091 BranchCondOneRegHelper(&mips::MipsAssembler::Bnezc, "Bnezc");
1092 }
1093
TEST_F(AssemblerMIPS32r6Test,Bltzc)1094 TEST_F(AssemblerMIPS32r6Test, Bltzc) {
1095 BranchCondOneRegHelper(&mips::MipsAssembler::Bltzc, "Bltzc");
1096 }
1097
TEST_F(AssemblerMIPS32r6Test,Bgezc)1098 TEST_F(AssemblerMIPS32r6Test, Bgezc) {
1099 BranchCondOneRegHelper(&mips::MipsAssembler::Bgezc, "Bgezc");
1100 }
1101
TEST_F(AssemblerMIPS32r6Test,Blezc)1102 TEST_F(AssemblerMIPS32r6Test, Blezc) {
1103 BranchCondOneRegHelper(&mips::MipsAssembler::Blezc, "Blezc");
1104 }
1105
TEST_F(AssemblerMIPS32r6Test,Bgtzc)1106 TEST_F(AssemblerMIPS32r6Test, Bgtzc) {
1107 BranchCondOneRegHelper(&mips::MipsAssembler::Bgtzc, "Bgtzc");
1108 }
1109
TEST_F(AssemblerMIPS32r6Test,Bltc)1110 TEST_F(AssemblerMIPS32r6Test, Bltc) {
1111 BranchCondTwoRegsHelper(&mips::MipsAssembler::Bltc, "Bltc");
1112 }
1113
TEST_F(AssemblerMIPS32r6Test,Bgec)1114 TEST_F(AssemblerMIPS32r6Test, Bgec) {
1115 BranchCondTwoRegsHelper(&mips::MipsAssembler::Bgec, "Bgec");
1116 }
1117
TEST_F(AssemblerMIPS32r6Test,Bltuc)1118 TEST_F(AssemblerMIPS32r6Test, Bltuc) {
1119 BranchCondTwoRegsHelper(&mips::MipsAssembler::Bltuc, "Bltuc");
1120 }
1121
TEST_F(AssemblerMIPS32r6Test,Bgeuc)1122 TEST_F(AssemblerMIPS32r6Test, Bgeuc) {
1123 BranchCondTwoRegsHelper(&mips::MipsAssembler::Bgeuc, "Bgeuc");
1124 }
1125
TEST_F(AssemblerMIPS32r6Test,Bc1eqz)1126 TEST_F(AssemblerMIPS32r6Test, Bc1eqz) {
1127 BranchFpuCondHelper(&mips::MipsAssembler::Bc1eqz, "Bc1eqz");
1128 }
1129
TEST_F(AssemblerMIPS32r6Test,Bc1nez)1130 TEST_F(AssemblerMIPS32r6Test, Bc1nez) {
1131 BranchFpuCondHelper(&mips::MipsAssembler::Bc1nez, "Bc1nez");
1132 }
1133
TEST_F(AssemblerMIPS32r6Test,B)1134 TEST_F(AssemblerMIPS32r6Test, B) {
1135 BranchHelper(&mips::MipsAssembler::B, "Bc", /* has_slot */ false);
1136 }
1137
TEST_F(AssemblerMIPS32r6Test,Bal)1138 TEST_F(AssemblerMIPS32r6Test, Bal) {
1139 BranchHelper(&mips::MipsAssembler::Bal, "Balc", /* has_slot */ false);
1140 }
1141
TEST_F(AssemblerMIPS32r6Test,Beq)1142 TEST_F(AssemblerMIPS32r6Test, Beq) {
1143 BranchCondTwoRegsHelper(&mips::MipsAssembler::Beq, "Beqc");
1144 }
1145
TEST_F(AssemblerMIPS32r6Test,Bne)1146 TEST_F(AssemblerMIPS32r6Test, Bne) {
1147 BranchCondTwoRegsHelper(&mips::MipsAssembler::Bne, "Bnec");
1148 }
1149
TEST_F(AssemblerMIPS32r6Test,Beqz)1150 TEST_F(AssemblerMIPS32r6Test, Beqz) {
1151 BranchCondOneRegHelper(&mips::MipsAssembler::Beqz, "Beqzc");
1152 }
1153
TEST_F(AssemblerMIPS32r6Test,Bnez)1154 TEST_F(AssemblerMIPS32r6Test, Bnez) {
1155 BranchCondOneRegHelper(&mips::MipsAssembler::Bnez, "Bnezc");
1156 }
1157
TEST_F(AssemblerMIPS32r6Test,Bltz)1158 TEST_F(AssemblerMIPS32r6Test, Bltz) {
1159 BranchCondOneRegHelper(&mips::MipsAssembler::Bltz, "Bltzc");
1160 }
1161
TEST_F(AssemblerMIPS32r6Test,Bgez)1162 TEST_F(AssemblerMIPS32r6Test, Bgez) {
1163 BranchCondOneRegHelper(&mips::MipsAssembler::Bgez, "Bgezc");
1164 }
1165
TEST_F(AssemblerMIPS32r6Test,Blez)1166 TEST_F(AssemblerMIPS32r6Test, Blez) {
1167 BranchCondOneRegHelper(&mips::MipsAssembler::Blez, "Blezc");
1168 }
1169
TEST_F(AssemblerMIPS32r6Test,Bgtz)1170 TEST_F(AssemblerMIPS32r6Test, Bgtz) {
1171 BranchCondOneRegHelper(&mips::MipsAssembler::Bgtz, "Bgtzc");
1172 }
1173
TEST_F(AssemblerMIPS32r6Test,Blt)1174 TEST_F(AssemblerMIPS32r6Test, Blt) {
1175 BranchCondTwoRegsHelper(&mips::MipsAssembler::Blt, "Bltc");
1176 }
1177
TEST_F(AssemblerMIPS32r6Test,Bge)1178 TEST_F(AssemblerMIPS32r6Test, Bge) {
1179 BranchCondTwoRegsHelper(&mips::MipsAssembler::Bge, "Bgec");
1180 }
1181
TEST_F(AssemblerMIPS32r6Test,Bltu)1182 TEST_F(AssemblerMIPS32r6Test, Bltu) {
1183 BranchCondTwoRegsHelper(&mips::MipsAssembler::Bltu, "Bltuc");
1184 }
1185
TEST_F(AssemblerMIPS32r6Test,Bgeu)1186 TEST_F(AssemblerMIPS32r6Test, Bgeu) {
1187 BranchCondTwoRegsHelper(&mips::MipsAssembler::Bgeu, "Bgeuc");
1188 }
1189
TEST_F(AssemblerMIPS32r6Test,BareBc)1190 TEST_F(AssemblerMIPS32r6Test, BareBc) {
1191 BranchHelper(&mips::MipsAssembler::Bc, "Bc", /* has_slot */ false, /* is_bare */ true);
1192 }
1193
TEST_F(AssemblerMIPS32r6Test,BareBalc)1194 TEST_F(AssemblerMIPS32r6Test, BareBalc) {
1195 BranchHelper(&mips::MipsAssembler::Balc, "Balc", /* has_slot */ false, /* is_bare */ true);
1196 }
1197
TEST_F(AssemblerMIPS32r6Test,BareBeqc)1198 TEST_F(AssemblerMIPS32r6Test, BareBeqc) {
1199 BranchCondTwoRegsHelper(&mips::MipsAssembler::Beqc, "Beqc", /* is_bare */ true);
1200 }
1201
TEST_F(AssemblerMIPS32r6Test,BareBnec)1202 TEST_F(AssemblerMIPS32r6Test, BareBnec) {
1203 BranchCondTwoRegsHelper(&mips::MipsAssembler::Bnec, "Bnec", /* is_bare */ true);
1204 }
1205
TEST_F(AssemblerMIPS32r6Test,BareBeqzc)1206 TEST_F(AssemblerMIPS32r6Test, BareBeqzc) {
1207 BranchCondOneRegHelper(&mips::MipsAssembler::Beqzc, "Beqzc", /* is_bare */ true);
1208 }
1209
TEST_F(AssemblerMIPS32r6Test,BareBnezc)1210 TEST_F(AssemblerMIPS32r6Test, BareBnezc) {
1211 BranchCondOneRegHelper(&mips::MipsAssembler::Bnezc, "Bnezc", /* is_bare */ true);
1212 }
1213
TEST_F(AssemblerMIPS32r6Test,BareBltzc)1214 TEST_F(AssemblerMIPS32r6Test, BareBltzc) {
1215 BranchCondOneRegHelper(&mips::MipsAssembler::Bltzc, "Bltzc", /* is_bare */ true);
1216 }
1217
TEST_F(AssemblerMIPS32r6Test,BareBgezc)1218 TEST_F(AssemblerMIPS32r6Test, BareBgezc) {
1219 BranchCondOneRegHelper(&mips::MipsAssembler::Bgezc, "Bgezc", /* is_bare */ true);
1220 }
1221
TEST_F(AssemblerMIPS32r6Test,BareBlezc)1222 TEST_F(AssemblerMIPS32r6Test, BareBlezc) {
1223 BranchCondOneRegHelper(&mips::MipsAssembler::Blezc, "Blezc", /* is_bare */ true);
1224 }
1225
TEST_F(AssemblerMIPS32r6Test,BareBgtzc)1226 TEST_F(AssemblerMIPS32r6Test, BareBgtzc) {
1227 BranchCondOneRegHelper(&mips::MipsAssembler::Bgtzc, "Bgtzc", /* is_bare */ true);
1228 }
1229
TEST_F(AssemblerMIPS32r6Test,BareBltc)1230 TEST_F(AssemblerMIPS32r6Test, BareBltc) {
1231 BranchCondTwoRegsHelper(&mips::MipsAssembler::Bltc, "Bltc", /* is_bare */ true);
1232 }
1233
TEST_F(AssemblerMIPS32r6Test,BareBgec)1234 TEST_F(AssemblerMIPS32r6Test, BareBgec) {
1235 BranchCondTwoRegsHelper(&mips::MipsAssembler::Bgec, "Bgec", /* is_bare */ true);
1236 }
1237
TEST_F(AssemblerMIPS32r6Test,BareBltuc)1238 TEST_F(AssemblerMIPS32r6Test, BareBltuc) {
1239 BranchCondTwoRegsHelper(&mips::MipsAssembler::Bltuc, "Bltuc", /* is_bare */ true);
1240 }
1241
TEST_F(AssemblerMIPS32r6Test,BareBgeuc)1242 TEST_F(AssemblerMIPS32r6Test, BareBgeuc) {
1243 BranchCondTwoRegsHelper(&mips::MipsAssembler::Bgeuc, "Bgeuc", /* is_bare */ true);
1244 }
1245
TEST_F(AssemblerMIPS32r6Test,BareBc1eqz)1246 TEST_F(AssemblerMIPS32r6Test, BareBc1eqz) {
1247 BranchFpuCondHelper(&mips::MipsAssembler::Bc1eqz, "Bc1eqz", /* is_bare */ true);
1248 }
1249
TEST_F(AssemblerMIPS32r6Test,BareBc1nez)1250 TEST_F(AssemblerMIPS32r6Test, BareBc1nez) {
1251 BranchFpuCondHelper(&mips::MipsAssembler::Bc1nez, "Bc1nez", /* is_bare */ true);
1252 }
1253
TEST_F(AssemblerMIPS32r6Test,BareB)1254 TEST_F(AssemblerMIPS32r6Test, BareB) {
1255 BranchHelper(&mips::MipsAssembler::B, "B", /* has_slot */ true, /* is_bare */ true);
1256 }
1257
TEST_F(AssemblerMIPS32r6Test,BareBal)1258 TEST_F(AssemblerMIPS32r6Test, BareBal) {
1259 BranchHelper(&mips::MipsAssembler::Bal, "Bal", /* has_slot */ true, /* is_bare */ true);
1260 }
1261
TEST_F(AssemblerMIPS32r6Test,BareBeq)1262 TEST_F(AssemblerMIPS32r6Test, BareBeq) {
1263 BranchCondTwoRegsHelper(&mips::MipsAssembler::Beq, "Beq", /* is_bare */ true);
1264 }
1265
TEST_F(AssemblerMIPS32r6Test,BareBne)1266 TEST_F(AssemblerMIPS32r6Test, BareBne) {
1267 BranchCondTwoRegsHelper(&mips::MipsAssembler::Bne, "Bne", /* is_bare */ true);
1268 }
1269
TEST_F(AssemblerMIPS32r6Test,BareBeqz)1270 TEST_F(AssemblerMIPS32r6Test, BareBeqz) {
1271 BranchCondOneRegHelper(&mips::MipsAssembler::Beqz, "Beqz", /* is_bare */ true);
1272 }
1273
TEST_F(AssemblerMIPS32r6Test,BareBnez)1274 TEST_F(AssemblerMIPS32r6Test, BareBnez) {
1275 BranchCondOneRegHelper(&mips::MipsAssembler::Bnez, "Bnez", /* is_bare */ true);
1276 }
1277
TEST_F(AssemblerMIPS32r6Test,BareBltz)1278 TEST_F(AssemblerMIPS32r6Test, BareBltz) {
1279 BranchCondOneRegHelper(&mips::MipsAssembler::Bltz, "Bltz", /* is_bare */ true);
1280 }
1281
TEST_F(AssemblerMIPS32r6Test,BareBgez)1282 TEST_F(AssemblerMIPS32r6Test, BareBgez) {
1283 BranchCondOneRegHelper(&mips::MipsAssembler::Bgez, "Bgez", /* is_bare */ true);
1284 }
1285
TEST_F(AssemblerMIPS32r6Test,BareBlez)1286 TEST_F(AssemblerMIPS32r6Test, BareBlez) {
1287 BranchCondOneRegHelper(&mips::MipsAssembler::Blez, "Blez", /* is_bare */ true);
1288 }
1289
TEST_F(AssemblerMIPS32r6Test,BareBgtz)1290 TEST_F(AssemblerMIPS32r6Test, BareBgtz) {
1291 BranchCondOneRegHelper(&mips::MipsAssembler::Bgtz, "Bgtz", /* is_bare */ true);
1292 }
1293
TEST_F(AssemblerMIPS32r6Test,BareBlt)1294 TEST_F(AssemblerMIPS32r6Test, BareBlt) {
1295 BranchCondTwoRegsHelper(&mips::MipsAssembler::Blt, "Blt", /* is_bare */ true);
1296 }
1297
TEST_F(AssemblerMIPS32r6Test,BareBge)1298 TEST_F(AssemblerMIPS32r6Test, BareBge) {
1299 BranchCondTwoRegsHelper(&mips::MipsAssembler::Bge, "Bge", /* is_bare */ true);
1300 }
1301
TEST_F(AssemblerMIPS32r6Test,BareBltu)1302 TEST_F(AssemblerMIPS32r6Test, BareBltu) {
1303 BranchCondTwoRegsHelper(&mips::MipsAssembler::Bltu, "Bltu", /* is_bare */ true);
1304 }
1305
TEST_F(AssemblerMIPS32r6Test,BareBgeu)1306 TEST_F(AssemblerMIPS32r6Test, BareBgeu) {
1307 BranchCondTwoRegsHelper(&mips::MipsAssembler::Bgeu, "Bgeu", /* is_bare */ true);
1308 }
1309
TEST_F(AssemblerMIPS32r6Test,LongBeqc)1310 TEST_F(AssemblerMIPS32r6Test, LongBeqc) {
1311 mips::MipsLabel label;
1312 __ Beqc(mips::A0, mips::A1, &label);
1313 constexpr uint32_t kAdduCount1 = (1u << 15) + 1;
1314 for (uint32_t i = 0; i != kAdduCount1; ++i) {
1315 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1316 }
1317 __ Bind(&label);
1318 constexpr uint32_t kAdduCount2 = (1u << 15) + 1;
1319 for (uint32_t i = 0; i != kAdduCount2; ++i) {
1320 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1321 }
1322 __ Beqc(mips::A2, mips::A3, &label);
1323
1324 uint32_t offset_forward = 2 + kAdduCount1; // 2: account for auipc and jic.
1325 offset_forward <<= 2;
1326 offset_forward += (offset_forward & 0x8000) << 1; // Account for sign extension in jic.
1327
1328 uint32_t offset_back = -(kAdduCount2 + 1); // 1: account for bnec.
1329 offset_back <<= 2;
1330 offset_back += (offset_back & 0x8000) << 1; // Account for sign extension in jic.
1331
1332 std::ostringstream oss;
1333 oss <<
1334 ".set noreorder\n"
1335 "bnec $a0, $a1, 1f\n"
1336 "auipc $at, 0x" << std::hex << High16Bits(offset_forward) << "\n"
1337 "jic $at, 0x" << std::hex << Low16Bits(offset_forward) << "\n"
1338 "1:\n" <<
1339 RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") <<
1340 "2:\n" <<
1341 RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") <<
1342 "bnec $a2, $a3, 3f\n"
1343 "auipc $at, 0x" << std::hex << High16Bits(offset_back) << "\n"
1344 "jic $at, 0x" << std::hex << Low16Bits(offset_back) << "\n"
1345 "3:\n";
1346 std::string expected = oss.str();
1347 DriverStr(expected, "LongBeqc");
1348 }
1349
TEST_F(AssemblerMIPS32r6Test,LongBeqzc)1350 TEST_F(AssemblerMIPS32r6Test, LongBeqzc) {
1351 constexpr uint32_t kNopCount1 = (1u << 20) + 1;
1352 constexpr uint32_t kNopCount2 = (1u << 20) + 1;
1353 constexpr uint32_t kRequiredCapacity = (kNopCount1 + kNopCount2 + 6u) * 4u;
1354 ASSERT_LT(__ GetBuffer()->Capacity(), kRequiredCapacity);
1355 __ GetBuffer()->ExtendCapacity(kRequiredCapacity);
1356 mips::MipsLabel label;
1357 __ Beqzc(mips::A0, &label);
1358 for (uint32_t i = 0; i != kNopCount1; ++i) {
1359 __ Nop();
1360 }
1361 __ Bind(&label);
1362 for (uint32_t i = 0; i != kNopCount2; ++i) {
1363 __ Nop();
1364 }
1365 __ Beqzc(mips::A2, &label);
1366
1367 uint32_t offset_forward = 2 + kNopCount1; // 2: account for auipc and jic.
1368 offset_forward <<= 2;
1369 offset_forward += (offset_forward & 0x8000) << 1; // Account for sign extension in jic.
1370
1371 uint32_t offset_back = -(kNopCount2 + 1); // 1: account for bnezc.
1372 offset_back <<= 2;
1373 offset_back += (offset_back & 0x8000) << 1; // Account for sign extension in jic.
1374
1375 // Note, we're using the ".fill" directive to tell the assembler to generate many NOPs
1376 // instead of generating them ourselves in the source code. This saves test time.
1377 std::ostringstream oss;
1378 oss <<
1379 ".set noreorder\n"
1380 "bnezc $a0, 1f\n"
1381 "auipc $at, 0x" << std::hex << High16Bits(offset_forward) << "\n"
1382 "jic $at, 0x" << std::hex << Low16Bits(offset_forward) << "\n"
1383 "1:\n" <<
1384 ".fill 0x" << std::hex << kNopCount1 << " , 4, 0\n"
1385 "2:\n" <<
1386 ".fill 0x" << std::hex << kNopCount2 << " , 4, 0\n"
1387 "bnezc $a2, 3f\n"
1388 "auipc $at, 0x" << std::hex << High16Bits(offset_back) << "\n"
1389 "jic $at, 0x" << std::hex << Low16Bits(offset_back) << "\n"
1390 "3:\n";
1391 std::string expected = oss.str();
1392 DriverStr(expected, "LongBeqzc");
1393 }
1394
TEST_F(AssemblerMIPS32r6Test,LongBc)1395 TEST_F(AssemblerMIPS32r6Test, LongBc) {
1396 constexpr uint32_t kNopCount1 = (1u << 25) + 1;
1397 constexpr uint32_t kNopCount2 = (1u << 25) + 1;
1398 constexpr uint32_t kRequiredCapacity = (kNopCount1 + kNopCount2 + 6u) * 4u;
1399 ASSERT_LT(__ GetBuffer()->Capacity(), kRequiredCapacity);
1400 __ GetBuffer()->ExtendCapacity(kRequiredCapacity);
1401 mips::MipsLabel label1, label2;
1402 __ Bc(&label1);
1403 for (uint32_t i = 0; i != kNopCount1; ++i) {
1404 __ Nop();
1405 }
1406 __ Bind(&label1);
1407 __ Bc(&label2);
1408 for (uint32_t i = 0; i != kNopCount2; ++i) {
1409 __ Nop();
1410 }
1411 __ Bind(&label2);
1412 __ Bc(&label1);
1413
1414 uint32_t offset_forward1 = 2 + kNopCount1; // 2: account for auipc and jic.
1415 offset_forward1 <<= 2;
1416 offset_forward1 += (offset_forward1 & 0x8000) << 1; // Account for sign extension in jic.
1417
1418 uint32_t offset_forward2 = 2 + kNopCount2; // 2: account for auipc and jic.
1419 offset_forward2 <<= 2;
1420 offset_forward2 += (offset_forward2 & 0x8000) << 1; // Account for sign extension in jic.
1421
1422 uint32_t offset_back = -(2 + kNopCount2); // 2: account for auipc and jic.
1423 offset_back <<= 2;
1424 offset_back += (offset_back & 0x8000) << 1; // Account for sign extension in jic.
1425
1426 // Note, we're using the ".fill" directive to tell the assembler to generate many NOPs
1427 // instead of generating them ourselves in the source code. This saves a few minutes
1428 // of test time.
1429 std::ostringstream oss;
1430 oss <<
1431 ".set noreorder\n"
1432 "auipc $at, 0x" << std::hex << High16Bits(offset_forward1) << "\n"
1433 "jic $at, 0x" << std::hex << Low16Bits(offset_forward1) << "\n"
1434 ".fill 0x" << std::hex << kNopCount1 << " , 4, 0\n"
1435 "1:\n"
1436 "auipc $at, 0x" << std::hex << High16Bits(offset_forward2) << "\n"
1437 "jic $at, 0x" << std::hex << Low16Bits(offset_forward2) << "\n"
1438 ".fill 0x" << std::hex << kNopCount2 << " , 4, 0\n"
1439 "2:\n"
1440 "auipc $at, 0x" << std::hex << High16Bits(offset_back) << "\n"
1441 "jic $at, 0x" << std::hex << Low16Bits(offset_back) << "\n";
1442 std::string expected = oss.str();
1443 DriverStr(expected, "LongBc");
1444 }
1445
TEST_F(AssemblerMIPS32r6Test,ImpossibleReordering)1446 TEST_F(AssemblerMIPS32r6Test, ImpossibleReordering) {
1447 mips::MipsLabel label;
1448 __ SetReorder(true);
1449 __ Bind(&label);
1450
1451 __ CmpLtD(mips::F0, mips::F2, mips::F4);
1452 __ Bc1nez(mips::F0, &label); // F0 dependency.
1453
1454 __ MulD(mips::F10, mips::F2, mips::F4);
1455 __ Bc1eqz(mips::F10, &label); // F10 dependency.
1456
1457 std::string expected =
1458 ".set noreorder\n"
1459 "1:\n"
1460
1461 "cmp.lt.d $f0, $f2, $f4\n"
1462 "bc1nez $f0, 1b\n"
1463 "nop\n"
1464
1465 "mul.d $f10, $f2, $f4\n"
1466 "bc1eqz $f10, 1b\n"
1467 "nop\n";
1468 DriverStr(expected, "ImpossibleReordering");
1469 }
1470
TEST_F(AssemblerMIPS32r6Test,Reordering)1471 TEST_F(AssemblerMIPS32r6Test, Reordering) {
1472 mips::MipsLabel label;
1473 __ SetReorder(true);
1474 __ Bind(&label);
1475
1476 __ CmpLtD(mips::F0, mips::F2, mips::F4);
1477 __ Bc1nez(mips::F2, &label);
1478
1479 __ MulD(mips::F0, mips::F2, mips::F4);
1480 __ Bc1eqz(mips::F4, &label);
1481
1482 std::string expected =
1483 ".set noreorder\n"
1484 "1:\n"
1485
1486 "bc1nez $f2, 1b\n"
1487 "cmp.lt.d $f0, $f2, $f4\n"
1488
1489 "bc1eqz $f4, 1b\n"
1490 "mul.d $f0, $f2, $f4\n";
1491 DriverStr(expected, "Reordering");
1492 }
1493
TEST_F(AssemblerMIPS32r6Test,SetReorder)1494 TEST_F(AssemblerMIPS32r6Test, SetReorder) {
1495 mips::MipsLabel label1, label2, label3, label4;
1496
1497 __ SetReorder(true);
1498 __ Bind(&label1);
1499 __ Addu(mips::T0, mips::T1, mips::T2);
1500 __ Bc1nez(mips::F0, &label1);
1501
1502 __ SetReorder(false);
1503 __ Bind(&label2);
1504 __ Addu(mips::T0, mips::T1, mips::T2);
1505 __ Bc1nez(mips::F0, &label2);
1506
1507 __ SetReorder(true);
1508 __ Bind(&label3);
1509 __ Addu(mips::T0, mips::T1, mips::T2);
1510 __ Bc1eqz(mips::F0, &label3);
1511
1512 __ SetReorder(false);
1513 __ Bind(&label4);
1514 __ Addu(mips::T0, mips::T1, mips::T2);
1515 __ Bc1eqz(mips::F0, &label4);
1516
1517 std::string expected =
1518 ".set noreorder\n"
1519 "1:\n"
1520 "bc1nez $f0, 1b\n"
1521 "addu $t0, $t1, $t2\n"
1522
1523 "2:\n"
1524 "addu $t0, $t1, $t2\n"
1525 "bc1nez $f0, 2b\n"
1526 "nop\n"
1527
1528 "3:\n"
1529 "bc1eqz $f0, 3b\n"
1530 "addu $t0, $t1, $t2\n"
1531
1532 "4:\n"
1533 "addu $t0, $t1, $t2\n"
1534 "bc1eqz $f0, 4b\n"
1535 "nop\n";
1536 DriverStr(expected, "SetReorder");
1537 }
1538
TEST_F(AssemblerMIPS32r6Test,ReorderPatchedInstruction)1539 TEST_F(AssemblerMIPS32r6Test, ReorderPatchedInstruction) {
1540 __ SetReorder(true);
1541 mips::MipsLabel label1, label2;
1542 mips::MipsLabel patcher_label1, patcher_label2, patcher_label3, patcher_label4, patcher_label5;
1543 __ Lw(mips::V0, mips::A0, 0x5678, &patcher_label1);
1544 __ Bc1eqz(mips::F0, &label1);
1545 constexpr uint32_t kAdduCount1 = 63;
1546 for (size_t i = 0; i != kAdduCount1; ++i) {
1547 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1548 }
1549 __ Bind(&label1);
1550 __ Sw(mips::V0, mips::A0, 0x5678, &patcher_label2);
1551 __ Bc1nez(mips::F2, &label2);
1552 constexpr uint32_t kAdduCount2 = 64;
1553 for (size_t i = 0; i != kAdduCount2; ++i) {
1554 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1555 }
1556 __ Bind(&label2);
1557 __ Addiu(mips::V0, mips::A0, 0x5678, &patcher_label3);
1558 __ Bc1eqz(mips::F4, &label1);
1559 __ Lw(mips::V0, mips::A0, 0x5678, &patcher_label4);
1560 __ Jalr(mips::T9);
1561 __ Sw(mips::V0, mips::A0, 0x5678, &patcher_label5);
1562 __ Bltc(mips::V0, mips::V1, &label2);
1563 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1564
1565 std::string expected =
1566 ".set noreorder\n"
1567 "bc1eqz $f0, 1f\n"
1568 "lw $v0, 0x5678($a0)\n" +
1569 RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") +
1570 "1:\n"
1571 "bc1nez $f2, 2f\n"
1572 "sw $v0, 0x5678($a0)\n" +
1573 RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") +
1574 "2:\n"
1575 "bc1eqz $f4, 1b\n"
1576 "addiu $v0, $a0, 0x5678\n"
1577 "jalr $t9\n"
1578 "lw $v0, 0x5678($a0)\n"
1579 "sw $v0, 0x5678($a0)\n"
1580 "bltc $v0, $v1, 2b\n"
1581 "nop\n"
1582 "addu $zero, $zero, $zero\n";
1583 DriverStr(expected, "ReorderPatchedInstruction");
1584 EXPECT_EQ(__ GetLabelLocation(&patcher_label1), 1 * 4u);
1585 EXPECT_EQ(__ GetLabelLocation(&patcher_label2), (kAdduCount1 + 3) * 4u);
1586 EXPECT_EQ(__ GetLabelLocation(&patcher_label3), (kAdduCount1 + kAdduCount2 + 5) * 4u);
1587 EXPECT_EQ(__ GetLabelLocation(&patcher_label4), (kAdduCount1 + kAdduCount2 + 7) * 4u);
1588 EXPECT_EQ(__ GetLabelLocation(&patcher_label5), (kAdduCount1 + kAdduCount2 + 8) * 4u);
1589 }
1590
TEST_F(AssemblerMIPS32r6Test,LongBranchReorder)1591 TEST_F(AssemblerMIPS32r6Test, LongBranchReorder) {
1592 mips::MipsLabel label, patcher_label1, patcher_label2;
1593 __ SetReorder(true);
1594 __ Addiu(mips::T0, mips::T1, 0x5678, &patcher_label1);
1595 __ Bc1nez(mips::F0, &label);
1596 constexpr uint32_t kAdduCount1 = (1u << 15) + 1;
1597 for (uint32_t i = 0; i != kAdduCount1; ++i) {
1598 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1599 }
1600 __ Bind(&label);
1601 constexpr uint32_t kAdduCount2 = (1u << 15) + 1;
1602 for (uint32_t i = 0; i != kAdduCount2; ++i) {
1603 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1604 }
1605 __ Addiu(mips::T0, mips::T1, 0x5678, &patcher_label2);
1606 __ Bc1eqz(mips::F0, &label);
1607
1608 uint32_t offset_forward = 2 + kAdduCount1; // 2: account for auipc and jic.
1609 offset_forward <<= 2;
1610 offset_forward += (offset_forward & 0x8000) << 1; // Account for sign extension in jic.
1611
1612 uint32_t offset_back = -(kAdduCount2 + 2); // 2: account for subu and bc1nez.
1613 offset_back <<= 2;
1614 offset_back += (offset_back & 0x8000) << 1; // Account for sign extension in jic.
1615
1616 std::ostringstream oss;
1617 oss <<
1618 ".set noreorder\n"
1619 "addiu $t0, $t1, 0x5678\n"
1620 "bc1eqz $f0, 1f\n"
1621 "auipc $at, 0x" << std::hex << High16Bits(offset_forward) << "\n"
1622 "jic $at, 0x" << std::hex << Low16Bits(offset_forward) << "\n"
1623 "1:\n" <<
1624 RepeatInsn(kAdduCount1, "addu $zero, $zero, $zero\n") <<
1625 "2:\n" <<
1626 RepeatInsn(kAdduCount2, "addu $zero, $zero, $zero\n") <<
1627 "addiu $t0, $t1, 0x5678\n"
1628 "bc1nez $f0, 3f\n"
1629 "auipc $at, 0x" << std::hex << High16Bits(offset_back) << "\n"
1630 "jic $at, 0x" << std::hex << Low16Bits(offset_back) << "\n"
1631 "3:\n";
1632 std::string expected = oss.str();
1633 DriverStr(expected, "LongBranchReorder");
1634 EXPECT_EQ(__ GetLabelLocation(&patcher_label1), 0 * 4u);
1635 EXPECT_EQ(__ GetLabelLocation(&patcher_label2), (kAdduCount1 + kAdduCount2 + 4) * 4u);
1636 }
1637
1638 ///////////////////////
1639 // Loading Constants //
1640 ///////////////////////
1641
TEST_F(AssemblerMIPS32r6Test,LoadFarthestNearLabelAddress)1642 TEST_F(AssemblerMIPS32r6Test, LoadFarthestNearLabelAddress) {
1643 mips::MipsLabel label;
1644 __ LoadLabelAddress(mips::V0, mips::ZERO, &label);
1645 constexpr size_t kAdduCount = 0x3FFDE;
1646 for (size_t i = 0; i != kAdduCount; ++i) {
1647 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1648 }
1649 __ Bind(&label);
1650
1651 std::string expected =
1652 "lapc $v0, 1f\n" +
1653 RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") +
1654 "1:\n";
1655 DriverStr(expected, "LoadFarthestNearLabelAddress");
1656 }
1657
TEST_F(AssemblerMIPS32r6Test,LoadNearestFarLabelAddress)1658 TEST_F(AssemblerMIPS32r6Test, LoadNearestFarLabelAddress) {
1659 mips::MipsLabel label;
1660 __ LoadLabelAddress(mips::V0, mips::ZERO, &label);
1661 constexpr size_t kAdduCount = 0x3FFDF;
1662 for (size_t i = 0; i != kAdduCount; ++i) {
1663 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1664 }
1665 __ Bind(&label);
1666
1667 std::string expected =
1668 "1:\n"
1669 "auipc $at, %hi(2f - 1b)\n"
1670 "addiu $v0, $at, %lo(2f - 1b)\n" +
1671 RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") +
1672 "2:\n";
1673 DriverStr(expected, "LoadNearestFarLabelAddress");
1674 }
1675
TEST_F(AssemblerMIPS32r6Test,LoadFarthestNearLiteral)1676 TEST_F(AssemblerMIPS32r6Test, LoadFarthestNearLiteral) {
1677 mips::Literal* literal = __ NewLiteral<uint32_t>(0x12345678);
1678 __ LoadLiteral(mips::V0, mips::ZERO, literal);
1679 constexpr size_t kAdduCount = 0x3FFDE;
1680 for (size_t i = 0; i != kAdduCount; ++i) {
1681 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1682 }
1683
1684 std::string expected =
1685 "lwpc $v0, 1f\n" +
1686 RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") +
1687 "1:\n"
1688 ".word 0x12345678\n";
1689 DriverStr(expected, "LoadFarthestNearLiteral");
1690 }
1691
TEST_F(AssemblerMIPS32r6Test,LoadNearestFarLiteral)1692 TEST_F(AssemblerMIPS32r6Test, LoadNearestFarLiteral) {
1693 mips::Literal* literal = __ NewLiteral<uint32_t>(0x12345678);
1694 __ LoadLiteral(mips::V0, mips::ZERO, literal);
1695 constexpr size_t kAdduCount = 0x3FFDF;
1696 for (size_t i = 0; i != kAdduCount; ++i) {
1697 __ Addu(mips::ZERO, mips::ZERO, mips::ZERO);
1698 }
1699
1700 std::string expected =
1701 "1:\n"
1702 "auipc $at, %hi(2f - 1b)\n"
1703 "lw $v0, %lo(2f - 1b)($at)\n" +
1704 RepeatInsn(kAdduCount, "addu $zero, $zero, $zero\n") +
1705 "2:\n"
1706 ".word 0x12345678\n";
1707 DriverStr(expected, "LoadNearestFarLiteral");
1708 }
1709
1710 // MSA instructions.
1711
TEST_F(AssemblerMIPS32r6Test,AndV)1712 TEST_F(AssemblerMIPS32r6Test, AndV) {
1713 DriverStr(RepeatVVV(&mips::MipsAssembler::AndV, "and.v ${reg1}, ${reg2}, ${reg3}"), "and.v");
1714 }
1715
TEST_F(AssemblerMIPS32r6Test,OrV)1716 TEST_F(AssemblerMIPS32r6Test, OrV) {
1717 DriverStr(RepeatVVV(&mips::MipsAssembler::OrV, "or.v ${reg1}, ${reg2}, ${reg3}"), "or.v");
1718 }
1719
TEST_F(AssemblerMIPS32r6Test,NorV)1720 TEST_F(AssemblerMIPS32r6Test, NorV) {
1721 DriverStr(RepeatVVV(&mips::MipsAssembler::NorV, "nor.v ${reg1}, ${reg2}, ${reg3}"), "nor.v");
1722 }
1723
TEST_F(AssemblerMIPS32r6Test,XorV)1724 TEST_F(AssemblerMIPS32r6Test, XorV) {
1725 DriverStr(RepeatVVV(&mips::MipsAssembler::XorV, "xor.v ${reg1}, ${reg2}, ${reg3}"), "xor.v");
1726 }
1727
TEST_F(AssemblerMIPS32r6Test,AddvB)1728 TEST_F(AssemblerMIPS32r6Test, AddvB) {
1729 DriverStr(RepeatVVV(&mips::MipsAssembler::AddvB, "addv.b ${reg1}, ${reg2}, ${reg3}"), "addv.b");
1730 }
1731
TEST_F(AssemblerMIPS32r6Test,AddvH)1732 TEST_F(AssemblerMIPS32r6Test, AddvH) {
1733 DriverStr(RepeatVVV(&mips::MipsAssembler::AddvH, "addv.h ${reg1}, ${reg2}, ${reg3}"), "addv.h");
1734 }
1735
TEST_F(AssemblerMIPS32r6Test,AddvW)1736 TEST_F(AssemblerMIPS32r6Test, AddvW) {
1737 DriverStr(RepeatVVV(&mips::MipsAssembler::AddvW, "addv.w ${reg1}, ${reg2}, ${reg3}"), "addv.w");
1738 }
1739
TEST_F(AssemblerMIPS32r6Test,AddvD)1740 TEST_F(AssemblerMIPS32r6Test, AddvD) {
1741 DriverStr(RepeatVVV(&mips::MipsAssembler::AddvD, "addv.d ${reg1}, ${reg2}, ${reg3}"), "addv.d");
1742 }
1743
TEST_F(AssemblerMIPS32r6Test,SubvB)1744 TEST_F(AssemblerMIPS32r6Test, SubvB) {
1745 DriverStr(RepeatVVV(&mips::MipsAssembler::SubvB, "subv.b ${reg1}, ${reg2}, ${reg3}"), "subv.b");
1746 }
1747
TEST_F(AssemblerMIPS32r6Test,SubvH)1748 TEST_F(AssemblerMIPS32r6Test, SubvH) {
1749 DriverStr(RepeatVVV(&mips::MipsAssembler::SubvH, "subv.h ${reg1}, ${reg2}, ${reg3}"), "subv.h");
1750 }
1751
TEST_F(AssemblerMIPS32r6Test,SubvW)1752 TEST_F(AssemblerMIPS32r6Test, SubvW) {
1753 DriverStr(RepeatVVV(&mips::MipsAssembler::SubvW, "subv.w ${reg1}, ${reg2}, ${reg3}"), "subv.w");
1754 }
1755
TEST_F(AssemblerMIPS32r6Test,SubvD)1756 TEST_F(AssemblerMIPS32r6Test, SubvD) {
1757 DriverStr(RepeatVVV(&mips::MipsAssembler::SubvD, "subv.d ${reg1}, ${reg2}, ${reg3}"), "subv.d");
1758 }
1759
TEST_F(AssemblerMIPS32r6Test,Asub_sB)1760 TEST_F(AssemblerMIPS32r6Test, Asub_sB) {
1761 DriverStr(RepeatVVV(&mips::MipsAssembler::Asub_sB, "asub_s.b ${reg1}, ${reg2}, ${reg3}"),
1762 "asub_s.b");
1763 }
1764
TEST_F(AssemblerMIPS32r6Test,Asub_sH)1765 TEST_F(AssemblerMIPS32r6Test, Asub_sH) {
1766 DriverStr(RepeatVVV(&mips::MipsAssembler::Asub_sH, "asub_s.h ${reg1}, ${reg2}, ${reg3}"),
1767 "asub_s.h");
1768 }
1769
TEST_F(AssemblerMIPS32r6Test,Asub_sW)1770 TEST_F(AssemblerMIPS32r6Test, Asub_sW) {
1771 DriverStr(RepeatVVV(&mips::MipsAssembler::Asub_sW, "asub_s.w ${reg1}, ${reg2}, ${reg3}"),
1772 "asub_s.w");
1773 }
1774
TEST_F(AssemblerMIPS32r6Test,Asub_sD)1775 TEST_F(AssemblerMIPS32r6Test, Asub_sD) {
1776 DriverStr(RepeatVVV(&mips::MipsAssembler::Asub_sD, "asub_s.d ${reg1}, ${reg2}, ${reg3}"),
1777 "asub_s.d");
1778 }
1779
TEST_F(AssemblerMIPS32r6Test,Asub_uB)1780 TEST_F(AssemblerMIPS32r6Test, Asub_uB) {
1781 DriverStr(RepeatVVV(&mips::MipsAssembler::Asub_uB, "asub_u.b ${reg1}, ${reg2}, ${reg3}"),
1782 "asub_u.b");
1783 }
1784
TEST_F(AssemblerMIPS32r6Test,Asub_uH)1785 TEST_F(AssemblerMIPS32r6Test, Asub_uH) {
1786 DriverStr(RepeatVVV(&mips::MipsAssembler::Asub_uH, "asub_u.h ${reg1}, ${reg2}, ${reg3}"),
1787 "asub_u.h");
1788 }
1789
TEST_F(AssemblerMIPS32r6Test,Asub_uW)1790 TEST_F(AssemblerMIPS32r6Test, Asub_uW) {
1791 DriverStr(RepeatVVV(&mips::MipsAssembler::Asub_uW, "asub_u.w ${reg1}, ${reg2}, ${reg3}"),
1792 "asub_u.w");
1793 }
1794
TEST_F(AssemblerMIPS32r6Test,Asub_uD)1795 TEST_F(AssemblerMIPS32r6Test, Asub_uD) {
1796 DriverStr(RepeatVVV(&mips::MipsAssembler::Asub_uD, "asub_u.d ${reg1}, ${reg2}, ${reg3}"),
1797 "asub_u.d");
1798 }
1799
TEST_F(AssemblerMIPS32r6Test,MulvB)1800 TEST_F(AssemblerMIPS32r6Test, MulvB) {
1801 DriverStr(RepeatVVV(&mips::MipsAssembler::MulvB, "mulv.b ${reg1}, ${reg2}, ${reg3}"), "mulv.b");
1802 }
1803
TEST_F(AssemblerMIPS32r6Test,MulvH)1804 TEST_F(AssemblerMIPS32r6Test, MulvH) {
1805 DriverStr(RepeatVVV(&mips::MipsAssembler::MulvH, "mulv.h ${reg1}, ${reg2}, ${reg3}"), "mulv.h");
1806 }
1807
TEST_F(AssemblerMIPS32r6Test,MulvW)1808 TEST_F(AssemblerMIPS32r6Test, MulvW) {
1809 DriverStr(RepeatVVV(&mips::MipsAssembler::MulvW, "mulv.w ${reg1}, ${reg2}, ${reg3}"), "mulv.w");
1810 }
1811
TEST_F(AssemblerMIPS32r6Test,MulvD)1812 TEST_F(AssemblerMIPS32r6Test, MulvD) {
1813 DriverStr(RepeatVVV(&mips::MipsAssembler::MulvD, "mulv.d ${reg1}, ${reg2}, ${reg3}"), "mulv.d");
1814 }
1815
TEST_F(AssemblerMIPS32r6Test,Div_sB)1816 TEST_F(AssemblerMIPS32r6Test, Div_sB) {
1817 DriverStr(RepeatVVV(&mips::MipsAssembler::Div_sB, "div_s.b ${reg1}, ${reg2}, ${reg3}"),
1818 "div_s.b");
1819 }
1820
TEST_F(AssemblerMIPS32r6Test,Div_sH)1821 TEST_F(AssemblerMIPS32r6Test, Div_sH) {
1822 DriverStr(RepeatVVV(&mips::MipsAssembler::Div_sH, "div_s.h ${reg1}, ${reg2}, ${reg3}"),
1823 "div_s.h");
1824 }
1825
TEST_F(AssemblerMIPS32r6Test,Div_sW)1826 TEST_F(AssemblerMIPS32r6Test, Div_sW) {
1827 DriverStr(RepeatVVV(&mips::MipsAssembler::Div_sW, "div_s.w ${reg1}, ${reg2}, ${reg3}"),
1828 "div_s.w");
1829 }
1830
TEST_F(AssemblerMIPS32r6Test,Div_sD)1831 TEST_F(AssemblerMIPS32r6Test, Div_sD) {
1832 DriverStr(RepeatVVV(&mips::MipsAssembler::Div_sD, "div_s.d ${reg1}, ${reg2}, ${reg3}"),
1833 "div_s.d");
1834 }
1835
TEST_F(AssemblerMIPS32r6Test,Div_uB)1836 TEST_F(AssemblerMIPS32r6Test, Div_uB) {
1837 DriverStr(RepeatVVV(&mips::MipsAssembler::Div_uB, "div_u.b ${reg1}, ${reg2}, ${reg3}"),
1838 "div_u.b");
1839 }
1840
TEST_F(AssemblerMIPS32r6Test,Div_uH)1841 TEST_F(AssemblerMIPS32r6Test, Div_uH) {
1842 DriverStr(RepeatVVV(&mips::MipsAssembler::Div_uH, "div_u.h ${reg1}, ${reg2}, ${reg3}"),
1843 "div_u.h");
1844 }
1845
TEST_F(AssemblerMIPS32r6Test,Div_uW)1846 TEST_F(AssemblerMIPS32r6Test, Div_uW) {
1847 DriverStr(RepeatVVV(&mips::MipsAssembler::Div_uW, "div_u.w ${reg1}, ${reg2}, ${reg3}"),
1848 "div_u.w");
1849 }
1850
TEST_F(AssemblerMIPS32r6Test,Div_uD)1851 TEST_F(AssemblerMIPS32r6Test, Div_uD) {
1852 DriverStr(RepeatVVV(&mips::MipsAssembler::Div_uD, "div_u.d ${reg1}, ${reg2}, ${reg3}"),
1853 "div_u.d");
1854 }
1855
TEST_F(AssemblerMIPS32r6Test,Mod_sB)1856 TEST_F(AssemblerMIPS32r6Test, Mod_sB) {
1857 DriverStr(RepeatVVV(&mips::MipsAssembler::Mod_sB, "mod_s.b ${reg1}, ${reg2}, ${reg3}"),
1858 "mod_s.b");
1859 }
1860
TEST_F(AssemblerMIPS32r6Test,Mod_sH)1861 TEST_F(AssemblerMIPS32r6Test, Mod_sH) {
1862 DriverStr(RepeatVVV(&mips::MipsAssembler::Mod_sH, "mod_s.h ${reg1}, ${reg2}, ${reg3}"),
1863 "mod_s.h");
1864 }
1865
TEST_F(AssemblerMIPS32r6Test,Mod_sW)1866 TEST_F(AssemblerMIPS32r6Test, Mod_sW) {
1867 DriverStr(RepeatVVV(&mips::MipsAssembler::Mod_sW, "mod_s.w ${reg1}, ${reg2}, ${reg3}"),
1868 "mod_s.w");
1869 }
1870
TEST_F(AssemblerMIPS32r6Test,Mod_sD)1871 TEST_F(AssemblerMIPS32r6Test, Mod_sD) {
1872 DriverStr(RepeatVVV(&mips::MipsAssembler::Mod_sD, "mod_s.d ${reg1}, ${reg2}, ${reg3}"),
1873 "mod_s.d");
1874 }
1875
TEST_F(AssemblerMIPS32r6Test,Mod_uB)1876 TEST_F(AssemblerMIPS32r6Test, Mod_uB) {
1877 DriverStr(RepeatVVV(&mips::MipsAssembler::Mod_uB, "mod_u.b ${reg1}, ${reg2}, ${reg3}"),
1878 "mod_u.b");
1879 }
1880
TEST_F(AssemblerMIPS32r6Test,Mod_uH)1881 TEST_F(AssemblerMIPS32r6Test, Mod_uH) {
1882 DriverStr(RepeatVVV(&mips::MipsAssembler::Mod_uH, "mod_u.h ${reg1}, ${reg2}, ${reg3}"),
1883 "mod_u.h");
1884 }
1885
TEST_F(AssemblerMIPS32r6Test,Mod_uW)1886 TEST_F(AssemblerMIPS32r6Test, Mod_uW) {
1887 DriverStr(RepeatVVV(&mips::MipsAssembler::Mod_uW, "mod_u.w ${reg1}, ${reg2}, ${reg3}"),
1888 "mod_u.w");
1889 }
1890
TEST_F(AssemblerMIPS32r6Test,Mod_uD)1891 TEST_F(AssemblerMIPS32r6Test, Mod_uD) {
1892 DriverStr(RepeatVVV(&mips::MipsAssembler::Mod_uD, "mod_u.d ${reg1}, ${reg2}, ${reg3}"),
1893 "mod_u.d");
1894 }
1895
TEST_F(AssemblerMIPS32r6Test,Add_aB)1896 TEST_F(AssemblerMIPS32r6Test, Add_aB) {
1897 DriverStr(RepeatVVV(&mips::MipsAssembler::Add_aB, "add_a.b ${reg1}, ${reg2}, ${reg3}"),
1898 "add_a.b");
1899 }
1900
TEST_F(AssemblerMIPS32r6Test,Add_aH)1901 TEST_F(AssemblerMIPS32r6Test, Add_aH) {
1902 DriverStr(RepeatVVV(&mips::MipsAssembler::Add_aH, "add_a.h ${reg1}, ${reg2}, ${reg3}"),
1903 "add_a.h");
1904 }
1905
TEST_F(AssemblerMIPS32r6Test,Add_aW)1906 TEST_F(AssemblerMIPS32r6Test, Add_aW) {
1907 DriverStr(RepeatVVV(&mips::MipsAssembler::Add_aW, "add_a.w ${reg1}, ${reg2}, ${reg3}"),
1908 "add_a.w");
1909 }
1910
TEST_F(AssemblerMIPS32r6Test,Add_aD)1911 TEST_F(AssemblerMIPS32r6Test, Add_aD) {
1912 DriverStr(RepeatVVV(&mips::MipsAssembler::Add_aD, "add_a.d ${reg1}, ${reg2}, ${reg3}"),
1913 "add_a.d");
1914 }
1915
TEST_F(AssemblerMIPS32r6Test,Ave_sB)1916 TEST_F(AssemblerMIPS32r6Test, Ave_sB) {
1917 DriverStr(RepeatVVV(&mips::MipsAssembler::Ave_sB, "ave_s.b ${reg1}, ${reg2}, ${reg3}"),
1918 "ave_s.b");
1919 }
1920
TEST_F(AssemblerMIPS32r6Test,Ave_sH)1921 TEST_F(AssemblerMIPS32r6Test, Ave_sH) {
1922 DriverStr(RepeatVVV(&mips::MipsAssembler::Ave_sH, "ave_s.h ${reg1}, ${reg2}, ${reg3}"),
1923 "ave_s.h");
1924 }
1925
TEST_F(AssemblerMIPS32r6Test,Ave_sW)1926 TEST_F(AssemblerMIPS32r6Test, Ave_sW) {
1927 DriverStr(RepeatVVV(&mips::MipsAssembler::Ave_sW, "ave_s.w ${reg1}, ${reg2}, ${reg3}"),
1928 "ave_s.w");
1929 }
1930
TEST_F(AssemblerMIPS32r6Test,Ave_sD)1931 TEST_F(AssemblerMIPS32r6Test, Ave_sD) {
1932 DriverStr(RepeatVVV(&mips::MipsAssembler::Ave_sD, "ave_s.d ${reg1}, ${reg2}, ${reg3}"),
1933 "ave_s.d");
1934 }
1935
TEST_F(AssemblerMIPS32r6Test,Ave_uB)1936 TEST_F(AssemblerMIPS32r6Test, Ave_uB) {
1937 DriverStr(RepeatVVV(&mips::MipsAssembler::Ave_uB, "ave_u.b ${reg1}, ${reg2}, ${reg3}"),
1938 "ave_u.b");
1939 }
1940
TEST_F(AssemblerMIPS32r6Test,Ave_uH)1941 TEST_F(AssemblerMIPS32r6Test, Ave_uH) {
1942 DriverStr(RepeatVVV(&mips::MipsAssembler::Ave_uH, "ave_u.h ${reg1}, ${reg2}, ${reg3}"),
1943 "ave_u.h");
1944 }
1945
TEST_F(AssemblerMIPS32r6Test,Ave_uW)1946 TEST_F(AssemblerMIPS32r6Test, Ave_uW) {
1947 DriverStr(RepeatVVV(&mips::MipsAssembler::Ave_uW, "ave_u.w ${reg1}, ${reg2}, ${reg3}"),
1948 "ave_u.w");
1949 }
1950
TEST_F(AssemblerMIPS32r6Test,Ave_uD)1951 TEST_F(AssemblerMIPS32r6Test, Ave_uD) {
1952 DriverStr(RepeatVVV(&mips::MipsAssembler::Ave_uD, "ave_u.d ${reg1}, ${reg2}, ${reg3}"),
1953 "ave_u.d");
1954 }
1955
TEST_F(AssemblerMIPS32r6Test,Aver_sB)1956 TEST_F(AssemblerMIPS32r6Test, Aver_sB) {
1957 DriverStr(RepeatVVV(&mips::MipsAssembler::Aver_sB, "aver_s.b ${reg1}, ${reg2}, ${reg3}"),
1958 "aver_s.b");
1959 }
1960
TEST_F(AssemblerMIPS32r6Test,Aver_sH)1961 TEST_F(AssemblerMIPS32r6Test, Aver_sH) {
1962 DriverStr(RepeatVVV(&mips::MipsAssembler::Aver_sH, "aver_s.h ${reg1}, ${reg2}, ${reg3}"),
1963 "aver_s.h");
1964 }
1965
TEST_F(AssemblerMIPS32r6Test,Aver_sW)1966 TEST_F(AssemblerMIPS32r6Test, Aver_sW) {
1967 DriverStr(RepeatVVV(&mips::MipsAssembler::Aver_sW, "aver_s.w ${reg1}, ${reg2}, ${reg3}"),
1968 "aver_s.w");
1969 }
1970
TEST_F(AssemblerMIPS32r6Test,Aver_sD)1971 TEST_F(AssemblerMIPS32r6Test, Aver_sD) {
1972 DriverStr(RepeatVVV(&mips::MipsAssembler::Aver_sD, "aver_s.d ${reg1}, ${reg2}, ${reg3}"),
1973 "aver_s.d");
1974 }
1975
TEST_F(AssemblerMIPS32r6Test,Aver_uB)1976 TEST_F(AssemblerMIPS32r6Test, Aver_uB) {
1977 DriverStr(RepeatVVV(&mips::MipsAssembler::Aver_uB, "aver_u.b ${reg1}, ${reg2}, ${reg3}"),
1978 "aver_u.b");
1979 }
1980
TEST_F(AssemblerMIPS32r6Test,Aver_uH)1981 TEST_F(AssemblerMIPS32r6Test, Aver_uH) {
1982 DriverStr(RepeatVVV(&mips::MipsAssembler::Aver_uH, "aver_u.h ${reg1}, ${reg2}, ${reg3}"),
1983 "aver_u.h");
1984 }
1985
TEST_F(AssemblerMIPS32r6Test,Aver_uW)1986 TEST_F(AssemblerMIPS32r6Test, Aver_uW) {
1987 DriverStr(RepeatVVV(&mips::MipsAssembler::Aver_uW, "aver_u.w ${reg1}, ${reg2}, ${reg3}"),
1988 "aver_u.w");
1989 }
1990
TEST_F(AssemblerMIPS32r6Test,Aver_uD)1991 TEST_F(AssemblerMIPS32r6Test, Aver_uD) {
1992 DriverStr(RepeatVVV(&mips::MipsAssembler::Aver_uD, "aver_u.d ${reg1}, ${reg2}, ${reg3}"),
1993 "aver_u.d");
1994 }
1995
TEST_F(AssemblerMIPS32r6Test,Max_sB)1996 TEST_F(AssemblerMIPS32r6Test, Max_sB) {
1997 DriverStr(RepeatVVV(&mips::MipsAssembler::Max_sB, "max_s.b ${reg1}, ${reg2}, ${reg3}"),
1998 "max_s.b");
1999 }
2000
TEST_F(AssemblerMIPS32r6Test,Max_sH)2001 TEST_F(AssemblerMIPS32r6Test, Max_sH) {
2002 DriverStr(RepeatVVV(&mips::MipsAssembler::Max_sH, "max_s.h ${reg1}, ${reg2}, ${reg3}"),
2003 "max_s.h");
2004 }
2005
TEST_F(AssemblerMIPS32r6Test,Max_sW)2006 TEST_F(AssemblerMIPS32r6Test, Max_sW) {
2007 DriverStr(RepeatVVV(&mips::MipsAssembler::Max_sW, "max_s.w ${reg1}, ${reg2}, ${reg3}"),
2008 "max_s.w");
2009 }
2010
TEST_F(AssemblerMIPS32r6Test,Max_sD)2011 TEST_F(AssemblerMIPS32r6Test, Max_sD) {
2012 DriverStr(RepeatVVV(&mips::MipsAssembler::Max_sD, "max_s.d ${reg1}, ${reg2}, ${reg3}"),
2013 "max_s.d");
2014 }
2015
TEST_F(AssemblerMIPS32r6Test,Max_uB)2016 TEST_F(AssemblerMIPS32r6Test, Max_uB) {
2017 DriverStr(RepeatVVV(&mips::MipsAssembler::Max_uB, "max_u.b ${reg1}, ${reg2}, ${reg3}"),
2018 "max_u.b");
2019 }
2020
TEST_F(AssemblerMIPS32r6Test,Max_uH)2021 TEST_F(AssemblerMIPS32r6Test, Max_uH) {
2022 DriverStr(RepeatVVV(&mips::MipsAssembler::Max_uH, "max_u.h ${reg1}, ${reg2}, ${reg3}"),
2023 "max_u.h");
2024 }
2025
TEST_F(AssemblerMIPS32r6Test,Max_uW)2026 TEST_F(AssemblerMIPS32r6Test, Max_uW) {
2027 DriverStr(RepeatVVV(&mips::MipsAssembler::Max_uW, "max_u.w ${reg1}, ${reg2}, ${reg3}"),
2028 "max_u.w");
2029 }
2030
TEST_F(AssemblerMIPS32r6Test,Max_uD)2031 TEST_F(AssemblerMIPS32r6Test, Max_uD) {
2032 DriverStr(RepeatVVV(&mips::MipsAssembler::Max_uD, "max_u.d ${reg1}, ${reg2}, ${reg3}"),
2033 "max_u.d");
2034 }
2035
TEST_F(AssemblerMIPS32r6Test,Min_sB)2036 TEST_F(AssemblerMIPS32r6Test, Min_sB) {
2037 DriverStr(RepeatVVV(&mips::MipsAssembler::Min_sB, "min_s.b ${reg1}, ${reg2}, ${reg3}"),
2038 "min_s.b");
2039 }
2040
TEST_F(AssemblerMIPS32r6Test,Min_sH)2041 TEST_F(AssemblerMIPS32r6Test, Min_sH) {
2042 DriverStr(RepeatVVV(&mips::MipsAssembler::Min_sH, "min_s.h ${reg1}, ${reg2}, ${reg3}"),
2043 "min_s.h");
2044 }
2045
TEST_F(AssemblerMIPS32r6Test,Min_sW)2046 TEST_F(AssemblerMIPS32r6Test, Min_sW) {
2047 DriverStr(RepeatVVV(&mips::MipsAssembler::Min_sW, "min_s.w ${reg1}, ${reg2}, ${reg3}"),
2048 "min_s.w");
2049 }
2050
TEST_F(AssemblerMIPS32r6Test,Min_sD)2051 TEST_F(AssemblerMIPS32r6Test, Min_sD) {
2052 DriverStr(RepeatVVV(&mips::MipsAssembler::Min_sD, "min_s.d ${reg1}, ${reg2}, ${reg3}"),
2053 "min_s.d");
2054 }
2055
TEST_F(AssemblerMIPS32r6Test,Min_uB)2056 TEST_F(AssemblerMIPS32r6Test, Min_uB) {
2057 DriverStr(RepeatVVV(&mips::MipsAssembler::Min_uB, "min_u.b ${reg1}, ${reg2}, ${reg3}"),
2058 "min_u.b");
2059 }
2060
TEST_F(AssemblerMIPS32r6Test,Min_uH)2061 TEST_F(AssemblerMIPS32r6Test, Min_uH) {
2062 DriverStr(RepeatVVV(&mips::MipsAssembler::Min_uH, "min_u.h ${reg1}, ${reg2}, ${reg3}"),
2063 "min_u.h");
2064 }
2065
TEST_F(AssemblerMIPS32r6Test,Min_uW)2066 TEST_F(AssemblerMIPS32r6Test, Min_uW) {
2067 DriverStr(RepeatVVV(&mips::MipsAssembler::Min_uW, "min_u.w ${reg1}, ${reg2}, ${reg3}"),
2068 "min_u.w");
2069 }
2070
TEST_F(AssemblerMIPS32r6Test,Min_uD)2071 TEST_F(AssemblerMIPS32r6Test, Min_uD) {
2072 DriverStr(RepeatVVV(&mips::MipsAssembler::Min_uD, "min_u.d ${reg1}, ${reg2}, ${reg3}"),
2073 "min_u.d");
2074 }
2075
TEST_F(AssemblerMIPS32r6Test,FaddW)2076 TEST_F(AssemblerMIPS32r6Test, FaddW) {
2077 DriverStr(RepeatVVV(&mips::MipsAssembler::FaddW, "fadd.w ${reg1}, ${reg2}, ${reg3}"), "fadd.w");
2078 }
2079
TEST_F(AssemblerMIPS32r6Test,FaddD)2080 TEST_F(AssemblerMIPS32r6Test, FaddD) {
2081 DriverStr(RepeatVVV(&mips::MipsAssembler::FaddD, "fadd.d ${reg1}, ${reg2}, ${reg3}"), "fadd.d");
2082 }
2083
TEST_F(AssemblerMIPS32r6Test,FsubW)2084 TEST_F(AssemblerMIPS32r6Test, FsubW) {
2085 DriverStr(RepeatVVV(&mips::MipsAssembler::FsubW, "fsub.w ${reg1}, ${reg2}, ${reg3}"), "fsub.w");
2086 }
2087
TEST_F(AssemblerMIPS32r6Test,FsubD)2088 TEST_F(AssemblerMIPS32r6Test, FsubD) {
2089 DriverStr(RepeatVVV(&mips::MipsAssembler::FsubD, "fsub.d ${reg1}, ${reg2}, ${reg3}"), "fsub.d");
2090 }
2091
TEST_F(AssemblerMIPS32r6Test,FmulW)2092 TEST_F(AssemblerMIPS32r6Test, FmulW) {
2093 DriverStr(RepeatVVV(&mips::MipsAssembler::FmulW, "fmul.w ${reg1}, ${reg2}, ${reg3}"), "fmul.w");
2094 }
2095
TEST_F(AssemblerMIPS32r6Test,FmulD)2096 TEST_F(AssemblerMIPS32r6Test, FmulD) {
2097 DriverStr(RepeatVVV(&mips::MipsAssembler::FmulD, "fmul.d ${reg1}, ${reg2}, ${reg3}"), "fmul.d");
2098 }
2099
TEST_F(AssemblerMIPS32r6Test,FdivW)2100 TEST_F(AssemblerMIPS32r6Test, FdivW) {
2101 DriverStr(RepeatVVV(&mips::MipsAssembler::FdivW, "fdiv.w ${reg1}, ${reg2}, ${reg3}"), "fdiv.w");
2102 }
2103
TEST_F(AssemblerMIPS32r6Test,FdivD)2104 TEST_F(AssemblerMIPS32r6Test, FdivD) {
2105 DriverStr(RepeatVVV(&mips::MipsAssembler::FdivD, "fdiv.d ${reg1}, ${reg2}, ${reg3}"), "fdiv.d");
2106 }
2107
TEST_F(AssemblerMIPS32r6Test,FmaxW)2108 TEST_F(AssemblerMIPS32r6Test, FmaxW) {
2109 DriverStr(RepeatVVV(&mips::MipsAssembler::FmaxW, "fmax.w ${reg1}, ${reg2}, ${reg3}"), "fmax.w");
2110 }
2111
TEST_F(AssemblerMIPS32r6Test,FmaxD)2112 TEST_F(AssemblerMIPS32r6Test, FmaxD) {
2113 DriverStr(RepeatVVV(&mips::MipsAssembler::FmaxD, "fmax.d ${reg1}, ${reg2}, ${reg3}"), "fmax.d");
2114 }
2115
TEST_F(AssemblerMIPS32r6Test,FminW)2116 TEST_F(AssemblerMIPS32r6Test, FminW) {
2117 DriverStr(RepeatVVV(&mips::MipsAssembler::FminW, "fmin.w ${reg1}, ${reg2}, ${reg3}"), "fmin.w");
2118 }
2119
TEST_F(AssemblerMIPS32r6Test,FminD)2120 TEST_F(AssemblerMIPS32r6Test, FminD) {
2121 DriverStr(RepeatVVV(&mips::MipsAssembler::FminD, "fmin.d ${reg1}, ${reg2}, ${reg3}"), "fmin.d");
2122 }
2123
TEST_F(AssemblerMIPS32r6Test,Ffint_sW)2124 TEST_F(AssemblerMIPS32r6Test, Ffint_sW) {
2125 DriverStr(RepeatVV(&mips::MipsAssembler::Ffint_sW, "ffint_s.w ${reg1}, ${reg2}"), "ffint_s.w");
2126 }
2127
TEST_F(AssemblerMIPS32r6Test,Ffint_sD)2128 TEST_F(AssemblerMIPS32r6Test, Ffint_sD) {
2129 DriverStr(RepeatVV(&mips::MipsAssembler::Ffint_sD, "ffint_s.d ${reg1}, ${reg2}"), "ffint_s.d");
2130 }
2131
TEST_F(AssemblerMIPS32r6Test,Ftint_sW)2132 TEST_F(AssemblerMIPS32r6Test, Ftint_sW) {
2133 DriverStr(RepeatVV(&mips::MipsAssembler::Ftint_sW, "ftint_s.w ${reg1}, ${reg2}"), "ftint_s.w");
2134 }
2135
TEST_F(AssemblerMIPS32r6Test,Ftint_sD)2136 TEST_F(AssemblerMIPS32r6Test, Ftint_sD) {
2137 DriverStr(RepeatVV(&mips::MipsAssembler::Ftint_sD, "ftint_s.d ${reg1}, ${reg2}"), "ftint_s.d");
2138 }
2139
TEST_F(AssemblerMIPS32r6Test,SllB)2140 TEST_F(AssemblerMIPS32r6Test, SllB) {
2141 DriverStr(RepeatVVV(&mips::MipsAssembler::SllB, "sll.b ${reg1}, ${reg2}, ${reg3}"), "sll.b");
2142 }
2143
TEST_F(AssemblerMIPS32r6Test,SllH)2144 TEST_F(AssemblerMIPS32r6Test, SllH) {
2145 DriverStr(RepeatVVV(&mips::MipsAssembler::SllH, "sll.h ${reg1}, ${reg2}, ${reg3}"), "sll.h");
2146 }
2147
TEST_F(AssemblerMIPS32r6Test,SllW)2148 TEST_F(AssemblerMIPS32r6Test, SllW) {
2149 DriverStr(RepeatVVV(&mips::MipsAssembler::SllW, "sll.w ${reg1}, ${reg2}, ${reg3}"), "sll.w");
2150 }
2151
TEST_F(AssemblerMIPS32r6Test,SllD)2152 TEST_F(AssemblerMIPS32r6Test, SllD) {
2153 DriverStr(RepeatVVV(&mips::MipsAssembler::SllD, "sll.d ${reg1}, ${reg2}, ${reg3}"), "sll.d");
2154 }
2155
TEST_F(AssemblerMIPS32r6Test,SraB)2156 TEST_F(AssemblerMIPS32r6Test, SraB) {
2157 DriverStr(RepeatVVV(&mips::MipsAssembler::SraB, "sra.b ${reg1}, ${reg2}, ${reg3}"), "sra.b");
2158 }
2159
TEST_F(AssemblerMIPS32r6Test,SraH)2160 TEST_F(AssemblerMIPS32r6Test, SraH) {
2161 DriverStr(RepeatVVV(&mips::MipsAssembler::SraH, "sra.h ${reg1}, ${reg2}, ${reg3}"), "sra.h");
2162 }
2163
TEST_F(AssemblerMIPS32r6Test,SraW)2164 TEST_F(AssemblerMIPS32r6Test, SraW) {
2165 DriverStr(RepeatVVV(&mips::MipsAssembler::SraW, "sra.w ${reg1}, ${reg2}, ${reg3}"), "sra.w");
2166 }
2167
TEST_F(AssemblerMIPS32r6Test,SraD)2168 TEST_F(AssemblerMIPS32r6Test, SraD) {
2169 DriverStr(RepeatVVV(&mips::MipsAssembler::SraD, "sra.d ${reg1}, ${reg2}, ${reg3}"), "sra.d");
2170 }
2171
TEST_F(AssemblerMIPS32r6Test,SrlB)2172 TEST_F(AssemblerMIPS32r6Test, SrlB) {
2173 DriverStr(RepeatVVV(&mips::MipsAssembler::SrlB, "srl.b ${reg1}, ${reg2}, ${reg3}"), "srl.b");
2174 }
2175
TEST_F(AssemblerMIPS32r6Test,SrlH)2176 TEST_F(AssemblerMIPS32r6Test, SrlH) {
2177 DriverStr(RepeatVVV(&mips::MipsAssembler::SrlH, "srl.h ${reg1}, ${reg2}, ${reg3}"), "srl.h");
2178 }
2179
TEST_F(AssemblerMIPS32r6Test,SrlW)2180 TEST_F(AssemblerMIPS32r6Test, SrlW) {
2181 DriverStr(RepeatVVV(&mips::MipsAssembler::SrlW, "srl.w ${reg1}, ${reg2}, ${reg3}"), "srl.w");
2182 }
2183
TEST_F(AssemblerMIPS32r6Test,SrlD)2184 TEST_F(AssemblerMIPS32r6Test, SrlD) {
2185 DriverStr(RepeatVVV(&mips::MipsAssembler::SrlD, "srl.d ${reg1}, ${reg2}, ${reg3}"), "srl.d");
2186 }
2187
TEST_F(AssemblerMIPS32r6Test,SlliB)2188 TEST_F(AssemblerMIPS32r6Test, SlliB) {
2189 DriverStr(RepeatVVIb(&mips::MipsAssembler::SlliB, 3, "slli.b ${reg1}, ${reg2}, {imm}"), "slli.b");
2190 }
2191
TEST_F(AssemblerMIPS32r6Test,SlliH)2192 TEST_F(AssemblerMIPS32r6Test, SlliH) {
2193 DriverStr(RepeatVVIb(&mips::MipsAssembler::SlliH, 4, "slli.h ${reg1}, ${reg2}, {imm}"), "slli.h");
2194 }
2195
TEST_F(AssemblerMIPS32r6Test,SlliW)2196 TEST_F(AssemblerMIPS32r6Test, SlliW) {
2197 DriverStr(RepeatVVIb(&mips::MipsAssembler::SlliW, 5, "slli.w ${reg1}, ${reg2}, {imm}"), "slli.w");
2198 }
2199
TEST_F(AssemblerMIPS32r6Test,SlliD)2200 TEST_F(AssemblerMIPS32r6Test, SlliD) {
2201 DriverStr(RepeatVVIb(&mips::MipsAssembler::SlliD, 6, "slli.d ${reg1}, ${reg2}, {imm}"), "slli.d");
2202 }
2203
TEST_F(AssemblerMIPS32r6Test,MoveV)2204 TEST_F(AssemblerMIPS32r6Test, MoveV) {
2205 DriverStr(RepeatVV(&mips::MipsAssembler::MoveV, "move.v ${reg1}, ${reg2}"), "move.v");
2206 }
2207
TEST_F(AssemblerMIPS32r6Test,SplatiB)2208 TEST_F(AssemblerMIPS32r6Test, SplatiB) {
2209 DriverStr(RepeatVVIb(&mips::MipsAssembler::SplatiB, 4, "splati.b ${reg1}, ${reg2}[{imm}]"),
2210 "splati.b");
2211 }
2212
TEST_F(AssemblerMIPS32r6Test,SplatiH)2213 TEST_F(AssemblerMIPS32r6Test, SplatiH) {
2214 DriverStr(RepeatVVIb(&mips::MipsAssembler::SplatiH, 3, "splati.h ${reg1}, ${reg2}[{imm}]"),
2215 "splati.h");
2216 }
2217
TEST_F(AssemblerMIPS32r6Test,SplatiW)2218 TEST_F(AssemblerMIPS32r6Test, SplatiW) {
2219 DriverStr(RepeatVVIb(&mips::MipsAssembler::SplatiW, 2, "splati.w ${reg1}, ${reg2}[{imm}]"),
2220 "splati.w");
2221 }
2222
TEST_F(AssemblerMIPS32r6Test,SplatiD)2223 TEST_F(AssemblerMIPS32r6Test, SplatiD) {
2224 DriverStr(RepeatVVIb(&mips::MipsAssembler::SplatiD, 1, "splati.d ${reg1}, ${reg2}[{imm}]"),
2225 "splati.d");
2226 }
2227
TEST_F(AssemblerMIPS32r6Test,Copy_sB)2228 TEST_F(AssemblerMIPS32r6Test, Copy_sB) {
2229 DriverStr(RepeatRVIb(&mips::MipsAssembler::Copy_sB, 4, "copy_s.b ${reg1}, ${reg2}[{imm}]"),
2230 "copy_s.b");
2231 }
2232
TEST_F(AssemblerMIPS32r6Test,Copy_sH)2233 TEST_F(AssemblerMIPS32r6Test, Copy_sH) {
2234 DriverStr(RepeatRVIb(&mips::MipsAssembler::Copy_sH, 3, "copy_s.h ${reg1}, ${reg2}[{imm}]"),
2235 "copy_s.h");
2236 }
2237
TEST_F(AssemblerMIPS32r6Test,Copy_sW)2238 TEST_F(AssemblerMIPS32r6Test, Copy_sW) {
2239 DriverStr(RepeatRVIb(&mips::MipsAssembler::Copy_sW, 2, "copy_s.w ${reg1}, ${reg2}[{imm}]"),
2240 "copy_s.w");
2241 }
2242
TEST_F(AssemblerMIPS32r6Test,Copy_uB)2243 TEST_F(AssemblerMIPS32r6Test, Copy_uB) {
2244 DriverStr(RepeatRVIb(&mips::MipsAssembler::Copy_uB, 4, "copy_u.b ${reg1}, ${reg2}[{imm}]"),
2245 "copy_u.b");
2246 }
2247
TEST_F(AssemblerMIPS32r6Test,Copy_uH)2248 TEST_F(AssemblerMIPS32r6Test, Copy_uH) {
2249 DriverStr(RepeatRVIb(&mips::MipsAssembler::Copy_uH, 3, "copy_u.h ${reg1}, ${reg2}[{imm}]"),
2250 "copy_u.h");
2251 }
2252
TEST_F(AssemblerMIPS32r6Test,InsertB)2253 TEST_F(AssemblerMIPS32r6Test, InsertB) {
2254 DriverStr(RepeatVRIb(&mips::MipsAssembler::InsertB, 4, "insert.b ${reg1}[{imm}], ${reg2}"),
2255 "insert.b");
2256 }
2257
TEST_F(AssemblerMIPS32r6Test,InsertH)2258 TEST_F(AssemblerMIPS32r6Test, InsertH) {
2259 DriverStr(RepeatVRIb(&mips::MipsAssembler::InsertH, 3, "insert.h ${reg1}[{imm}], ${reg2}"),
2260 "insert.h");
2261 }
2262
TEST_F(AssemblerMIPS32r6Test,InsertW)2263 TEST_F(AssemblerMIPS32r6Test, InsertW) {
2264 DriverStr(RepeatVRIb(&mips::MipsAssembler::InsertW, 2, "insert.w ${reg1}[{imm}], ${reg2}"),
2265 "insert.w");
2266 }
2267
TEST_F(AssemblerMIPS32r6Test,FillB)2268 TEST_F(AssemblerMIPS32r6Test, FillB) {
2269 DriverStr(RepeatVR(&mips::MipsAssembler::FillB, "fill.b ${reg1}, ${reg2}"), "fill.b");
2270 }
2271
TEST_F(AssemblerMIPS32r6Test,FillH)2272 TEST_F(AssemblerMIPS32r6Test, FillH) {
2273 DriverStr(RepeatVR(&mips::MipsAssembler::FillH, "fill.h ${reg1}, ${reg2}"), "fill.h");
2274 }
2275
TEST_F(AssemblerMIPS32r6Test,FillW)2276 TEST_F(AssemblerMIPS32r6Test, FillW) {
2277 DriverStr(RepeatVR(&mips::MipsAssembler::FillW, "fill.w ${reg1}, ${reg2}"), "fill.w");
2278 }
2279
TEST_F(AssemblerMIPS32r6Test,LdiB)2280 TEST_F(AssemblerMIPS32r6Test, LdiB) {
2281 DriverStr(RepeatVIb(&mips::MipsAssembler::LdiB, -8, "ldi.b ${reg}, {imm}"), "ldi.b");
2282 }
2283
TEST_F(AssemblerMIPS32r6Test,LdiH)2284 TEST_F(AssemblerMIPS32r6Test, LdiH) {
2285 DriverStr(RepeatVIb(&mips::MipsAssembler::LdiH, -10, "ldi.h ${reg}, {imm}"), "ldi.h");
2286 }
2287
TEST_F(AssemblerMIPS32r6Test,LdiW)2288 TEST_F(AssemblerMIPS32r6Test, LdiW) {
2289 DriverStr(RepeatVIb(&mips::MipsAssembler::LdiW, -10, "ldi.w ${reg}, {imm}"), "ldi.w");
2290 }
2291
TEST_F(AssemblerMIPS32r6Test,LdiD)2292 TEST_F(AssemblerMIPS32r6Test, LdiD) {
2293 DriverStr(RepeatVIb(&mips::MipsAssembler::LdiD, -10, "ldi.d ${reg}, {imm}"), "ldi.d");
2294 }
2295
TEST_F(AssemblerMIPS32r6Test,LdB)2296 TEST_F(AssemblerMIPS32r6Test, LdB) {
2297 DriverStr(RepeatVRIb(&mips::MipsAssembler::LdB, -10, "ld.b ${reg1}, {imm}(${reg2})"), "ld.b");
2298 }
2299
TEST_F(AssemblerMIPS32r6Test,LdH)2300 TEST_F(AssemblerMIPS32r6Test, LdH) {
2301 DriverStr(RepeatVRIb(&mips::MipsAssembler::LdH, -10, "ld.h ${reg1}, {imm}(${reg2})", 0, 2),
2302 "ld.h");
2303 }
2304
TEST_F(AssemblerMIPS32r6Test,LdW)2305 TEST_F(AssemblerMIPS32r6Test, LdW) {
2306 DriverStr(RepeatVRIb(&mips::MipsAssembler::LdW, -10, "ld.w ${reg1}, {imm}(${reg2})", 0, 4),
2307 "ld.w");
2308 }
2309
TEST_F(AssemblerMIPS32r6Test,LdD)2310 TEST_F(AssemblerMIPS32r6Test, LdD) {
2311 DriverStr(RepeatVRIb(&mips::MipsAssembler::LdD, -10, "ld.d ${reg1}, {imm}(${reg2})", 0, 8),
2312 "ld.d");
2313 }
2314
TEST_F(AssemblerMIPS32r6Test,StB)2315 TEST_F(AssemblerMIPS32r6Test, StB) {
2316 DriverStr(RepeatVRIb(&mips::MipsAssembler::StB, -10, "st.b ${reg1}, {imm}(${reg2})"), "st.b");
2317 }
2318
TEST_F(AssemblerMIPS32r6Test,StH)2319 TEST_F(AssemblerMIPS32r6Test, StH) {
2320 DriverStr(RepeatVRIb(&mips::MipsAssembler::StH, -10, "st.h ${reg1}, {imm}(${reg2})", 0, 2),
2321 "st.h");
2322 }
2323
TEST_F(AssemblerMIPS32r6Test,StW)2324 TEST_F(AssemblerMIPS32r6Test, StW) {
2325 DriverStr(RepeatVRIb(&mips::MipsAssembler::StW, -10, "st.w ${reg1}, {imm}(${reg2})", 0, 4),
2326 "st.w");
2327 }
2328
TEST_F(AssemblerMIPS32r6Test,StD)2329 TEST_F(AssemblerMIPS32r6Test, StD) {
2330 DriverStr(RepeatVRIb(&mips::MipsAssembler::StD, -10, "st.d ${reg1}, {imm}(${reg2})", 0, 8),
2331 "st.d");
2332 }
2333
TEST_F(AssemblerMIPS32r6Test,IlvlB)2334 TEST_F(AssemblerMIPS32r6Test, IlvlB) {
2335 DriverStr(RepeatVVV(&mips::MipsAssembler::IlvlB, "ilvl.b ${reg1}, ${reg2}, ${reg3}"), "ilvl.b");
2336 }
2337
TEST_F(AssemblerMIPS32r6Test,IlvlH)2338 TEST_F(AssemblerMIPS32r6Test, IlvlH) {
2339 DriverStr(RepeatVVV(&mips::MipsAssembler::IlvlH, "ilvl.h ${reg1}, ${reg2}, ${reg3}"), "ilvl.h");
2340 }
2341
TEST_F(AssemblerMIPS32r6Test,IlvlW)2342 TEST_F(AssemblerMIPS32r6Test, IlvlW) {
2343 DriverStr(RepeatVVV(&mips::MipsAssembler::IlvlW, "ilvl.w ${reg1}, ${reg2}, ${reg3}"), "ilvl.w");
2344 }
2345
TEST_F(AssemblerMIPS32r6Test,IlvlD)2346 TEST_F(AssemblerMIPS32r6Test, IlvlD) {
2347 DriverStr(RepeatVVV(&mips::MipsAssembler::IlvlD, "ilvl.d ${reg1}, ${reg2}, ${reg3}"), "ilvl.d");
2348 }
2349
TEST_F(AssemblerMIPS32r6Test,IlvrB)2350 TEST_F(AssemblerMIPS32r6Test, IlvrB) {
2351 DriverStr(RepeatVVV(&mips::MipsAssembler::IlvrB, "ilvr.b ${reg1}, ${reg2}, ${reg3}"), "ilvr.b");
2352 }
2353
TEST_F(AssemblerMIPS32r6Test,IlvrH)2354 TEST_F(AssemblerMIPS32r6Test, IlvrH) {
2355 DriverStr(RepeatVVV(&mips::MipsAssembler::IlvrH, "ilvr.h ${reg1}, ${reg2}, ${reg3}"), "ilvr.h");
2356 }
2357
TEST_F(AssemblerMIPS32r6Test,IlvrW)2358 TEST_F(AssemblerMIPS32r6Test, IlvrW) {
2359 DriverStr(RepeatVVV(&mips::MipsAssembler::IlvrW, "ilvr.w ${reg1}, ${reg2}, ${reg3}"), "ilvr.w");
2360 }
2361
TEST_F(AssemblerMIPS32r6Test,IlvrD)2362 TEST_F(AssemblerMIPS32r6Test, IlvrD) {
2363 DriverStr(RepeatVVV(&mips::MipsAssembler::IlvrD, "ilvr.d ${reg1}, ${reg2}, ${reg3}"), "ilvr.d");
2364 }
2365
TEST_F(AssemblerMIPS32r6Test,IlvevB)2366 TEST_F(AssemblerMIPS32r6Test, IlvevB) {
2367 DriverStr(RepeatVVV(&mips::MipsAssembler::IlvevB, "ilvev.b ${reg1}, ${reg2}, ${reg3}"),
2368 "ilvev.b");
2369 }
2370
TEST_F(AssemblerMIPS32r6Test,IlvevH)2371 TEST_F(AssemblerMIPS32r6Test, IlvevH) {
2372 DriverStr(RepeatVVV(&mips::MipsAssembler::IlvevH, "ilvev.h ${reg1}, ${reg2}, ${reg3}"),
2373 "ilvev.h");
2374 }
2375
TEST_F(AssemblerMIPS32r6Test,IlvevW)2376 TEST_F(AssemblerMIPS32r6Test, IlvevW) {
2377 DriverStr(RepeatVVV(&mips::MipsAssembler::IlvevW, "ilvev.w ${reg1}, ${reg2}, ${reg3}"),
2378 "ilvev.w");
2379 }
2380
TEST_F(AssemblerMIPS32r6Test,IlvevD)2381 TEST_F(AssemblerMIPS32r6Test, IlvevD) {
2382 DriverStr(RepeatVVV(&mips::MipsAssembler::IlvevD, "ilvev.d ${reg1}, ${reg2}, ${reg3}"),
2383 "ilvev.d");
2384 }
2385
TEST_F(AssemblerMIPS32r6Test,IlvodB)2386 TEST_F(AssemblerMIPS32r6Test, IlvodB) {
2387 DriverStr(RepeatVVV(&mips::MipsAssembler::IlvodB, "ilvod.b ${reg1}, ${reg2}, ${reg3}"),
2388 "ilvod.b");
2389 }
2390
TEST_F(AssemblerMIPS32r6Test,IlvodH)2391 TEST_F(AssemblerMIPS32r6Test, IlvodH) {
2392 DriverStr(RepeatVVV(&mips::MipsAssembler::IlvodH, "ilvod.h ${reg1}, ${reg2}, ${reg3}"),
2393 "ilvod.h");
2394 }
2395
TEST_F(AssemblerMIPS32r6Test,IlvodW)2396 TEST_F(AssemblerMIPS32r6Test, IlvodW) {
2397 DriverStr(RepeatVVV(&mips::MipsAssembler::IlvodW, "ilvod.w ${reg1}, ${reg2}, ${reg3}"),
2398 "ilvod.w");
2399 }
2400
TEST_F(AssemblerMIPS32r6Test,IlvodD)2401 TEST_F(AssemblerMIPS32r6Test, IlvodD) {
2402 DriverStr(RepeatVVV(&mips::MipsAssembler::IlvodD, "ilvod.d ${reg1}, ${reg2}, ${reg3}"),
2403 "ilvod.d");
2404 }
2405
TEST_F(AssemblerMIPS32r6Test,MaddvB)2406 TEST_F(AssemblerMIPS32r6Test, MaddvB) {
2407 DriverStr(RepeatVVV(&mips::MipsAssembler::MaddvB, "maddv.b ${reg1}, ${reg2}, ${reg3}"),
2408 "maddv.b");
2409 }
2410
TEST_F(AssemblerMIPS32r6Test,MaddvH)2411 TEST_F(AssemblerMIPS32r6Test, MaddvH) {
2412 DriverStr(RepeatVVV(&mips::MipsAssembler::MaddvH, "maddv.h ${reg1}, ${reg2}, ${reg3}"),
2413 "maddv.h");
2414 }
2415
TEST_F(AssemblerMIPS32r6Test,MaddvW)2416 TEST_F(AssemblerMIPS32r6Test, MaddvW) {
2417 DriverStr(RepeatVVV(&mips::MipsAssembler::MaddvW, "maddv.w ${reg1}, ${reg2}, ${reg3}"),
2418 "maddv.w");
2419 }
2420
TEST_F(AssemblerMIPS32r6Test,MaddvD)2421 TEST_F(AssemblerMIPS32r6Test, MaddvD) {
2422 DriverStr(RepeatVVV(&mips::MipsAssembler::MaddvD, "maddv.d ${reg1}, ${reg2}, ${reg3}"),
2423 "maddv.d");
2424 }
2425
TEST_F(AssemblerMIPS32r6Test,Hadd_sH)2426 TEST_F(AssemblerMIPS32r6Test, Hadd_sH) {
2427 DriverStr(RepeatVVV(&mips::MipsAssembler::Hadd_sH, "hadd_s.h ${reg1}, ${reg2}, ${reg3}"),
2428 "hadd_s.h");
2429 }
2430
TEST_F(AssemblerMIPS32r6Test,Hadd_sW)2431 TEST_F(AssemblerMIPS32r6Test, Hadd_sW) {
2432 DriverStr(RepeatVVV(&mips::MipsAssembler::Hadd_sW, "hadd_s.w ${reg1}, ${reg2}, ${reg3}"),
2433 "hadd_s.w");
2434 }
2435
TEST_F(AssemblerMIPS32r6Test,Hadd_sD)2436 TEST_F(AssemblerMIPS32r6Test, Hadd_sD) {
2437 DriverStr(RepeatVVV(&mips::MipsAssembler::Hadd_sD, "hadd_s.d ${reg1}, ${reg2}, ${reg3}"),
2438 "hadd_s.d");
2439 }
2440
TEST_F(AssemblerMIPS32r6Test,Hadd_uH)2441 TEST_F(AssemblerMIPS32r6Test, Hadd_uH) {
2442 DriverStr(RepeatVVV(&mips::MipsAssembler::Hadd_uH, "hadd_u.h ${reg1}, ${reg2}, ${reg3}"),
2443 "hadd_u.h");
2444 }
2445
TEST_F(AssemblerMIPS32r6Test,Hadd_uW)2446 TEST_F(AssemblerMIPS32r6Test, Hadd_uW) {
2447 DriverStr(RepeatVVV(&mips::MipsAssembler::Hadd_uW, "hadd_u.w ${reg1}, ${reg2}, ${reg3}"),
2448 "hadd_u.w");
2449 }
2450
TEST_F(AssemblerMIPS32r6Test,Hadd_uD)2451 TEST_F(AssemblerMIPS32r6Test, Hadd_uD) {
2452 DriverStr(RepeatVVV(&mips::MipsAssembler::Hadd_uD, "hadd_u.d ${reg1}, ${reg2}, ${reg3}"),
2453 "hadd_u.d");
2454 }
2455
TEST_F(AssemblerMIPS32r6Test,MsubvB)2456 TEST_F(AssemblerMIPS32r6Test, MsubvB) {
2457 DriverStr(RepeatVVV(&mips::MipsAssembler::MsubvB, "msubv.b ${reg1}, ${reg2}, ${reg3}"),
2458 "msubv.b");
2459 }
2460
TEST_F(AssemblerMIPS32r6Test,MsubvH)2461 TEST_F(AssemblerMIPS32r6Test, MsubvH) {
2462 DriverStr(RepeatVVV(&mips::MipsAssembler::MsubvH, "msubv.h ${reg1}, ${reg2}, ${reg3}"),
2463 "msubv.h");
2464 }
2465
TEST_F(AssemblerMIPS32r6Test,MsubvW)2466 TEST_F(AssemblerMIPS32r6Test, MsubvW) {
2467 DriverStr(RepeatVVV(&mips::MipsAssembler::MsubvW, "msubv.w ${reg1}, ${reg2}, ${reg3}"),
2468 "msubv.w");
2469 }
2470
TEST_F(AssemblerMIPS32r6Test,MsubvD)2471 TEST_F(AssemblerMIPS32r6Test, MsubvD) {
2472 DriverStr(RepeatVVV(&mips::MipsAssembler::MsubvD, "msubv.d ${reg1}, ${reg2}, ${reg3}"),
2473 "msubv.d");
2474 }
2475
TEST_F(AssemblerMIPS32r6Test,FmaddW)2476 TEST_F(AssemblerMIPS32r6Test, FmaddW) {
2477 DriverStr(RepeatVVV(&mips::MipsAssembler::FmaddW, "fmadd.w ${reg1}, ${reg2}, ${reg3}"),
2478 "fmadd.w");
2479 }
2480
TEST_F(AssemblerMIPS32r6Test,FmaddD)2481 TEST_F(AssemblerMIPS32r6Test, FmaddD) {
2482 DriverStr(RepeatVVV(&mips::MipsAssembler::FmaddD, "fmadd.d ${reg1}, ${reg2}, ${reg3}"),
2483 "fmadd.d");
2484 }
2485
TEST_F(AssemblerMIPS32r6Test,FmsubW)2486 TEST_F(AssemblerMIPS32r6Test, FmsubW) {
2487 DriverStr(RepeatVVV(&mips::MipsAssembler::FmsubW, "fmsub.w ${reg1}, ${reg2}, ${reg3}"),
2488 "fmsub.w");
2489 }
2490
TEST_F(AssemblerMIPS32r6Test,FmsubD)2491 TEST_F(AssemblerMIPS32r6Test, FmsubD) {
2492 DriverStr(RepeatVVV(&mips::MipsAssembler::FmsubD, "fmsub.d ${reg1}, ${reg2}, ${reg3}"),
2493 "fmsub.d");
2494 }
2495
2496 #undef __
2497
2498 } // namespace art
2499